Search results for "Testing and Fault-Tolerance"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Sun-Yuan Hsieh, Yu-Shu Chen	Strongly Diagnosable Product Networks Under the Comparison Diagnosis Model.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Fault tolerance, modeling, evaluation, Reliability, Measurement, Graph Theory, Graph Theory, Discrete Mathematics, Discrete Mathematics, On-chip interconnection networks, Testing and Fault-Tolerance, Mathematics of Computing, Mathematics of Computing, simulation of multiple-processor systems, Network problems
1	Berk Sunar, Gunnar Gaubatz, Erkay Savas	Sequential Circuit Design for Embedded Cryptographic Applications Resilient to Adversarial Faults.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Control Structure Reliability, Hardware, Testing and Fault-Tolerance
1	Ioannis Voyiatzis	An ALU-Based BIST Scheme for Word-Organized RAMs.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF	Memory control and access, Reliability, Test generation, Built-In Tests, Testing and Fault-Tolerance, Semiconductor Memories
1	Fang Liu, Sule Ozev, Plamen K. Nikolov	Parametric variability analysis for multistage analog circuits using analytical sensitivity modeling.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	Hierarchical variance analysis, parameter correlations, performance model, process variations, analog circuits
1	Antonio González, Scott A. Mahlke, Shubu Mukherjee, Resit Sendag, Derek Chiou, Joshua J. Yi	Reliability: Fallacy or Reality?	IEEE Micro	2007	DBLP DOI BibTeX RDF	control structure reliability, control structures and microprogramming, and fault-tolerance, arithmetic and logic structures, reliability, testing, hardware, testing and fault-tolerance, memory structures, performance and reliability
1	Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano	Analysis of Errors and Erasures in Parity Sharing RS Codecs.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Reliability, Error control codes, Testing and Fault-Tolerance
1	David Y. Feinstein, V. S. S. Nair, Mitchell A. Thornton	Advances in Quantum Computing Fault Tolerance and Testing.	HASE	2007	DBLP DOI BibTeX RDF
1	Mohammad Tehranipoor, Reza M. Rad	Built-In Self-Test and Recovery Procedures for Molecular Electronics-Based Nanofabrics.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Egas Henes Neto, Ivandro Ribeiro, Michele G. Vieira, Gilson I. Wirth, Fernanda Lima Kastensmidt	Using Bulk Built-in Current Sensors to Detect Soft Errors.	IEEE Micro	2006	DBLP DOI BibTeX RDF	Reliability, Built-in tests, Error-checking, Testing and Fault-Tolerance
1	André DeHon, Helia Naeimi	Seven Strategies for Tolerating Highly Defective Fabrication.	IEEE Design & Test of Computers	2005	DBLP DOI BibTeX RDF	Reliability, integrated circuits, Reconfigurable hardware, Built-in tests, Testing strategies, Logic Arrays, Testing and Fault-Tolerance, Redundant design, Advanced Technologies
1	Partha Pratim Pande, Cristian Grecu, André Ivanov, Resve A. Saleh, Giovanni De Micheli	Design, Synthesis, and Test of Networks on Chips.	IEEE Design & Test of Computers	2005	DBLP DOI BibTeX RDF	Reliability, VLSI, Automatic synthesis, VLSI Systems, Testing and Fault-Tolerance
1	Sagar S. Sabade, Duncan M. Hank Walker	IC Outlier Identification Using Multiple Test Metrics.	IEEE Design & Test of Computers	2005	DBLP DOI BibTeX RDF	Control Structure Reliability, Testing and Fault-Tolerance, Reliability and Testing
1	Chong Zhao, Sujit Dey, Xiaoliang Bai	Soft-Spot Analysis: Targeting Compound Noise Effects in Nanometer Circuits.	IEEE Design & Test of Computers	2005	DBLP DOI BibTeX RDF	B.8.1 Reliability, G.4.g Reliability and robustness, B.7 Integrated Circuits, Testing and Fault-Tolerance
1	Brian T. Gold, Jangwoo Kim, Jared C. Smolens, Eric S. Chung, Vasileios Liaskovitis, Eriko Nurvitadhi, Babak Falsafi, James C. Hoe, Andreas Nowatzyk	TRUSS: A Reliable, Scalable Server Architecture.	IEEE Micro	2005	DBLP DOI BibTeX RDF	and Fault-Tolerance, and Fault-Tolerance, Reliability, Reliability, Reliability, Testing, Testing, Testing and Fault-Tolerance, Performance Analysis and Design Aids
1	Ravishankar K. Iyer, Nithin Nakka, Zbigniew Kalbarczyk, Subhasish Mitra	Recent Advances and New Avenues in Hardware-Level Reliability Support.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Reliability, Error-checking, Testing and Fault-Tolerance, Redundant design
1	Cameron McNairy, Rohit Bhatia	Montecito: A Dual-Core, Dual-Thread Itanium Processor.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Reliability, Power Management, Cache memories, Multithreaded processors, Testing and Fault-Tolerance
1	Fang Liu, Jacob J. Flomenberg, Devaka V. Yasaratne, Sule Ozev	Hierarchical Variance Analysis for Analog Circuits Based on Graph Modelling and Correlation Loop Tracing.	DATE	2005	DBLP DOI BibTeX RDF
1	Mohammad Tehranipoor	Defect Tolerance for Molecular Electronics-Based NanoFabrics Using Built-In Self-Test Procedure.	DFT	2005	DBLP DOI BibTeX RDF
1	Xia Cai, Michael R. Lyu	An Empirical Study on Reliability Modeling for Diverse Software Systems.	ISSRE	2004	DBLP DOI BibTeX RDF
1	Michael R. Lyu, Zubin Huang, Sam K. S. Sze, Xia Cai	An Empirical Study on Testing and Fault Tolerance for Software Reliability Engineering.	ISSRE	2003	DBLP DOI BibTeX RDF	data flow coverage testing, empirical study, software fault tolerance, mutation testing
1	Jin-Fu Li, Cheng-Wen Wu	Efficient FFT network testing and diagnosis schemes.	IEEE Trans. VLSI Syst.	2002	DBLP DOI BibTeX RDF
1	John M. Emmert, Charles E. Stroud, Jason A. Cheatham, Andrew M. Taylor, Pankaj Kataria, Miron Abramovici	Performance Penalty for Fault Tolerance in Roving STARs.	FPL	2000	DBLP DOI BibTeX RDF	Adaptive Computing System, Fault Tolerance, FPGA
1	Dharma P. Agrawal	Testing and Fault Tolerance of Multistage Interconnection Networks.	IEEE Computer	1982	DBLP DOI BibTeX RDF