Search results for "Tor M. Aamodt"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Tayler H. Hetherington, Timothy G. Rogers, Lisa Hsu, Mike O'Connor, Tor M. Aamodt	Characterizing and evaluating a key-value store application on heterogeneous CPU-GPU systems.	ISPASS	2012	DBLP DOI BibTeX RDF
1	Xi E. Chen, Tor M. Aamodt	Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs.	TACO	2011	DBLP DOI BibTeX RDF
1	Wilson W. L. Fung, Inderpreet Singh, Andrew Brownsword, Tor M. Aamodt	Hardware transactional memory for GPU architectures.	MICRO	2011	DBLP DOI BibTeX RDF
1	Wilson W. L. Fung, Tor M. Aamodt	Thread block compaction for efficient SIMT control flow.	HPCA	2011	DBLP DOI BibTeX RDF
1	Johnny J. W. Kuan, Steven J. E. Wilton, Tor M. Aamodt	Accelerating trace computation in post-silicon debug.	ISQED	2010	DBLP DOI BibTeX RDF
1	Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, Tor M. Aamodt	Visualizing complex dynamics in many-core accelerator architectures.	ISPASS	2010	DBLP DOI BibTeX RDF
1	Ali Bakhoda, John Kim, Tor M. Aamodt	On-chip network design considerations for compute accelerators.	PACT	2010	DBLP DOI BibTeX RDF
1	Ali Bakhoda, John Kim, Tor M. Aamodt	Throughput-Effective On-Chip Networks for Manycore Accelerators.	MICRO	2010	DBLP DOI BibTeX RDF
1	Wilson W. L. Fung, Ivan Sham, George L. Yuan, Tor M. Aamodt	Dynamic warp formation: Efficient MIMD control flow on SIMD graphics hardware.	TACO	2009	DBLP DOI BibTeX RDF	fine-grained multithreading, GPU, SIMD, control flow
1	Ali Bakhoda, George L. Yuan, Wilson W. L. Fung, Henry Wong, Tor M. Aamodt	Analyzing CUDA workloads using a detailed GPU simulator.	ISPASS	2009	DBLP DOI BibTeX RDF
1	George L. Yuan, Ali Bakhoda, Tor M. Aamodt	Complexity effective memory access scheduling for many-core accelerator architectures.	MICRO	2009	DBLP DOI BibTeX RDF	graphics processors, on-chip interconnection networks, memory controller
1	Xi E. Chen, Tor M. Aamodt	A first-order fine-grained multithreaded throughput model.	HPCA	2009	DBLP DOI BibTeX RDF
1	Tor M. Aamodt, Paul Chow	Compile-time and instruction-set methods for improving floating- to fixed-point conversion accuracy.	ACM Trans. Embedded Comput. Syst.	2008	DBLP DOI BibTeX RDF	fractional multiplication, Compilation, digital signal processing, scaling, fixed-point, signal-to-noise ratio
1	Henry Wong, Anne Bracy, Ethan Schuchman, Tor M. Aamodt, Jamison D. Collins, Perry H. Wang, Gautham N. Chinya, Ankur Khandelwal Groen, Hong Jiang, Hong Wang 0003	Pangaea: a tightly-coupled IA32 heterogeneous chip multiprocessor.	PACT	2008	DBLP DOI BibTeX RDF	ia32, on-chip integration, chip multiprocessor, heterogeneous
1	Xi E. Chen, Tor M. Aamodt	Hybrid analytical modeling of pending cache hits, data prefetching, and MSHRs.	MICRO	2008	DBLP DOI BibTeX RDF
1	Wilson W. L. Fung, Ivan Sham, George L. Yuan, Tor M. Aamodt	Dynamic Warp Formation and Scheduling for Efficient GPU Control Flow.	MICRO	2007	DBLP DOI BibTeX RDF
1	Tor M. Aamodt, Paul Chow	Optimization of data prefetch helper threads with path-expression based statistical modeling.	ICS	2007	DBLP DOI BibTeX RDF	optimization, multithreading, analytical modeling, data prefetch, path expressions, helper threads
1	Tor M. Aamodt, Paul Chow, Per Hammarlund, Hong Wang 0003, John Paul Shen	Hardware Support for Prescient Instruction Prefetch.	HPCA	2004	DBLP DOI BibTeX RDF
1	Tor M. Aamodt, Pedro Marcuello, Paul Chow, Antonio González, Per Hammarlund, Hong Wang 0003, John Paul Shen	A framework for modeling and optimization of prescient instruction prefetch.	SIGMETRICS	2003	DBLP DOI BibTeX RDF	optimization, multithreading, analytical modeling, path expressions, helper threads, instruction prefetch
1	Tor M. Aamodt, Paul Chow	Embedded ISA support for enhanced floating-point to fixed-point ANSI-C compilation.	CASES	2000	DBLP DOI BibTeX RDF

Publications of "Tor M. Aamodt" ( http://dblp.L3S.de/Authors/Tor_M._Aamodt )