|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 2 occurrences of 2 keywords
|
|
|
|
|
Results
Found 2 publication records. Showing 2 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yoshifumi Ikenaga, Masahiro Nomura, Shuji Suenaga, Hideo Sonohara, Yoshitaka Horikoshi, Toshiyuki Saito, Yukio Ohdaira, Yoichiro Nishio, Tomohiro Iwashita, Miyuki Satou, Koji Nishida, Koichi Nose, Koichiro Noguchi, Yoshihiro Hayashi, Masayuki Mizuno |
A 27% Active-Power-Reduced 40-nm CMOS Multimedia SoC With Adaptive Voltage Scaling Using Distributed Universal Delay Lines.  |
J. Solid-State Circuits  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Nagaraj Ns, John Byler, Koorosh Nazifi, Venugopal Puvvada, Toshiyuki Saito, Alan Gibbons, S. Balajee |
What's cool for the future of ultra low power designs?  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
system level power, low power, system design |
Displaying result #1 - #2 of 2 (100 per page; Change: )
|
|