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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Found 16 publication records. Showing 16 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Ting-Ju Chen, Jin-Fu Li, Tsu-Wei Tseng |
Cost-Efficient Built-In Redundancy Analysis With Optimal Repair Rate for RAMs.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Chih-Sheng Hou, Jin-Fu Li, Tsu-Wei Tseng |
Memory Built-in Self-Repair Planning Framework for RAMs in SoCs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Jin-Fu Li |
A Low-Cost Built-In Redundancy-Analysis Scheme for Word-Oriented RAMs With 2-D Redundancy. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Jin-Fu Li |
SETBIST: An Soft-Error Tolerant Built-In Self-Test Scheme for Random Access Memories. |
J. Inf. Sci. Eng. |
2011 |
DBLP BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Yu-Jen Huang, Jin-Fu Li |
DABISR: A Defect-Aware Built-In Self-Repair Scheme for Single/Multi-Port RAMs in SoCs. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Jin-Fu Li, Chih-Chiang Hsu |
ReBISR: A Reconfigurable Built-In Self-Repair Scheme for Random Access Memories in SOCs. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Jin-Fu Li, Tsu-Wei Tseng, Chih-Sheng Hou |
Reliability-Enhancement and Self-Repair Schemes for SRAMs With Static and Dynamic Faults. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Jin-Fu Li, Chih-Sheng Hou |
A Built-in Method to Repair SoC RAMs in Parallel. |
IEEE Design & Test of Computers |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Chih-Sheng Hou, Jin-Fu Li |
Automatic generation of memory built-in self-repair circuits in SOCs for minimizing test time and area cost. |
VTS |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Jin-Fu Li |
A Shared Parallel Built-In Self-Repair Scheme for Random Access Memories in SOCs. |
ITC |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Jin-Fu Li, Tsu-Wei Tseng, Chin-Long Wey |
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories |
CoRR |
2007 |
DBLP BibTeX RDF |
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| 1 | Chao-Da Huang, Jin-Fu Li, Tsu-Wei Tseng |
ProTaR: An Infrastructure IP for Repairing RAMs in System-on-Chips. |
IEEE Trans. VLSI Syst. |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Chun-Hsien Wu, Yu-Jen Huang, Jin-Fu Li, Alex Pao, Kevin Chiu, Eliot Chen |
A Built-In Self-Repair Scheme for Multiport RAMs. |
VTS |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Jin-Fu Li, Chih-Chiang Hsu, Alex Pao, Kevin Chiu, Eliot Chen |
A Reconfigurable Built-In Self-Repair Scheme for Multiple Repairable RAMs in SOCs. |
ITC |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Tsu-Wei Tseng, Jin-Fu Li, Da-Ming Chang |
A built-in redundancy-analysis scheme for RAMs with 2D redundancy using 1D local bitmap. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Jin-Fu Li, Tsu-Wei Tseng, Chin-Long Wey |
An Efficient Transparent Test Scheme for Embedded Word-Oriented Memories. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #16 of 16 (100 per page; Change: )
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