Search results for "VLSI Signal Processing"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Alexandros Stamatakis, Filip Blagojevic, Dimitrios S. Nikolopoulos, Christos D. Antonopoulos	Exploring New Search Algorithms and Hardware for Phylogenetics: RAxML Meets the IBM Cell.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	RAxML, IBM cell, maximum likelihood, phylogenetic inference
1	Mohamed Amin Latif, Saeid Sanei, Jonathon A. Chambers, Loukianos Spyrou	Partially Constrained Blind Source Separation for Localization of Unknown Sources Exploiting Non-homogeneity of the Head Tissues.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	partially constrained, nonhomogeneity, electroencephalogram (EEG), blind source separation (BSS), source localization
1	Tomasz M. Rutkowski, Danilo P. Mandic, Allan Kardec Barros	A Multimodal Approach to Communicative Interactivity Classification.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	human communication analysis, multimedia information processing, audiovisual data fusion, data fusion
1	Umut Ozertem, Deniz Erdogmus	Information Regularized Sensor Fusion: Application to Localization With Distributed Motion Sensors.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	information regularization principle, target localization and tracking, binary motion detector network, mutual information
1	Dominique Lavenier, Gilles Georges, Xinchun Liu	A Reconfigurable Index FLASH Memory tailored to Seed-Based Genomic Sequence Comparison Algorithms.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	seed-based algorithm, indexing, bioinformatics, reconfigurable architecture, FLASH memory, index, genomics, sequence comparison
1	Frank Zhigang Wang, Na Helian, Sining Wu, Yuhui Deng, Vineet R. Khare, Chris Thompson	Grid-Based Storage Architecture for Accelerating Bioinformatics Computing.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	nucleotide sequence database searching, bioinformatics computing, microarray data mining, grid computing, pattern matching, computer architecture, sequence alignment, data storage
1	Vijay Nagarajan, Stefan Laendner, Nikhil Jayakumar, Olgica Milenkovic, Sunil P. Khatri	High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	code construction, fully-parallel VLSI implementation, network of PLAs, iterative decoding, low-density parity-check codes
1	Jérémie Detrey, Florent de Dinechin	A Tool for Unbiased Comparison between Logarithmic and Floating-point Arithmetic.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF
1	H. Jeong, Y. Kim	A Systolic Architecture and Implementation of Feedback Network for Blind Source Separation.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	convolutive mixtures, FPGA, VLSI, blind source separation (BSS)
1	Jesus E. Molinar-Solis, Felipe Gomez-Castaneda, Jose A. Moreno-Cadenas, Victor H. Ponce-Ponce	Programmable CMOS CNN Cell Based on Floating-gate Inverter Unit.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	vision chips, floating-gate devices, cellular neural network
1	Liang-Kai Wang, Michael J. Schulte	A Decimal Floating-Point Divider Using Newton-Raphson Iteration.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Newton-Raphson iteration, initial approximation, computer arithmetic, floating-point, division, hardware design, decimal
1	David J. Miller 0001, Deniz Erdogmus	Guest Editorial for Special Issue on the 2005 IEEE Workshop on Machine Learning for Signal Processing.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF
1	Siddharth Pal, David J. Miller 0001	An Extension of Iterative Scaling for Decision and Data Aggregation in Ensemble Classification.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	improved iterative scaling, mixed continuous-discrete feature spaces, maximum entropy, ensemble classification
1	Jeffrey M. Arnold	The Architecture and Development Flow of the S5 Software Configurable Processor.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	software configurable processor, reconfigurable architectures, embedded computing, instruction set extension
1	Earl E. Swartzlander Jr.	The Negative Two's Complement Number System.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	arithmetic and logic structures, computer arithmetic
1	Toshiya Ohkubo, Tetsuya Takiguchi, Yasuo Ariki	Two-channel-based Noise Reduction in a Complex Spectrum Plane for Hands-free Communication System.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	two-channel microphone, complex spectrum plane, noise reduction
1	John Paul Walters, Xiandong Meng, Vipin Chaudhary, Timothy F. Oliver, Leow Yuan Yeow, Bertil Schmidt, Darran Nathan, Joseph I. Landman	MPI-HMMER-Boost: Distributed FPGA Acceleration.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	FPGA, VLSI, MPI, database searching, profile hidden markov models, HMMER
1	Maria Stepanova, Feng Lin, Valerie C.-L. Lin	A Hopfield Neural Classifier and Its FPGA Implementation for Identification of Symmetrically Structured DNA Motifs.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	DNA motifs, sequence structure identification, hopfield classifier, field-programmable gate arrays, recurrent neural network
1	Chia-Wen Lin, Zhi-Hong Ling, Yeng-Cheng Chang, Chung J. Kuo	Compressed-domain Fall Incident Detection for Intelligent Homecare.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	fall incident detection, compressed-domain signal processing, video surveillance, homecare
1	Messaoud Ahmed-Ouameur, Daniel Massicotte	Real-time DSP and FPGA Implementation of Wiener LMS Based Multipath Channel Estimation in 3G CDMA Systems.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	delay acquisition, Wiener LMS, FPGA, VLSI, FFT, DSP, WCDMA, channel estimation, cdma2000
1	Hyung Rai Oh, Hwangjun Song	A Novel Dynamic and Scalable Caching Algorithm of Proxy Server for Multimedia Objects.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	multimedia, network, caching, proxy server
1	José Gabriel F. Coutinho, M. P. T. Juvonen, J. L. Wang, B. L. Lo, Wayne Luk, Oskar Mencer, G. Z. Yang	Designing a Posture Analysis System with Hardware Implementation.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	posture analysis, FPGA, gait analysis, hardware compilation, ubiquitous sensor networks
1	Weiguo Liu, Bertil Schmidt, Wolfgang Müller-Wittig	Performance Analysis of General-Purpose Computation on Commodity Graphics Hardware: A Case Study Using Bioinformatics.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	dynamic programming, graphics hardware, performance prediction, GPGPU, pairwise sequence alignment
1	Fee-Lee Lim, Wilson S. Leoputra, Tele Tan	Non-overlapping Distributed Tracking System Utilizing Particle Filter.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	non-overlapping, particle filter, tracking system
1	Ramaswamy Palaniappan, Danilo P. Mandic	EEG Based Biometric Framework for Automatic Identity Verification.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Davies-Bouldin index, identity identification, neural network, biometric, electroencephalogram
1	Tuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala	Stride Permutation Networks for Array Processors.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	stride permutation, data format converter, parallel computation, interconnection network, fast fourier transform, array processor, viterbi decoding
1	Jun-Hee Mun, Shung Han Cho, Sangjin Hong	Flexible Controller Design and Its Application for Concurrent Execution of Buffer Centric Dataflows.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	flexible controller design, buffer centric dataflow, reconfigurable architecture
1	H. H. Chen, S. C. Chan	Adaptive Beamforming and DOA Estimation Using Uniform Concentric Spherical Arrays with Frequency Invariant Characteristics.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	uniform concentric spherical arrays, frequency invariant, SOCP, broadband 2-D DOA estimation, broadband adaptive beamforming, design method, array processing
1	Wei Han, Kwok-Wai Hon, Cheong-fat Chan, Oliver Chiu-sing Choy, Kong-Pang Pun	A Speech Recognition IC Using Hidden Markov Models with Continuous Observation Densities.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	HMM, speech recognition, Viterbi algorithm, Gaussian mixtures
1	Andrew Kinane, Noel E. O'Connor	Energy-efficient Hardware Accelerators for the SA-DCT and Its Inverse.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	shape adaptive DCT/IDCT, low power, MPEG-4, hardware acceleration, video objects
1	Maher E. Rizkalla, Paul Salama, Mohamed El-Sharkawy, Modukuri Sushmitha	Hardware Implementation of Block-based Motion Estimation for Real Time Applications.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	fast search algorithms, exhaustive search algorithm, VHDL implementation, VLSI, motion estimation, finite state machine
1	Marcio Juliato, Guido Araujo, Julio López, Ricardo Dahab	A Custom Instruction Approach for Hardware and Software Implementations of Finite Field Arithmetic over F2163 using Gaussian Normal Bases.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Gaussian normal bases, processor specialization, elliptic curve cryptography, finite field arithmetic
1	Hualiang Li, Tülay Adali, Wei Wang 0018, Darren Emge, Andrzej Cichocki	Non-negative Matrix Factorization with Orthogonality Constraints and its Application to Raman Spectroscopy.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Raman spectroscopy, NMFOC, non-negative matrix factorization
1	Byeong Il Lee, Jae Sung Lee, Dong Soo Lee, Won Jun Kang, Jong Jin Lee, Seungjin Choi	A Clinical Application of Ensemble ICA to the Quantification of Myocardial Blood Flow in Dynamic H152 O H^{{15}}_{2} O PET.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	myocardial blood flow quantification, independent component analysis (ICA), positron emission tomography (PET), Bayesian learning
1	David B. Thomas, Wayne Luk	High Quality Uniform Random Number Generation Using LUT Optimised State-transition Matrices.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Uniform Random Numbers, Simulation, FPGA
1	Youcef Bouchebaba, Bruno Girodias, Fabien Coelho, Gabriela Nicolescu, El Mostapha Aboulhamid	Buffer and Register Allocation for Memory Space Optimization.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	program transformation, memory hierarchy, data locality, memory optimization
1	Chun Xue, Zili Shao, Edwin Hsing-Mean Sha	Maximize Parallelism Minimize Overhead for Nested Loops via Loop Striping.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	optimization, parallelism, loop transformation
1	Mame Maria Mbaye, Normand Bélanger, Yvon Savaria, Samuel Pierre	A Novel Application-specific Instruction-set Processor Design Approach for Video Processing Acceleration.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	data grouping and reuse, optimization, parallelism, application-specific instruction-set processor, design exploration
1	Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Son Jhang, Jeong-A. Lee, Dong-Soo Har	Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	multiple outstanding transactions, in-order/out-of-order transaction completion, asynchronous on-chip bus, GALS
1	Máire McLoone, Ciaran McIvor	High-speed & Low Area Hardware Architectures of the Whirlpool Hash Function.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	hash function implementation, cryptography, whirlpool
1	Tian Lan, Deniz Erdogmus	Maximally Informative Feature and Sensor Selection in Pattern Recognition Using Local and Global Independent Component Analysis.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	feature selection, independent component analysis, mutual information, sensor selection
1	Praveen Krishnamurthy, Jeremy Buhler, Roger D. Chamberlain, Mark A. Franklin, Kwame Gyang, Arpith C. Jacob, Joseph M. Lancaster	Biosequence Similarity Search on the Mercury System.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	comparative annotation, biosequence, DNA sequencing
1	Mateusz Majer, Jürgen Teich, Ali Ahmadinia, Christophe Bobda	The Erlangen Slot Machine: A Dynamically Reconfigurable FPGA-based Computer.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	FPGA-based computer, rekonfiguration manager, platform, relocation, partiall dynamic reconfiguration, ESM
1	Jian-Gang Wang, Eng Thiam Lim, Xiang Chen, Ronda Venkateswarlu	Real-time Stereo Face Recognition by Fusing Appearance and Depth Fisherfaces.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	face recognition, fusion, stereo, fisherfaces
1	Anup Hosangadi, Farzan Fallah, Ryan Kastner	Algebraic Methods for Optimizing Constant Multiplications in Linear Systems.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	constant multiplications, DSP synthesis, high level synthesis, linear systems, common subexpression elimination, algebraic methods
1	Taeseok Kim, Hyokyung Bahn, Kern Koh	Considering User Behavior and Multiple QoS Supports in Multimedia Streaming Caching.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	streaming caching, QoS(Quality of Service), multimedia server, popularity
1	Luis M. San-José-Revuelta	Hypotheses Control-based Strategies for the Development of Near-optimum Bayesian Detectors for CDMA Systems.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Bayesian approach, Multiple-Access Interference, CDMA systems
1	Martin Golz, David Sommer, Mo Chen, Udo Trutschel, Danilo P. Mandic	Feature Fusion for the Detection of Microsleep Events.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	microsleep events, delay vector variance, genetic algorithms, support vector machines, feature fusion, learning vector quantization, automatic relevance determination
1	Albert M. K. Cheng, Zhubin Zhang	Improving Web Server Performance with Adaptive Proxy Caching in Soft Real-time Mobile Applications.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	adaptive proxy caching, mobile networking, web servers, temporal coherency, soft real-time systems
1	Yueting Zhuang, Yi Yang, Fei Wu, Yunhe Pan	Manifold Learning Based Cross-media Retrieval: A Solution to Media Object Complementary Nature.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	semantic complementary, modality complementary, manifold learning, multimedia document, cross-media retrieval
1	Seung-Uk Yoon, Eun-Kyung Lee, Sung-Yeol Kim, Yo-Sung Ho	A Framework for Representation and Processing of Multi-view Video Using the Concept of Layered Depth Image.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	representation of multi-view video, multi-view video coding, layered depth image (LDI)
1	Milind Borkar, Volkan Cevher, James H. McClellan	Decentralized State Initialization with Delay Compensation for Multi-modal Sensor Networks.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	decentralized processing, sensor networks, data fusion, Monte Carlo methods, initialization, multi-modal
1	Fengling Li, Nam Ling, Xiaokang Yang	Improved Update Step for Scalable Video Coding in Video Surveillance.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	motion-compensated temporal filtering (MCTF), motion vector (MV) correlation, prediction and update step, scalable video coding (SVC)
1	Albert Mo Kim Cheng, Feng Shang	Priority-driven Coding and Transmission of Progressive JPEG Images for Real-Time Applications.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	video systems, JPEG/MPEG compression standards, real-time scheduling, image systems
1	Scott C. Douglas, Jih-Cheng Chao	Simple, Robust, and Memory-Efficient FastICA Algorithms Using the Huber M-Estimator Cost Function.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Huber M-estimator, FastICA algorithm, ill-conditioned signal mixtures, kurtosis-based contrasts, non-Gaussian source distributions, Gaussian noise
1	Danilo P. Mandic, Su Lee Goh, Kazuyuki Aihara	Sequential Data Fusion via Vector Spaces: Fusion of Heterogeneous Data in the Complex Domain.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	complex nonlinearity, data fusion, spatio-temporal, vector spaces, complex-valued
1	Euripides Sotiriades, Apostolos Dollas	A General Reconfigurable Architecture for the BLAST Algorithm.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	FPGA BLAST, reconfigurable BLAST architecture, FPGA BLAST architecture, bioinformatic hardware, bioinformatic FPGA
1	Milos D. Ercegovac, Jean-Michel Muller	Complex Square Root with Operand Prescaling.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	complex square-root, operand prescaling, computer arithmetic, digit-recurrence algorithm
1	Antoine Fraboulet, Tanguy Risset	Master Interface for On-chip Hardware Accelerator Burst Communications.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	SoC simulation, system on chip, high level synthesis, interface generation
1	Mark Eastwood, Bogdan Gabrys	The Dynamics of Negative Correlation Learning.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	neural networks, classification, stability, dynamics, combination, ensemble methods, negative correlation learning
1	Chen-Kuo Chiang, Hwai-Chung Fei, Shang-Hong Lai	Fast Multi-reference Motion Estimation via Enhanced Downhill Simplex Search.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	downhill simplex search, multi-reference-frame motion estimation, motion-estimation, block-matching algorithm
1	Moritz Grosse-Wentrup, Martin Buss	Overcomplete Independent Component Analysis via Linearly Constrained Minimum Variance Spatial Filtering.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	overcomplete, underdetermined, event related fields, independent component analysis, EEG, blind source separation, denoising, beamforming, event related potentials, MEG
1	Roman C. Kordasiewicz, Shahram Shirani	On Hardware Implementations Of DCT and Quantization Blocks for H.264/AVC.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	JVT, integer DCT, Xilinx Virtex 2-Pro, PPC, FPGA, architecture, H.264/AVC, quantization, hardware implementations, MPEG4
1	Yi-Hsuan Lee, Cheng Chen	An Efficient Code Generation Algorithm for Non-orthogonal DSP Architecture.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	non-orthogonal architecture, code generation, DSP
1	Joseph F. Murray, Kenneth Kreutz-Delgado	Learning Sparse Overcomplete Codes for Images.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	overcomplete dictionary learning, FOCUSS, non-negative coding, independent component analysis (ICA), image compression, sparse coding, matching pursuit
1	Yoshiki Yamaguchi, Tsutomu Maruyama, Ryuzo Azuma, Moritoshi Yasunaga, Akihiko Konagaya	Mesoscopic-level Simulation of Dynamics and Interactions of Biological Molecules Using Monte Carlo Simulation.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	signal transduction pathways, FPGA, Monte Carlo simulation
1	Manuel Ortega-Moral, D. Gutiérrez-González, M. L. De-Pablo, Jesús Cid-Sueiro	Training Classifiers for Tree-structured Categories with Partially Labeled Data.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	training classifier, probabilistic tree structure, Bayesian model
1	Sze-Wei Lee, Soon-Chieh Lim	An Enhanced Memory Address Mapping Scheme for Improved Memory Access Performance of 2-D DWT Processing Systems.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	2-D DWT processing systems, memory mapping scheme, memeory access, memory bandwidth
1	Martin I. Layton, Mark J. F. Gales	Acoustic Modelling Using Continuous Rational Kernels.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	augmented statistical models, rational kernels, TIMIT database, speech recognition
1	Feng-Cheng Chang, Hsiang-Cheh Huang, Hsueh-Ming Hang	Layered Access Control Schemes on Watermarked Scalable Media.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	access control, watermarking, encryption, scalable coding
1	Feng Lin, Heiko Schröder, Bertil Schmidt	Solving the Bottleneck Problem in Bioinformatics Computing: An Architectural Perspective.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF
1	Ankush Mittal, Ankur Jain, Ganesh K. Agarwal	Audio-Video based People Counting and Security Framework for Traffic Crossings.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	accident detection, crowd detection, pitch detection, road traffic control, image processing, phase correlation, people counting
1	Gordon J. Brebner, Samarjit Chakraborty, Weng-Fai Wong	Editorial for the Special Issue on Field Programmable Technology.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF
1	Giuseppe Nunnari, Flavio Cannavó	A New Cost Function for Air Quality Modeling.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	air quality modeling, neural networks, data fusion, backpropagation
1	Yuan Xie, Lin Li, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin	Reliability-aware Co-synthesis for Embedded Systems.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	design methodology, scheduling algorithm, embedded system design
1	Ruxandra Lupas Scheiterer, Dragan Obradovic, Volker Tresp	Tailored-to-Fit Bayesian Network Modeling of Expert Diagnostic Knowledge.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Bayesian networks for troubleshooting and diagnosis, noisy OR, proxy model, probabilistic information experts feel confident in estimating, generation of a model that matches as closely as possible the probabilistic information provided by experts, smallest forward-backward expert-based model, closest match, expert systems, probabilistic model, causal model, model generation
1	T. Sansaloni, A. Perez-Pascual, V. Torres, Javier Valls	Scheme for Reducing the Storage Requirements of FFT Twiddle Factors on FPGAs.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	Fast Fourier Transform, digital circuits, digital communications
1	Meikang Qiu, Zhiping Jia, Chun Xue, Zili Shao, Edwin Hsing-Mean Sha	Voltage Assignment with Guaranteed Probability Satisfying Timing Constraint for Real-time Multiproceesor DSP.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	real-time, probability, DSP, DVS, assignment
1	Premysl Sucha, Zdenek Hanzálek, Antonin Hermanek, Jan Schier	Scheduling of Iterative Algorithms with Matrix Operations for Efficient FPGA Design - Implementation of Finite Interval Constant Modulus Algorithm.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	imperfectly nested loops, FPGA, high-level synthesis, implementation, integer linear programming, VLSI design, iterative algorithms, cyclic scheduling, blind equalization
1	Chunxi Chen, Jagath C. Rajapakse	Grid-Enabled BLASTZ: Application to Comparative Genomics.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	BLASTZ, noncoding regions, grid computing, sequence alignment, comparative genomics, BLAST
1	Yijun Sun, Sinisa Todorovic, Jian Li	Increasing the Robustness of Boosting Algorithms within the Linear-programming Framework.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	large margin classifier, soft margin, linear programming, regularization, pattern classification, AdaBoost, minimax problem
1	N. Nicolaou, Slawomir J. Nasuto	Automatic Artefact Removal from Event-related Potentials via Clustering.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	auto-mutual information, automatic artefact removal, clustering, EEG, event-related potentials
1	Roman C. Kordasiewicz, Shahram Shirani	On Hardware Implementations Of DCT and Quantization Blocks for H.264/AVC.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	JVT, integer DCT, Xilinx Virtex 2-Pro, PPC, FPGA, architecture, H.264/AVC, Quantization, hardware implementations, MPEG4
1	Joseph R. Cavallaro, Sanjay V. Rajopadhye, Lothar Thiele, Tobias Noll	Special Issue on ASAP 2004 Conference.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF
1	Silvia Riedel, Bogdan Gabrys	Combination of Multi Level Forecasts.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	multi level forecasting, forecast combination, bias variance Bayes error decomposition, revenue management
1	Ya-Dong Wang, Jian-Kang Wu, Ashraf A. Kassim	Adaptive Particle Filter for Data Fusion of Multiple Cameras.	VLSI Signal Processing	2007	DBLP DOI BibTeX RDF	particle filter, occlusion, visual tracking, Bayesian filter
1	Tinku Acharya, Chaitali Chakrabarti	A Survey on Lifting-based Discrete Wavelet Transform Architectures.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	architecture, VLSI, Discrete Wavelet Transform, lifting
1	Ebrahim Saberinia, K. C. Chang, Gerald E. Sobelman, Ahmed H. Tewfik	Implementation of a Multi-band Pulsed-OFDM Transceiver.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF
1	Tero Kangas, Timo D. Hämäläinen, Kimmo Kuusilinna	Scalable Architecture for SoC Video Encoders.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	System-on-Chip, video encoding, architecture exploration
1	Gustavo A. Ruiz, Juan A. Michell, Angel M. Buron	High Throughput Parallel-Pipeline 2-D DCT/IDCT Processor Chip.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	inverse discrete cosine transform (IDCT), row column decomposition, parallel pipelined architectures, very large scale integration (VLSI), image compression, discrete cosine transform (DCT)
1	Parham Zolfaghari, Hiroko Kato, Yasuhiro Minami, Atsushi Nakamura, Shigeru Katagiri, Roy Patterson	Dynamic Assignment of Gaussian Components in Modelling Speech Spectra.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	ML-MoG algorithm, parametrisation, Gaussian spectral model
1	Fatma Sayadi, Emmanuel Casseau, Mohamed Atri, Mehrez Marzougui, Rached Tourki, Eric Martin 0001	G729 Voice Decoder Design.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	CELP coders, G729 standard, Hw/Sw design, LPC analysis, voice decoding, IP, VLSI design
1	Joseph F. Murray, Kenneth Kreutz-Delgado	Learning Sparse Overcomplete Codes for Images.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	sparse overcomplete coding, FOCUSS-CNDL, non-negative, sparse Bayesian learning, independent components analysis (ICA), image compression, matching pursuit
1	Sau-Gee Chen, Jen-Chuan Chih, Jun-Yi Chou	Direct Digital Frequency Synthesis Based on a Two-Level Table-Lookup Scheme.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	direct digital frequency synthesizer, DDFS algorithm, two-level table lookup scheme
1	José Luis Imaña, Juan Manuel Sánchez	Efficient Reconfigurable Implementation of Canonical and Normal Basis Multipliers Over Galois Fields GF(2m) Generated by AOPs.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	Galois field GF(2m), canonical basis, reconfigurable hardware, normal basis, bit-parallel multiplier
1	Michael J. Schulte, John Glossner, Sanjay Jinturkar, Mayan Moudgill, Suman Mamidi, Stamatis Vassiliadis	A Low-Power Multithreaded Processor for Software Defined Radio.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	low power, wireless communication, computer architecture, multithreading, microarchitecture, Software Defined Radio, processor design
1	Sakari Tiuraniemi, Lucian-Vasile Stoica, Alberto Rabbachin, Ian Oppermann	A VLSI Implementation of Low Power, Low Data Rate UWB Transceiver for Location and Tracking Applications.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF
1	Tay-Jyi Lin, Hung-Yueh Lin, Chie-Min Chao, Chih-Wei Liu, Chih-Wei Jen	A Compact DSP Core with Static Floating-Point Arithmetic.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF
1	Dragan Obradovic, Henning Lenz, Markus Schupfner	Fusion of Map and Sensor Data in a Modern Car Navigation System.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF	GPS signals, vehicle positioning, pattern matching, Kalman filter, dead reckoning, map matching
1	Won Namgoong	Editorial.	VLSI Signal Processing	2006	DBLP DOI BibTeX RDF

Publications at "VLSI Signal Processing"( http://dblp.L3S.de/Venues/VLSI_Signal_Processing )