Search results for "VSIPL"

Found 11 publication records. Showing 11 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Vijay P. Shah, Anthony Skjellum, Nicolas H. Younan, Torey Alford, D. Whitcomb, A. Watkins	inAspect: interfacing Java and VSIPL.	Java Grande	2002	DBLP DOI BibTeX RDF	VSIPL, embedded Java, image processing, signal processing, high-performance, linear algebra, fixed-point arithmetic, multi-platform, JNI
2	Yuriy Sheynin, Anna Novoselova	Object-Orientation in Parallel VSIPL Architecture.	ISORC	2001	DBLP DOI BibTeX RDF
2	Randall S. Janka, Linda M. Wills	A novel codesign methodology for real-time embedded COTS multiprocessor-based signal processing systems.	CODES	2000	DBLP DOI BibTeX RDF	MPI/RT, VSIPL, specification and design methodology, middleware, MPI, embedded, COTS, multiprocessing, MAGIC
1	James R. Geraci, Erek R. Speed	Improving program productivity, performance and portability through a high level language for graphics and game development.	SIGGRAPH Posters	2010	DBLP DOI BibTeX RDF
1	Nicholas Moore, Albert Conti, Miriam Leeser, Laurie A. Smith King	Writing Portable Applications that Dynamically Bind at Run Time to Reconfigurable Hardware.	FCCM	2007	DBLP DOI BibTeX RDF
1	Nicholas Moore, Albert Conti, Miriam Leeser, Laurie A. Smith King	Vforce: An Extensible Framework for Reconfigurable Supercomputing.	IEEE Computer	2007	DBLP DOI BibTeX RDF	Vforce framework, reconfigurable computing, Supercomputing
1	Torey Alford, Vijay P. Shah, Anthony Skjellum, Nicolas H. Younan, Clayborne D. Taylor	inAspect: interfacing Java and VSIPL applications.	Concurrency - Practice and Experience	2005	DBLP DOI BibTeX RDF
1	Vijay P. Shah, Nicolas H. Younan, Torey Alford, Anthony Skjellum	An advanced signal processing toolkit for JAVA applications.	PPPJ	2003	DBLP DOI BibTeX RDF	VSIPL, Java, algorithms, signal processing
1	Randall S. Janka, Linda M. Wills	Specification and synthesis of real-time embedded distributed and parallel multiprocessor-based signal processing systems.	CASES	2000	DBLP DOI BibTeX RDF	MPI/RT, VCC, VSIPL, specification and design methodology, virtual component co-design, real-time, middleware, parallel processing, MPI, embedded, COTS, multiprocessing, MAGIC
1	Randall S. Janka, Linda M. Wills	Combining Virtual Benchmarking with Rapid System Prototyping for Real-Time Embedded Multiprocessor Signal Processing System Codesign. (PDF / PS)	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	signal processor, specification and design methodology, middleware, multiprocessor, embedded, rapid prototyping, codesign
1	Randall S. Janka, Linda M. Wills	A Novel Specification and Design Methodology of Embedded Multiprocessor Signal Processing Systems Using High-Performance Middleware.	IPDPS Workshops	2000	DBLP DOI BibTeX RDF