| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Roger Moussalli, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras |
Massively parallel XML twig filtering using dynamic programming on FPGAs.  |
ICDE  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Betul Buyukkurt, John Cortes, Jason R. Villarreal, Walid A. Najjar |
Impact of high-level transformations within the ROCCC framework. |
TACO |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Doruk Sart, Abdullah Mueen, Walid A. Najjar, Eamonn J. Keogh, Vit Niennattrakul |
Accelerating Dynamic Time Warping Subsequence Search with GPUs and FPGAs. |
ICDM |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason R. Villarreal, Adrian Park, Walid A. Najjar, Robert Halstead |
Designing Modular Hardware Accelerators in C with ROCCC 2.0. |
FCCM |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Roger Moussalli, Mariam Salloum, Walid A. Najjar, Vassilis J. Tsotras |
Accelerating XML Query Matching through Custom Stack Generation on FPGAs. |
HiPEAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar |
Energy-efficient encoding techniques for off-chip data buses. |
ACM Trans. Embedded Comput. Syst. |
2009 |
DBLP DOI BibTeX RDF |
Low-power data buses, bus switching, internal capacitances, encoding |
| 1 | Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar |
Tunable and Energy Efficient Bus Encoding Techniques. |
IEEE Trans. Computers |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhishek Mitra, Marcos R. Vieira, Petko Bakalov, Walid A. Najjar, Vassilis J. Tsotras |
Boosting XML Filtering with a Scalable FPGA-based Architecture |
CoRR |
2009 |
DBLP BibTeX RDF |
|
| 1 | Walid A. Najjar, Michael J. Schulte (eds.) |
Proceedings of the 2009 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2009), Samos, Greece, July 20-23, 2009 |
ICSAMOS |
2009 |
DBLP BibTeX RDF |
|
| 1 | Walid A. Najjar, Jason R. Villarreal |
Reconfigurable Computing in the New Age of Parallelism. |
SAMOS |
2009 |
DBLP DOI BibTeX RDF |
FPGAs, Reconfigurable computing |
| 1 | Abhishek Mitra, Marcos R. Vieira, Petko Bakalov, Vassilis J. Tsotras, Walid A. Najjar |
Boosting XML filtering through a scalable FPGA-based architecture. |
CIDR |
2009 |
DBLP BibTeX RDF |
|
| 1 | Zhi Guo, Betul Buyukkurt, John Cortes, Abhishek Mitra, Walid A. Najjar |
A Compiler Intermediate Representation for Reconfigurable Fabrics. |
International Journal of Parallel Programming |
2008 |
DBLP DOI BibTeX RDF |
FPGA, VHDL, Configurable computing, Intermediate representation |
| 1 | Zhi Guo, Walid A. Najjar, Betul Buyukkurt |
Efficient hardware code generation for FPGAs. |
TACO |
2008 |
DBLP DOI BibTeX RDF |
FPGA, high-level synthesis, VHDL, Reconfigurable computing, data reuse |
| 1 | Michael J. Wirthlin, Daniel S. Poznanovic, P. Sundararajan, Alan J. Coppola, D. Pellerin, Walid A. Najjar, R. Bruce, M. Babst, O. Pritchard, Paolo Palazzari, Georgi Kuzmanov |
OpenFPGA CoreLib core library interoperability effort. |
Parallel Computing |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Michael J. Wirthlin, Daniel S. Poznanovic, P. Sundararajan, Alan J. Coppola, D. Pellerin, Walid A. Najjar, R. Bruce, M. Babst, O. Pritchard, Paolo Palazzari, Georgi Kuzmanov |
OpenFPGA CoreLib core library interoperability effort. |
Parallel Computing |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Walid A. Najjar, Holger Blume (eds.) |
Proceedings of the 2008 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (IC-SAMOS 2008), Samos, Greece, July 21-24, 2008 |
ICSAMOS |
2008 |
DBLP BibTeX RDF |
|
| 1 | Betul Buyukkurt, Walid A. Najjar |
Compiler generated systolic arrays for wavefront algorithm acceleration on FPGAs. |
FPL |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jason R. Villarreal, Walid A. Najjar |
Compiled hardware acceleration of Molecular Dynamics code. |
FPL |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers |
Optimized Generation of Data-Path from C Codes for FPGAs |
CoRR |
2007 |
DBLP BibTeX RDF |
|
| 1 | Koen Bertels, Walid A. Najjar, Arjan J. van Genderen, Stamatis Vassiliadis (eds.) |
FPL 2007, International Conference on Field Programmable Logic and Applications, Amsterdam, The Netherlands, 27-29 August 2007 |
FPL |
2007 |
DBLP BibTeX RDF |
|
| 1 | Kai Schleupen, Scott Lekuch, Ryan Mannion, Zhi Guo, Walid A. Najjar, Frank Vahid |
Dynamic Partial FPGA Reconfiguration in a Prototype Microprocessor System. |
FPL |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Abhishek Mitra, Walid A. Najjar, Laxmi N. Bhuyan |
Compiling PCRE to FPGA for accelerating SNORT IDS. |
ANCS |
2007 |
DBLP DOI BibTeX RDF |
deep payload inspection, nondeterministic nite automata, intrusion detection system, regular expressions |
| 1 | Walid A. Najjar |
Compiling code accelerators for FPGAs. |
CASES |
2007 |
DBLP DOI BibTeX RDF |
FPGA code acceleration |
| 1 | Ann Gordon-Ross, Pablo Viana, Frank Vahid, Walid A. Najjar, Edna Barros |
A one-shot configurable-cache tuner for improved energy and performance. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Walid A. Najjar |
Compiling code accelerators for FPGAs. |
CODES+ISSS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker, Fadi J. Kurdahi |
Compile-time area estimation for LUT-based FPGAs. |
ACM Trans. Design Autom. Electr. Syst. |
2006 |
DBLP DOI BibTeX RDF |
Reconfigurable computing, compiler optimization, resource estimation |
| 1 | Song Lin, Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar |
Efficient indexing data structures for flash-based sensor devices. |
TOS |
2006 |
DBLP DOI BibTeX RDF |
Wireless sensor networks, flash memory, access methods |
| 1 | Zhi Guo, Abhishek Mitra, Walid A. Najjar |
Automation of IP Core Interface Generation for Reconfigurable Computing. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhi Guo, Walid A. Najjar |
A Compiler Intermediate Representation for Reconfigurable Fabrics. |
FPL |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Betul Buyukkurt, Zhi Guo, Walid A. Najjar |
Impact of Loop Unrolling on Area, Throughput and Clock Frequency in ROCCC: C to VHDL Compiler for FPGAs. |
ARC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Dinesh C. Suresh, Zhi Guo, Betul Buyukkurt, Walid A. Najjar |
Automatic Compilation Framework for Bloom Filter Based Intrusion Detection. |
ARC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Greg Stitt, Frank Vahid, Walid A. Najjar |
A code refinement methodology for performance-improved synthesis from C. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
code refinement, coding guidelines, FPGA, embedded systems, compilation, synthesis, hardware/software partitioning |
| 1 | Abhishek Mitra, Zhi Guo, Anirban Banerjee, Walid A. Najjar |
Dynamic Co-Processor Architecture for Software Acceleration on CSoCs. |
ICCD |
2006 |
DBLP BibTeX RDF |
|
| 1 | Chuanjun Zhang, Frank Vahid, Walid A. Najjar |
A highly configurable cache for low energy embedded systems. |
ACM Trans. Embedded Comput. Syst. |
2005 |
DBLP DOI BibTeX RDF |
embedded systems, low power, Cache, microprocessor, configurable, memory hierarchy, low energy, architecture tuning |
| 1 | Chuanjun Zhang, Frank Vahid, Jun Yang 0002, Walid A. Najjar |
A way-halting cache for low-energy high-performance systems. |
TACO |
2005 |
DBLP DOI BibTeX RDF |
embedded systems, low power, Cache, dynamic optimization, low energy |
| 1 | Dinesh C. Suresh, Walid A. Najjar, Jun Yang 0002 |
Power Efficient Instruction Caches for Embedded Systems. |
SAMOS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar |
A tunable bus encoder for off-chip data buses. |
ISLPED |
2005 |
DBLP DOI BibTeX RDF |
TUBE, data bus, data bus encoding, tunable bus encoder |
| 1 | Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar |
Data Acquisition in Sensor Networks with Large Memories. |
ICDE Workshops |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Anirban Banerjee, Anirban Mitra, Walid A. Najjar |
Splitting the sensor node. |
SenSys |
2005 |
DBLP DOI BibTeX RDF |
high capacity storage, split-architecture, performance, sensors |
| 1 | Thomas M. Conte, Paolo Faraboschi, William H. Mangione-Smith, Walid A. Najjar (eds.) |
Proceedings of the 2005 International Conference on Compilers, Architecture, and Synthesis for Embedded Systems, CASES 2005, San Francisco, California, USA, September 24-27, 2005 |
CASES |
2005 |
DBLP BibTeX RDF |
|
| 1 | Greg Stitt, Zhi Guo, Walid A. Najjar, Frank Vahid |
Techniques for synthesizing binaries to an advanced register/memory structure. |
FPGA |
2005 |
DBLP DOI BibTeX RDF |
smart buffers, FPGA, embedded systems, synthesis, decompilation, binaries |
| 1 | Zhi Guo, Betul Buyukkurt, Walid A. Najjar, Kees A. Vissers |
Optimized Generation of Data-Path from C Codes for FPGAs. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Demetrios Zeinalipour-Yazti, Song Lin, Vana Kalogeraki, Dimitrios Gunopulos, Walid A. Najjar |
MicroHash: An Efficient Index Structure for Flash-Based Sensor Devices. |
FAST |
2005 |
DBLP BibTeX RDF |
|
| 1 | Demetrios Zeinalipour-Yazti, Vana Kalogeraki, Dimitrios Gunopulos, Anirban Mitra, Anirban Banerjee, Walid A. Najjar |
Towards In-Situ Data Storage in Sensor Databases. |
Panhellenic Conference on Informatics |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Dinesh C. Suresh, Banit Agrawal, Walid A. Najjar, Jun Yang 0002 |
VALVE: Variable Length Value Encoder for Off-Chip Data Buses.. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Walid A. Najjar |
From Here to Main-stream: The Present and Future of Reconfigurable Computing. |
ERSA |
2004 |
DBLP BibTeX RDF |
|
| 1 | Chuanjun Zhang, Frank Vahid, Jun Yang 0002, Walid A. Najjar |
A way-halting cache for low-energy high-performance systems. |
ISLPED |
2004 |
DBLP DOI BibTeX RDF |
low power techniques, cache design |
| 1 | Zhi Guo, Walid A. Najjar, Frank Vahid, Kees A. Vissers |
A quantitative analysis of the speedup factors of FPGAs over processors. |
FPGA |
2004 |
DBLP DOI BibTeX RDF |
performance, FPGA, analysis, VHDL, reconfigurable computing |
| 1 | Walid A. Najjar |
"How Long is Your Belt?" Towards a Single Device for Multiple Functions. (PDF / PS) |
ICPS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhi Guo, Betul Buyukkurt, Walid A. Najjar |
Input data reuse in compiling window operations onto reconfigurable hardware. |
LCTES |
2004 |
DBLP DOI BibTeX RDF |
reuse analysis, compilation, high-level synthesis, VHDL, reconfigurable computing |
| 1 | Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm, Jeffrey Hammes |
Automatic compilation to a coarse-grained reconfigurable system-opn-chip. |
ACM Trans. Embedded Comput. Syst. |
2003 |
DBLP DOI BibTeX RDF |
compilers, Reconfigurable computing, SIMD |
| 1 | Chuanjun Zhang, Frank Vahid, Jun Yang 0002, Walid A. Najjar |
A Way-Halting Cache for Low-Energy High-Performance Systems. |
Computer Architecture Letters |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Walid A. Najjar, A. P. Wim Böhm, Bruce A. Draper, Jeffrey Hammes, Robert Rinker, J. Ross Beveridge, Monica Chawathe, Charles Ross |
High-Level Language Abstraction for Reconfigurable Computing. |
IEEE Computer |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Dinesh C. Suresh, Jun Yang 0002, Chuanjun Zhang, Banit Agrawal, Walid A. Najjar |
FV-MSB: A Scheme for Reducing Transition Activity on Data Buses. |
HiPC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Chuanjun Zhang, Frank Vahid, Walid A. Najjar |
A Highly-Configurable Cache Architecture for Embedded Systems. (PDF / PS) |
ISCA |
2003 |
DBLP DOI BibTeX RDF |
embedded systems, low power, Cache, microprocessor, configurable, low energy, architecture tuning |
| 1 | Chuanjun Zhang, Frank Vahid, Walid A. Najjar |
Energy Benefits of a Configurable Line Size Cache for Embedded Systems. |
ISVLSI |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Dinesh C. Suresh, Banit Agrawal, Jun Yang 0002, Walid A. Najjar, Laxmi N. Bhuyan |
Power efficient encoding techniques for off-chip data buses. |
CASES |
2003 |
DBLP DOI BibTeX RDF |
FV, FV-MSB-LSB, data bus, low power, bus encoding |
| 1 | Dinesh C. Suresh, Walid A. Najjar, Frank Vahid, Jason R. Villarreal, Greg Stitt |
Profiling tools for hardware/software partitioning of embedded applications. |
LCTES |
2003 |
DBLP DOI BibTeX RDF |
loop analysis, compiler optimization, hardware/software partitioning |
| 1 | Susan Cotterell, Frank Vahid, Walid A. Najjar, Harry Hsieh |
First results with eBlocks: embedded systems building blocks. |
CODES+ISSS |
2003 |
DBLP DOI BibTeX RDF |
embedded systems, networks, intelligent homes |
| 1 | Jason R. Villarreal, Dinesh C. Suresh, Greg Stitt, Frank Vahid, Walid A. Najjar |
Improving Software Performance with Configurable Logic. |
Design Autom. for Emb. Sys. |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | A. P. Wim Böhm, Jeffrey Hammes, Bruce A. Draper, Monica Chawathe, Charlie Ross, Robert Rinker, Walid A. Najjar |
Mapping a Single Assignment Programming Language to Reconfigurable Systems. |
The Journal of Supercomputing |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker, Fadi J. Kurdahi |
Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems. |
FCCM |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | A. P. Wim Böhm, J. Ross Beveridge, Bruce A. Draper, Charlie Ross, Monica Chawathe, Walid A. Najjar |
Compiling ATR Probing Codes for Execution on FPGA Hardware. |
FCCM |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Dianne R. Kumar, Walid A. Najjar, Pradip K. Srimani |
A New Adaptive Hardware Tree-Based Multicast Routing in K-Ary N-Cubes. |
IEEE Trans. Computers |
2001 |
DBLP DOI BibTeX RDF |
adaptive routing, Multicast communication, deterministic routing, virtual cut-through switching, path-based routing, tree-based routing |
| 1 | Lucas Roh, Bhanu Shankar, A. P. Wim Böhm, Walid A. Najjar |
Resource Management in Dataflow-Based Multithreaded Execution. |
J. Parallel Distrib. Comput. |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert Rinker, M. Carter, A. Patel, Monica Chawathe, Charlie Ross, Jeffrey Hammes, Walid A. Najjar, A. P. Wim Böhm |
An automated process for compiling dataflow graphs into reconfigurable hardware. |
IEEE Trans. VLSI Syst. |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Jean-Luc Gaudiot, Thomas DeBoni, John Feo, A. P. Wim Böhm, Walid A. Najjar, Patrick Miller |
The Sisal Project: Real World Functional Programming. |
Compiler Optimizations for Scalable Parallel Systems Languages |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeffrey Hammes, A. P. Wim Böhm, Charlie Ross, Monica Chawathe, Bruce A. Draper, Robert Rinker, Walid A. Najjar |
Loop fusion and temporal common subexpression elimination in window-based loops. |
IPDPS |
2001 |
DBLP BibTeX RDF |
|
| 1 | Dianne R. Kumar, Walid A. Najjar, Pradip K. Srimani |
Performance Evaluation of a New Hardware Supported Multicast Scheme for K-ary N-cubes. |
IPDPS |
2001 |
DBLP BibTeX RDF |
|
| 1 | Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm |
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture. |
CASES |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Bruce A. Draper, A. P. Wim Böhm, Jeffrey Hammes, Walid A. Najjar, J. Ross Beveridge, Charlie Ross, Monica Chawathe, Mitesh Desai, José Bins |
Compiling SA-C Programs to FPGAs: Performance Results. |
ICVS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Robert Rinker, Jeffrey Hammes, Walid A. Najjar, A. P. Wim Böhm, Bruce A. Draper |
Compiling Image Processing Applications to Reconfigurable Hardware. |
ASAP |
2000 |
DBLP DOI BibTeX RDF |
compilers, Configurable computing, image processing applications |
| 1 | Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm, Walid A. Najjar, Bruce A. Draper |
A High Level, Algorithmic Programming Language and Compiler for Reconfigurable Systems. |
PDPTA |
2000 |
DBLP BibTeX RDF |
|
| 1 | Bruce A. Draper, Walid A. Najjar, A. P. Wim Böhm, Jeffrey Hammes, Robert Rinker, Charlie Ross, Monica Chawathe, José Bins |
Compiling and Optimizing Image Processing Algorithms for FPGAs. |
CAMP |
2000 |
DBLP DOI BibTeX RDF |
SA-C, language features, SA-C algorithms, performance numbers, image processing routines, Annapolis Microsystems WildForce board, Xilinx 4036XL FPGAs, FPGAs, VHDL, optimizing compiler, high-level language, data flow graphs, data flow graphs, image processing algorithms |
| 1 | Walid A. Najjar, Edward A. Lee, Guang R. Gao |
Advances in the dataflow computational model. |
Parallel Computing |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeffrey Hammes, Robert Rinker, A. P. Wim Böhm, Walid A. Najjar, Bruce A. Draper, J. Ross Beveridge |
Cameron: High level Language Compilation for Reconfigurable Systems. |
IEEE PACT |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Dianne R. Kumar, Walid A. Najjar |
Combining Adaptive and Deterministic Routing: Evaluation of a Hybrid Router. |
CANPC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Walid A. Najjar, Gabriel M. Silberman |
Foreword to the special issues. |
International Journal of Parallel Programming |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Dianne Miller, Walid A. Najjar |
Empirical Evaluation of Deterministic and Adaptive Routing with Constant-Area Routers. |
IEEE PACT |
1997 |
DBLP DOI BibTeX RDF |
constant-area routers, router complexity, saturation points, performance, hypercube networks, hypercube networks, adaptive routing, deterministic routing, virtual cut-through switching, k-ary n-cube networks |
| 1 | Dianne Miller, Walid A. Najjar |
Preliminary Evaluation of a Hybrid Deterministic/Adaptive Router. |
PCRCW |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Lucas Roh, Walid A. Najjar, Bhanu Shankar, A. P. Wim Böhm |
Generation, Optimization, and Evaluation of Multithreaded Code. |
J. Parallel Distrib. Comput. |
1996 |
DBLP DOI BibTeX RDF |
|
| 1 | Annette Lagman, Walid A. Najjar |
Analysis of Buffer Design for Adaptive Routing in Direct Networks. |
MASCOTS |
1996 |
DBLP BibTeX RDF |
|
| 1 | William Marcus Miller, Walid A. Najjar, A. P. Wim Böhm |
Exploiting Data Structure Locality in the Dataflow Model. |
J. Parallel Distrib. Comput. |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Lucas Roh, Walid A. Najjar |
Design of storage hierarchy in multithreaded architectures. |
MICRO |
1995 |
DBLP DOI BibTeX RDF |
|
| 1 | Walid A. Najjar, Lucas Roh, A. P. Wim Böhm |
An evaluation of medium-grain dataflow code. |
International Journal of Parallel Programming |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Annette Lagman, Walid A. Najjar, Pradip K. Srimani |
An Analysis of Edge Fault Tolerance in Recursively Decomposable Regular Networks. |
IEEE Trans. Computers |
1994 |
DBLP DOI BibTeX RDF |
edge fault tolerance, recursively decomposable, edge failures, fault tolerance measures, restricted resilience, probabilistic fault tolerance measures, reliability, interconnection networks, fault tolerant computing, multiprocessor interconnection networks, network topology, network topologies, resilience, topological properties, regular networks, probabilistic measures, large scale multiprocessor |
| 1 | Walid A. Najjar, Jean-Luc Gaudiot |
Authors' Reply. |
IEEE Trans. Computers |
1994 |
DBLP BibTeX RDF |
|
| 1 | Walid A. Najjar, Annette Lagman, Sumit Sur, Pradip K. Srimani |
Modeling Adaptive Routing in k-ary n-cube Networks. |
MASCOTS |
1994 |
DBLP BibTeX RDF |
|
| 1 | William Marcus Miller, Walid A. Najjar, A. P. Wim Böhm |
A model for dataflow based vector execution. |
International Conference on Supercomputing |
1994 |
DBLP DOI BibTeX RDF |
|
| 1 | Lucas Roh, Walid A. Najjar, Bhanu Shankar, A. P. Wim Böhm |
An Evaluation of Optimized Threaded Code Generation. |
IFIP PACT |
1994 |
DBLP BibTeX RDF |
|
| 1 | Walid A. Najjar, A. P. Wim Böhm, William Marcus Miller |
A Quantitative Analysis of Dataflow Program Execution - Preliminaries to a Hybrid Design. |
J. Parallel Distrib. Comput. |
1993 |
DBLP DOI BibTeX RDF |
|
| 1 | A. P. Wim Böhm, Walid A. Najjar, Bhanu Shankar, Lucas Roh |
An evaluation of bottom-up and top-down thread generation techniques. |
MICRO |
1993 |
DBLP DOI BibTeX RDF |
code generation strategies, hybrid von Neumann/dataflow, clusters, performance evaluation, threads |
| 1 | Lucas Roh, Walid A. Najjar, A. P. Wim Böhm |
Generation and Quantitative Evaluation of Dataflow Clusters. |
FPCA |
1993 |
DBLP BibTeX RDF |
|
| 1 | Walid A. Najjar, Lucas Roh, A. P. Wim Böhm |
The Initial Performance of a Bottom-Up Clustering Algorithm for Dataflow Graphs. |
Architectures and Compilation Techniques for Fine and Medium Grain Parallelism |
1993 |
DBLP BibTeX RDF |
|
| 1 | Annette Lagman, Walid A. Najjar, Sumit Sur, Pradip K. Srimani |
Evaluation of Idealized Adaptive Routing on k-ary n-cubes. |
SPDP |
1993 |
DBLP BibTeX RDF |
|
| 1 | Walid A. Najjar, William Marcus Miller, A. P. Wim Böhm |
An Analysis of Loop Latency in Dataflow Execution. |
ISCA |
1992 |
DBLP DOI BibTeX RDF |
|
| 1 | William Marcus Miller, Walid A. Najjar, A. P. Wim Böhm |
A Quantitative Analysis of Locality in Dataflow Programs. |
MICRO |
1991 |
DBLP DOI BibTeX RDF |
|
| 1 | Walid A. Najjar, Jean-Luc Gaudiot |
Network Resilience: A Measure of Network Fault Tolerance. |
IEEE Trans. Computers |
1990 |
DBLP DOI BibTeX RDF |
|
| 1 | Walid A. Najjar, Jean-Luc Gaudiot |
A data-driven execution paradigm for distributed fault-tolerance. |
ACM SIGOPS European Workshop |
1990 |
DBLP DOI BibTeX RDF |
|
| 1 | Paraskevas Evripidou, Walid A. Najjar, Jean-Luc Gaudiot |
A Single-Assignment Language in a Distributed Memory Multiprocessor. |
PARLE |
1989 |
DBLP DOI BibTeX RDF |
|
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