Search results for "Wang Yi"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Nan Guan, Mingsong Lv, Wang Yi, Ge Yu	WCET Analysis with MRU Caches: Challenging LRU for Predictability.	IEEE Real-Time and Embedded Technology and Applications Symposium	2012	DBLP DOI BibTeX RDF
1	Gerd Behrmann, Alexandre David, Kim Guldstrand Larsen, Paul Pettersson, Wang Yi	Developing UPPAAL over 15 years.	Softw., Pract. Exper.	2011	DBLP DOI BibTeX RDF
1	Nan Guan, Wang Yi, Qingxu Deng, Zonghua Gu, Ge Yu	Schedulability analysis for non-preemptive fixed-priority multiprocessor scheduling.	Journal of Systems Architecture - Embedded Systems Design	2011	DBLP DOI BibTeX RDF
1	Xiaoquan Gong, Zhenji Zhang, Jinsong Pei, Wang Yi	Research on the Information Integration of China's Basic Industries Trademark Information Service.	ICEIS	2011	DBLP BibTeX RDF
1	Fanxin Kong, Nan Guan, Qingxu Deng, Wang Yi	Energy-efficient scheduling for parallel real-time tasks based on level-packing.	SAC	2011	DBLP DOI BibTeX RDF
1	Mingsong Lv, Nan Guan, Qingxu Deng, Ge Yu, Wang Yi	McAiT - A Timing Analyzer for Multicore Real-Time Software.	ATVA	2011	DBLP DOI BibTeX RDF
1	Yi Zhang, Nan Guan, Yanbin Xiao, Wang Yi	Implementation and empirical comparison of partitioning-based multi-core scheduling.	SIES	2011	DBLP DOI BibTeX RDF
1	Xi Jin, Nan Guan, Qingxu Deng, Wang Yi	Memory Access Aware Mapping for Networks-on-Chip.	RTCSA	2011	DBLP DOI BibTeX RDF
1	Nan Guan, Pontus Ekberg, Martin Stigge, Wang Yi	Effective and Efficient Scheduling of Certifiable Mixed-Criticality Sporadic Task Systems.	RTSS	2011	DBLP DOI BibTeX RDF
1	Yi Zhang, Nan Guan, Wang Yi	Towards the Implementation and Evaluation of Semi-Partitioned Multi-Core Scheduling.	PPES	2011	DBLP DOI BibTeX RDF
1	Fanxin Kong, Wang Yi, Qingxu Deng	Energy-efficient scheduling of real-time tasks on cluster-based multicores.	DATE	2011	DBLP BibTeX RDF
1	Martin Stigge, Pontus Ekberg, Nan Guan, Wang Yi	The Digraph Real-Time Task Model.	IEEE Real-Time and Embedded Technology and Applications Symposium	2011	DBLP DOI BibTeX RDF
1	Immo Grabe, Mohammad Mahdi Jaghoori, Bernhard K. Aichernig, Christel Baier, Tobias Blechmann, Frank S. de Boer, Andreas Griesmayer, Einar Broch Johnsen, Joachim Klein, Sascha Klüppelholz, Marcel Kyas, Wolfgang Leister, Rudolf Schlatte, Andries Stam, Martin Steffen, Simon Tschirner, Liang Xuedong, Wang Yi	Credo Methodology: Modeling and Analyzing A Peer-to-Peer System in Credo.	Electr. Notes Theor. Comput. Sci.	2010	DBLP DOI BibTeX RDF
1	Mingsong Lv, Nan Guan, Qingxu Deng, Ge Yu, Wang Yi	Static worst-case execution time analysis of the µC/OS-II real-time kernel.	Frontiers of Computer Science in China	2010	DBLP DOI BibTeX RDF
1	Parosh Aziz Abdulla, Pavel Krcál, Wang Yi	Sampled Semantics of Timed Automata	Logical Methods in Computer Science	2010	DBLP BibTeX RDF
1	Wang Yi	Multicore Embedded Systems: The Timing Problem and Possible Solutions.	ICFEM	2010	DBLP DOI BibTeX RDF
1	Fanxin Kong, Yiqun Wang, Qingxu Deng, Wang Yi	Minimizing Multi-resource Energy for Real-Time Systems with Discrete Operation Modes.	ECRTS	2010	DBLP DOI BibTeX RDF	real-time systems, dynamic voltage scaling, energy management, dynamic power management
1	Mingsong Lv, Wang Yi, Nan Guan, Ge Yu	Combining Abstract Interpretation with Model Checking for Timing Analysis of Multicore Software.	RTSS	2010	DBLP DOI BibTeX RDF
1	Karl Henrik Johansson, Wang Yi (eds.)	Proceedings of the 13th ACM International Conference on Hybrid Systems: Computation and Control, HSCC 2010, Stockholm, Sweden, April 12-15, 2010	HSCC	2010	DBLP BibTeX RDF
1	Nan Guan, Martin Stigge, Wang Yi, Ge Yu	Fixed-Priority Multiprocessor Scheduling with Liu and Layland's Utilization Bound.	IEEE Real-Time and Embedded Technology and Applications Symposium	2010	DBLP DOI BibTeX RDF	real-time systems, multiprocessor, fixed priority scheduling, utilization bound
1	Parosh Aziz Abdulla, Pavel Krcál, Wang Yi	Universality of R-automata with Value Copying.	Electr. Notes Theor. Comput. Sci.	2009	DBLP DOI BibTeX RDF
1	Frank S. de Boer, Immo Grabe, Mohammad Mahdi Jaghoori, Andries Stam, Wang Yi	Modeling and Analysis of Thread-Pools in an Industrial Communication Platform.	ICFEM	2009	DBLP DOI BibTeX RDF
1	Mingsong Lv, Nan Guan, Yi Zhang, Rui Chen, Qingxu Deng, Ge Yu, Wang Yi	WCET Analysis of the mC/OS-II Real-Time Kernel.	CSE	2009	DBLP DOI BibTeX RDF
1	Nan Guan, Martin Stigge, Wang Yi, Ge Yu	Cache-aware scheduling and analysis for multicores.	EMSOFT	2009	DBLP DOI BibTeX RDF	real-time systems, multicores, schedulability analysis, cache partitioning
1	Wang Yi	Applying SLEUTH for Simulating and Assessing Urban Growth Scenarios on a Case Study of Beijing.	JCAI	2009	DBLP DOI BibTeX RDF	SLEUTH, urban expansion, dynamic and spatial model, Beijing, simulation
1	Nan Guan, Zonghua Gu, Wang Yi, Ge Yu	Improving scalability of model-checking for minimizing buffer requirements of synchronous dataflow graphs.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Nan Guan, Martin Stigge, Wang Yi, Ge Yu	New Response Time Bounds for Fixed Priority Multiprocessor Scheduling.	IEEE Real-Time Systems Symposium	2009	DBLP DOI BibTeX RDF
1	Jin Song Dong, Ping Hao, Shengchao Qin, Jun Sun 0001, Wang Yi	Timed Automata Patterns.	IEEE Trans. Software Eng.	2008	DBLP DOI BibTeX RDF
1	Soonhoi Ha, Kiyoung Choi, Taewhan Kim, Krisztián Flautner, Sang Lyul Min, Wang Yi	Introduction to embedded systems week 2006 special issue.	ACM Trans. Embedded Comput. Syst.	2008	DBLP DOI BibTeX RDF
1	Parosh Aziz Abdulla, Pavel Krcál, Wang Yi	R-Automata.	CONCUR	2008	DBLP DOI BibTeX RDF
1	Simon Tschirner, Liang Xuedong, Wang Yi	Model-based validation of QoS properties of biomedical sensor networks.	EMSOFT	2008	DBLP DOI BibTeX RDF	modelling and verification, wireless sensor networks
1	Bengt Jonsson, Simon Perathoner, Lothar Thiele, Wang Yi	Cyclic dependencies in modular performance analysis.	EMSOFT	2008	DBLP DOI BibTeX RDF	fixpoint iteration, performance analysis, real-time calculus
1	Nan Guan, Wang Yi, Zonghua Gu, Qingxu Deng, Ge Yu	New Schedulability Test Conditions for Non-preemptive Scheduling on Multiprocessor Platforms.	IEEE Real-Time Systems Symposium	2008	DBLP DOI BibTeX RDF
1	Elena Fersman, Pavel Krcál, Paul Pettersson, Wang Yi	Task automata: Schedulability, decidability and undecidability.	Inf. Comput.	2007	DBLP DOI BibTeX RDF
1	Pavel Krcál, Martin Stigge, Wang Yi	Multi-processor Schedulability Analysis of Preemptive Real-Time Tasks with Variable Execution Times.	FORMATS	2007	DBLP DOI BibTeX RDF
1	Parosh Aziz Abdulla, Pavel Krcál, Wang Yi	Sampled Universality of Timed Automata.	FoSSaCS	2007	DBLP DOI BibTeX RDF
1	Elena Fersman, Leonid Mokrushin, Paul Pettersson, Wang Yi	Schedulability analysis of fixed-priority systems using timed automata.	Theor. Comput. Sci.	2006	DBLP DOI BibTeX RDF
1	Sang Lyul Min, Wang Yi (eds.)	Proceedings of the 6th ACM & IEEE International conference on Embedded software, EMSOFT 2006, October 22-25, 2006, Seoul, Korea	EMSOFT	2006	DBLP BibTeX RDF
1	Pavel Krcál, Wang Yi	Communicating Timed Automata: The More Synchronous, the More Difficult to Verify.	CAV	2006	DBLP DOI BibTeX RDF
1	Gerd Behrmann, Alexandre David, Kim Guldstrand Larsen, John Håkansson, Paul Pettersson, Wang Yi, Martijn Hendriks	UPPAAL 4.0.	QEST	2006	DBLP DOI BibTeX RDF
1	Geguang Pu, Chong Zhang, Zongyan Qiu, Jifeng He, Wang Yi	Integrating Timed Automata into Tabu Algorithm for HW-SW Partitioning.	ICECCS	2006	DBLP DOI BibTeX RDF
1	Paul Caspi, Alberto L. Sangiovanni-Vincentelli, Luís Almeida, Albert Benveniste, Bruno Bouyssounouse, Giorgio C. Buttazzo, Ivica Crnkovic, Werner Damm, Jakob Engblom, Gerhard Fohler, Marisol García-Valls, Hermann Kopetz, Yassine Lakhnech, François Laroussinie, Luciano Lavagno, Giuseppe Lipari, Florence Maraninchi, Philipp Peti, Juan Antonio de la Puente, Norman Scaife, Joseph Sifakis, Robert de Simone, Martin Törngren, Paulo Veríssimo, Andy J. Wellings, Reinhard Wilhelm, Tim A. C. Willemse, Wang Yi	Guidelines for a graduate curriculum on embedded software and systems.	ACM Trans. Embedded Comput. Syst.	2005	DBLP DOI BibTeX RDF	Graduate curriculum, architecture and design, extrafunctional properties, distributed systems, embedded systems, real-time, control, labs
1	Jifeng He, Dang Van Hung, Geguang Pu, Zongyan Qiu, Wang Yi	Exploring optimal solution to hardware/software partitioning for synchronous model.	Formal Asp. Comput.	2005	DBLP DOI BibTeX RDF	Timed automata, Scheduling algorithm, Reachability, Hardware/software partitioning
1	Paul Pettersson, Wang Yi	Guest Editors' Foreword.	Nord. J. Comput.	2005	DBLP BibTeX RDF
1	Paul Pettersson, Wang Yi (eds.)	Formal Modeling and Analysis of Timed Systems, Third International Conference, FORMATS 2005, Uppsala, Sweden, September 26-28, 2005, Proceedings	FORMATS	2005	DBLP BibTeX RDF
1	Elena Fersman, Wang Yi	A Generic Approach to Schedulability Analysis of Real-Time Tasks.	Nord. J. Comput.	2004	DBLP BibTeX RDF
1	Pavel Krcál, Leonid Mokrushin, P. S. Thiagarajan, Wang Yi	Timed vs. Time-Triggered Automata.	CONCUR	2004	DBLP DOI BibTeX RDF
1	Jin Song Dong, Ping Hao, Shengchao Qin, Jun Sun 0001, Wang Yi	Timed Patterns: TCOZ to Timed Automata.	ICFEM	2004	DBLP DOI BibTeX RDF	Modeling and specification formalisms
1	Geguang Pu, Xiangpeng Zhao, Shuling Wang, Zongyan Qiu, Jifeng He, Wang Yi	An Approach to Hardware/Software Partitioning for Multiple Hardware Devices Model.	SEFM	2004	DBLP DOI BibTeX RDF
1	Pavel Krcál, Wang Yi	Decidable and Undecidable Problems in Schedulability Analysis Using Timed Automata.	TACAS	2004	DBLP DOI BibTeX RDF
1	Geguang Pu, Dang Van Hung, Jifeng He, Wang Yi	An Optimal Approach to Hardware/Software Partitioning for Synchronous Model.	IFM	2004	DBLP DOI BibTeX RDF	timed automata, scheduling algorithm, reachability, Hardware/software partitioning
1	Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi	Compact Data Structures and State-Space Reduction for Model-Checking Real-Time Systems.	Real-Time Systems	2003	DBLP DOI BibTeX RDF	real-time systems, model checking, timed automata, design tool, formal specification and verification
1	Tiziana Margaria, Wang Yi	Introductory paper: scalability aspects of validation.	STTT	2003	DBLP DOI BibTeX RDF
1	Johan Bengtsson, Wang Yi	On Clock Difference Constraints and Termination in Reachability Analysis of Timed Automata.	ICFEM	2003	DBLP DOI BibTeX RDF
1	Elena Fersman, Leonid Mokrushin, Paul Pettersson, Wang Yi	Schedulability Analysis Using Two Clocks.	TACAS	2003	DBLP DOI BibTeX RDF
1	Tobias Amnell, Elena Fersman, Leonid Mokrushin, Paul Pettersson, Wang Yi	TIMES: A Tool for Schedulability Analysis and Code Generation of Real-Time Systems.	FORMATS	2003	DBLP DOI BibTeX RDF
1	Alexandre David, Gerd Behrmann, Kim Guldstrand Larsen, Wang Yi	Unification & Sharing in Timed Automata Verification.	SPIN	2003	DBLP DOI BibTeX RDF
1	Johan Bengtsson, Wang Yi	Timed Automata: Semantics, Algorithms and Tools.	Lectures on Concurrency and Petri Nets	2003	DBLP DOI BibTeX RDF
1	Johan Bengtsson, W. O. David Griffioen, Kåre J. Kristoffersen, Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi	Automated verification of an audio-control protocol using UPPAAL.	J. Log. Algebr. Program.	2002	DBLP DOI BibTeX RDF
1	Bengt Jonsson, Wang Yi	Testing preorders for probabilistic processes can be characterized by simulations.	Theor. Comput. Sci.	2002	DBLP DOI BibTeX RDF
1	Huimin Lin, Wang Yi	Axiomatising timed automata.	Acta Inf.	2002	DBLP DOI BibTeX RDF
1	Tobias Amnell, Elena Fersman, Paul Pettersson, Hongyan Sun, Wang Yi	Code Synthesis for Timed Automata.	Nord. J. Comput.	2002	DBLP BibTeX RDF
1	Elena Fersman, Paul Pettersson, Wang Yi	Timed Automata with Asynchronous Processes: Schedulability and Decidability.	TACAS	2002	DBLP DOI BibTeX RDF
1	Tobias Amnell, Elena Fersman, Leonid Mokrushin, Paul Pettersson, Wang Yi	TIMES - A Tool for Modelling and Implementation of Embedded Systems.	TACAS	2002	DBLP DOI BibTeX RDF
1	Alexandre David, M. Oliver Möller, Wang Yi	Formal Verification of UML Statecharts with Real-Time Extensions.	FASE	2002	DBLP DOI BibTeX RDF
1	Alexandre David, Gerd Behrmann, Kim Guldstrand Larsen, Wang Yi	A Tool Architecture for the Next Generation of Uppaal.	10th Anniversary Colloquium of UNU/IIST	2002	DBLP DOI BibTeX RDF
1	Gerd Behrmann, Johan Bengtsson, Alexandre David, Kim Guldstrand Larsen, Paul Pettersson, Wang Yi	UPPAAL Implementation Secrets.	FTRTFT	2002	DBLP DOI BibTeX RDF
1	Gu Dawu, Wang Yi	On the Techniques of Enhancing the Security of Block Ciphers.	Operating Systems Review	2001	DBLP DOI BibTeX RDF
1	Magnus Lindahl, Paul Pettersson, Wang Yi	Formal design and analysis of a gear controller.	STTT	2001	DBLP DOI BibTeX RDF	Design, Real-time systems, Model checking, Timed automata, Automotive systems
1	Tiziana Margaria, Wang Yi (eds.)	Tools and Algorithms for the Construction and Analysis of Systems, 7th International Conference, TACAS 2001 Held as Part of the Joint European Conferences on Theory and Practice of Software, ETAPS 2001 Genova, Italy, April 2-6, 2001, Proceedings	TACAS	2001	DBLP BibTeX RDF
1	Fredrik Larsson, Paul Pettersson, Wang Yi	On Memory-Block Traversal Problems in Model-Checking Timed-Systems.	TACAS	2000	DBLP DOI BibTeX RDF
1	Tobias Amnell, Gerd Behrmann, Johan Bengtsson, Pedro R. D'Argenio, Alexandre David, Ansgar Fehnker, Thomas Hune, Bertrand Jeannet, Kim Guldstrand Larsen, M. Oliver Möller, Paul Pettersson, Carsten Weise, Wang Yi	UPPAAL - Now, Next, and Future.	MOVEP	2000	DBLP DOI BibTeX RDF
1	Anders Wall, Kristian Sandström, Jukka Mäki-Turja, Christer Norström, Wang Yi	Verifying temporal constraints on data in multi-rate transactions using timed automata.	RTCSA	2000	DBLP DOI BibTeX RDF	temporal constraint verification, multi-rate transactions, nonpreemptive execution order, scheduling, real-time systems, real-time systems, program verification, transaction processing, computational models, timed automata, data dependencies, schedulability analysis, reachability analysis, reachability analysis, automata theory, end-to-end latency
1	Alexandre David, Wang Yi	Modelling and analysis of a commercial field bus protocol.	ECRTS	2000	DBLP DOI BibTeX RDF
1	Huimin Lin, Wang Yi	A Proof System for Timed Automata.	FoSSaCS	2000	DBLP DOI BibTeX RDF
1	Huimin Lin, Wang Yi	A Complete Axiomatisation for Timed Automata.	FSTTCS	2000	DBLP DOI BibTeX RDF
1	Tobias Amnell, Alexandre David, Wang Yi	A Real-Time Animator for Hybrid Systems.	LCTES	2000	DBLP DOI BibTeX RDF
1	Kim Guldstrand Larsen, Justin Pearson, Carsten Weise, Wang Yi	Clock Difference Diagrams.	Nord. J. Comput.	1999	DBLP BibTeX RDF
1	Christer Norström, Anders Wall, Wang Yi	Timed Automata as Task Models for Event-Driven Systems.	RTCSA	1999	DBLP DOI BibTeX RDF
1	Gerd Behrmann, Kim Guldstrand Larsen, Justin Pearson, Carsten Weise, Wang Yi	Efficient Timed Reachability Analysis Using Clock Difference Diagrams.	CAV	1999	DBLP DOI BibTeX RDF
1	Bengt Jonsson, Wang Yi	Fully Abstract Characterization of Probabilistic May Testing.	ARTS	1999	DBLP DOI BibTeX RDF
1	Johan Bengtsson, Bengt Jonsson, Johan Lilius, Wang Yi	Partial Order Reductions for Timed Systems.	CONCUR	1998	DBLP DOI BibTeX RDF
1	Magnus Lindahl, Paul Pettersson, Wang Yi	Formal Design and Analysis of a Gear Controller.	TACAS	1998	DBLP DOI BibTeX RDF
1	Kim Guldstrand Larsen, Wang Yi	Time-abstracted Bisimulation: Implicit Specifications and Decidability.	Inf. Comput.	1997	DBLP DOI BibTeX RDF
1	Kim Guldstrand Larsen, Paul Pettersson, Wang Yi	UPPAAL in a Nutshell.	STTT	1997	DBLP DOI BibTeX RDF	Modeling real-time systems, Dynamic modeling, Modeling tools, Uppaal
1	Kåre J. Kristoffersen, François Laroussinie, Kim Guldstrand Larsen, Paul Pettersson, Wang Yi	A Compositional Proof of a Real-Time Mutual Exclusion Protocol.	TAPSOFT	1997	DBLP DOI BibTeX RDF
1	Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi	Efficient verification of real-time systems: compact data structure and state-space reduction. (PDF / PS)	IEEE Real-Time Systems Symposium	1997	DBLP DOI BibTeX RDF	real-time systems verification, clock values, clock constraints, real-valued variables, static analysis, timed automata, termination, reachability analysis, reachability analysis, state-space reduction, compact data structure
1	Kim Guldstrand Larsen, Paul Pettersson, Wang Yi	UPPAAL: Status & Developments.	CAV	1997	DBLP DOI BibTeX RDF
1	Johan Bengtsson, Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi	UPPAAL in 1995.	TACAS	1996	DBLP DOI BibTeX RDF
1	Johan Bengtsson, W. O. David Griffioen, Kåre J. Kristoffersen, Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi	Verification of an Audio Protocol with Bus Collision Using UPPAAL.	CAV	1996	DBLP DOI BibTeX RDF
1	Kim Guldstrand Larsen, Paul Pettersson, Wang Yi	Model-Checking for Real-Time Systems.	FCT	1995	DBLP DOI BibTeX RDF
1	Kim Guldstrand Larsen, Paul Pettersson, Wang Yi	Compositional and Symbolic Model-Checking of Real-Time Systems.	IEEE Real-Time Systems Symposium	1995	DBLP BibTeX RDF
1	Johan Bengtsson, Kim Guldstrand Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi	UPPAAL - a Tool Suite for Automatic Verification of Real-Time Systems.	Hybrid Systems	1995	DBLP DOI BibTeX RDF
1	Kim Guldstrand Larsen, Paul Pettersson, Wang Yi	Diagnostic Model-Checking for Real-Time Systems.	Hybrid Systems	1995	DBLP DOI BibTeX RDF
1	Bengt Jonsson, Wang Yi	Compositional Testing Preorders for Probabilistic Processes	LICS	1995	DBLP DOI BibTeX RDF
1	Wang Yi, Paul Pettersson, Mats Daniels	Automatic verification of real-time communicating systems by constraint-solving.	FORTE	1994	DBLP BibTeX RDF
1	Wang Yi, Bengt Jonsson	Decidability of Timed Language-Inclusion for Networks of Real-Time Communicating Sequential Processes.	FSTTCS	1994	DBLP DOI BibTeX RDF
1	Wang Yi	Algebraic Reasoning for Real-Time Probabilistic Processes with Uncertain Information.	FTRTFT	1994	DBLP DOI BibTeX RDF
1	Bengt Jonsson, Chris Ho-Stuart, Wang Yi	Testing and Refinement for Nondeterministic and Probabilistic Processes.	FTRTFT	1994	DBLP DOI BibTeX RDF
1	Kim Guldstrand Larsen, Wang Yi	Time Abstracted Bisimiulation: Implicit Specifications and Decidability.	MFPS	1993	DBLP DOI BibTeX RDF

Publications of "Wang Yi" ( http://dblp.L3S.de/Authors/Wang_Yi )