Search results for "Weichen Liu"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Yaoyao Ye, Jiang Xu, Xiaowen Wu, Wei Zhang 0012, Weichen Liu, Mahdi Nikdast	A Torus-Based Hierarchical Optical-Electronic Network-on-Chip for Multiprocessor System-on-Chip.	JETC	2012	DBLP DOI BibTeX RDF
1	Weichen Liu, Zonghua Gu, Jiang Xu, Xiaowen Wu, Yaoyao Ye	Satisfiability Modulo Graph Theory for Task Mapping and Scheduling on Multiprocessor Systems.	IEEE Trans. Parallel Distrib. Syst.	2011	DBLP DOI BibTeX RDF	scheduling, Multiprocessor, satisfiability, design space exploration
1	Weichen Liu, Jiang Xu, J. K. Muppala, Wei Zhang 0012, Xiaowen Wu, Yaoyao Ye	Coroutine-Based Synthesis of Efficient Embedded Software From SystemC Models.	Embedded Systems Letters	2011	DBLP DOI BibTeX RDF
1	Yu Wang, Jiang Xu, Yan Xu, Weichen Liu, Huazhong Yang	Power Gating Aware Task Scheduling in MPSoC.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Weichen Liu, Jiang Xu, Xuan Wang, Yu Wang 0002, Wei Zhang 0012, Yaoyao Ye, Xiaowen Wu, Mahdi Nikdast, Zhehui Wang	A Hardware-Software Collaborated Method for Soft-Error Tolerant MPSoC.	ISVLSI	2011	DBLP DOI BibTeX RDF
1	Yaoyao Ye, Jiang Xu, Xiaowen Wu, Wei Zhang 0012, Xuan Wang, Mahdi Nikdast, Zhehui Wang, Weichen Liu	Modeling and Analysis of Thermal Effects in Optical Networks-on-Chip.	ISVLSI	2011	DBLP DOI BibTeX RDF
1	Weichen Liu, Jiang Xu, Xiaowen Wu, Yaoyao Ye, Xuan Wang, Wei Zhang 0012, Mahdi Nikdast, Zhehui Wang	A NoC Traffic Suite Based on Real Applications.	ISVLSI	2011	DBLP DOI BibTeX RDF
1	Mo Kwai Hung, Yaoyao Ye, Xiaowen Wu, Wei Zhang 0012, Weichen Liu, Jiang Xu	A Hierarchical Hybrid Optical-Electronic Network-on-Chip.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Yiyuan Xie, Mahdi Nikdast, Jiang Xu, Wei Zhang 0012, Qi Li, Xiaowen Wu, Yaoyao Ye, Xuan Wang, Weichen Liu	Crosstalk noise and bit error rate analysis for optical network-on-chip.	DAC	2010	DBLP DOI BibTeX RDF	optical network-on-chip, crosstalk, BER, SNR
1	Zonghua Gu, Weichen Liu, Jiang Xu, Jin Cui, Xiuqiang He, Qingxu Deng	Efficient algorithms for 2D area management and online task placement on runtime reconfigurable FPGAs.	Microprocessors and Microsystems - Embedded Hardware Design	2009	DBLP DOI BibTeX RDF
1	Weichen Liu, Zonghua Gu, Jiang Xu	Efficient Software Synthesis for Dynamic Single Appearance Scheduling of Synchronous Dataflow.	Embedded Systems Letters	2009	DBLP DOI BibTeX RDF
1	Yan Xu, Weichen Liu, Yu Wang, Jiang Xu, Xiaoming Chen, Huazhong Yang	On-line MPSoC Scheduling Considering Power Gating Induced Power/Ground Noise.	ISVLSI	2009	DBLP DOI BibTeX RDF
1	Yu Wang 0002, Jiang Xu, Shengxi Huang, Weichen Liu, Huazhong Yang	A case study of on-chip sensor network in multiprocessor system-on-chip.	CASES	2009	DBLP DOI BibTeX RDF	sensor network, reliability, low-power, system on chip, dynamic control, power grid noise
1	Weichen Liu, Zonghua Gu, Jiang Xu, Yu Wang 0002, Mingxuan Yuan	An efficient technique for analysis of minimal buffer requirements of synchronous dataflow graphs with model checking.	CODES+ISSS	2009	DBLP DOI BibTeX RDF	scheduling, optimization, model checking, memory management, synchronous dataflow
1	Weichen Liu, Mingxuan Yuan, Xiuqiang He, Zonghua Gu, Xue Liu	Efficient SAT-Based Mapping and Scheduling of Homogeneous Synchronous Dataflow Graphs for Throughput Optimization.	IEEE Real-Time Systems Symposium	2008	DBLP DOI BibTeX RDF
1	Nan Guan, Zonghua Gu, Qingxu Deng, Weichen Liu, Ge Yu	Improved Schedulability Analysis of EDF Scheduling on Reconfigurable Hardware Devices.	IPDPS	2007	DBLP DOI BibTeX RDF
1	Jin Cui, Zonghua Gu, Weichen Liu, Qingxu Deng	An Efficient Algorithm for Online Soft Real-Time Task Placement on Reconfigurable Hardware Devices.	ISORC	2007	DBLP DOI BibTeX RDF

Publications of "Weichen Liu" ( http://dblp.L3S.de/Authors/Weichen_Liu )