Search results for "Xrysovalantis Kavousianos"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Xrysovalantis Kavousianos, Krishnendu Chakrabarty	Generation of Compact Stuck-At Test Sets Targeting Unmodeled Defects.	IEEE Trans. on CAD of Integrated Circuits and Systems	2011	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Vasileios Tenentes, Krishnendu Chakrabarty, Emmanouil Kalligeros	Defect-Oriented LFSR Reseeding to Target Unmodeled Defects Using Stuck-at Test Sets.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Arvind Jain, Rubin A. Parekhji	Test Scheduling for Multicore SoCs with Dynamic Voltage Scaling and Multiple Voltage Islands.	Asian Test Symposium	2011	DBLP DOI BibTeX RDF
1	Vasileios Tenentes, Xrysovalantis Kavousianos	Low Power Test-Compression for High Test-Quality and Low Test-Data Volume.	Asian Test Symposium	2011	DBLP DOI BibTeX RDF
1	Zhaobo Zhang, Xrysovalantis Kavousianos, Yan Luo, Yiorgos Tsiatouhas, Krishnendu Chakrabarty	Signature Analysis for Testing, Diagnosis, and Repair of Multi-mode Power Switches.	European Test Symposium	2011	DBLP DOI BibTeX RDF	Multi-Mode Power Switches, DFT for Multicore Chips, Static Power Management, Testing, Voltage-Control Oscillator
1	Zhaobo Zhang, Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Yiorgos Tsiatouhas	A Robust and Reconfigurable Multi-mode Power Gating Architecture.	VLSI Design	2011	DBLP DOI BibTeX RDF
1	Zhaobo Zhang, Xrysovalantis Kavousianos, Yiorgos Tsiatouhas, Krishnendu Chakrabarty	A BIST scheme for testing and repair of multi-mode power switches.	IOLTS	2011	DBLP DOI BibTeX RDF
1	Vasileios Tenentes, Xrysovalantis Kavousianos	Test-data volume and scan-power reduction with low ATE interface for multi-core SoCs.	ICCAD	2011	DBLP DOI BibTeX RDF
1	Vasileios Tenentes, Xrysovalantis Kavousianos, Emmanouil Kalligeros	Single and Variable-State-Skip LFSRs: Bridging the Gap Between Test Data Compression and Test Set Embedding for IP Cores.	IEEE Trans. on CAD of Integrated Circuits and Systems	2010	DBLP DOI BibTeX RDF
1	Vasileios Tenentes, Xrysovalantis Kavousianos	Self-Freeze Linear Decompressors for Low Power Testing.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Krishnendu Chakrabarty, Emmanouil Kalligeros, Vasileios Tenentes	Defect Coverage-Driven Window-Based Test Compression.	Asian Test Symposium	2010	DBLP DOI BibTeX RDF
1	S. Balatsouka, Vasileios Tenentes, Xrysovalantis Kavousianos, Krishnendu Chakrabarty	Defect aware X-filling for low-power scan testing.	DATE	2010	DBLP BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	Efficient partial scan cell gating for low-power scan-based testing.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	partial gating, scan cell gating, Low-power testing, scan-based testing
1	Xrysovalantis Kavousianos, Krishnendu Chakrabarty	Generation of compact test sets with high defect coverage.	DATE	2009	DBLP BibTeX RDF
1	M. Koutsoupia, Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	LFSR-based test-data compression with self-stoppable seeds.	DATE	2009	DBLP BibTeX RDF
1	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos	Test Data Compression Based on Variable-to-Variable Huffman Encoding With Codeword Reusability.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos	Multilevel-Huffman Test-Data Compression for IP Cores With Multiple Scan Chains.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Vasileios Tenentes, Xrysovalantis Kavousianos, Emmanouil Kalligeros	State Skip LFSRs: Bridging the Gap between Test Data Compression and Test Set Embedding for IP Cores.	DATE	2008	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos	Optimal Selective Huffman Coding for Test-Data Compression.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Embedded Testing Techniques, Selective Huffman Coding, Test-Data Compression, IP Cores
1	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos	Multilevel Huffman Coding: An Efficient Test-Data Compression Method for IP Cores.	IEEE Trans. on CAD of Integrated Circuits and Systems	2007	DBLP DOI BibTeX RDF
1	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	Efficient Multiphase Test Set Embedding for Scan-based Testing.	ISQED	2006	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Emmanouil Kalligeros, Dimitris Nikolos	Efficient test-data compression for IP cores using multilevel Huffman coding.	DATE	2006	DBLP DOI BibTeX RDF
1	Emmanouil Kalligeros, D. Kaseridis, Xrysovalantis Kavousianos, Dimitris Nikolos	Reseeding-Based Test Set Embedding with Reduced Test Sequences.	ISQED	2005	DBLP DOI BibTeX RDF
1	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	Multiphase BIST: a new reseeding technique for high test-data compression.	IEEE Trans. on CAD of Integrated Circuits and Systems	2004	DBLP DOI BibTeX RDF
1	Maciej Bellos, Dimitris Bakalis, Dimitris Nikolos, Xrysovalantis Kavousianos	Low Power Testing by Test Vector Ordering with Vector Repetition.	ISQED	2004	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Bakalis, Maciej Bellos, Dimitris Nikolos	An Efficient Test Vector Ordering Method for Low Power Testing.	ISVLSI	2004	DBLP DOI BibTeX RDF
1	Maciej Bellos, Xrysovalantis Kavousianos, Dimitris Nikolos, Dimitri Kagaris	DV-TSE: Difference Vector Based Test Set Embedding.	VLSI-SOC	2003	DBLP BibTeX RDF
1	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	A highly regular multi-phase reseeding technique for scan-based BIST.	ACM Great Lakes Symposium on VLSI	2003	DBLP DOI BibTeX RDF	scan-based schemes, built-in self-test, linear feedback shift registers, reseeding
1	Giorgos Dimitrakopoulos, Xrysovalantis Kavousianos, Dimitris Nikolos	Virtual-scan: a novel approach for software-based self-testing of microprocessors.	ISCAS	2003	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos, Spyros Tragoudas	A new built-in TPG method for circuits with random patternresistant faults.	IEEE Trans. on CAD of Integrated Circuits and Systems	2002	DBLP DOI BibTeX RDF
1	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	On-the-Fly Reseeding: A New Reseeding Technique for Test-Per-Clock BIST.	J. Electronic Testing	2002	DBLP DOI BibTeX RDF	test-per-clock schemes, accumulator-based test pattern generators, built-in self-test, linear feedback shift registers, reseeding
1	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	An Efficient Seeds Selection Method for LFSR-Based Test-per-Clock BIST. (PDF / PS)	ISQED	2002	DBLP DOI BibTeX RDF	Test-per-Clock Schemes, Reseeding Techniques, Built-In Self-Test, Linear Feedback Shift Registers, Test Pattern Generation
1	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Nikolos	A ROMless LFSR Reseeding Scheme for Scan-based BIST.	Asian Test Symposium	2002	DBLP DOI BibTeX RDF
1	Dimitris Bakalis, Dimitris Nikolos, Haridimos T. Vergos, Xrysovalantis Kavousianos	On Accumulator-Based Bit-Serial Test Response Compaction Schemes.	ISQED	2001	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	A novel reseeding technique for accumulator-based test pattern generation.	ACM Great Lakes Symposium on VLSI	2001	DBLP DOI BibTeX RDF
1	Stanislaw J. Piestrak, Dimitris Bakalis, Xrysovalantis Kavousianos	On the Design of Self-Testing Checkers for Modified Berger Codes.	IOLTW	2001	DBLP DOI BibTeX RDF
1	Emmanouil Kalligeros, Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	A New Reseeding Technique for LFSR-Based Test Pattern Generation.	IOLTW	2001	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Bakalis, Dimitris Nikolos	Test response compaction by an accumulator behaving as a multiple input non-linear feedback shift register.	ITC	2000	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Nikolos, G. Foukarakis, T. Gnardellis	New efficient totally self-checking Berger code checkers.	Integration	1999	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Nikolos	Modular TSC Checkers for Bose-Lin and Bose Codes.	VTS	1999	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Bakalis, Haridimos T. Vergos, Dimitris Nikolos, George Alexiou	Low Power Dissipation in BIST Schemes for Modified Booth Multipliers. (PDF / PS)	DFT	1999	DBLP DOI BibTeX RDF	Modified Booth Multipliers, Low Power, Built In Self Test, VLSI Testing
1	Xrysovalantis Kavousianos, Dimitris Nikolos	Novel Single and Double Output TSC Berger Code Checkers. (PDF / PS)	VTS	1998	DBLP DOI BibTeX RDF
1	Xrysovalantis Kavousianos, Dimitris Nikolos	Self-exercising self testing k-order comparators.	VTS	1997	DBLP DOI BibTeX RDF	self testing k-order comparators, self-exercising comparators, equality comparator, fault tolerant cache memory, built-in self test, error correction codes, combinational circuit, error detection codes, broadcast networks
1	Xrysovalantis Kavousianos, Dimitris Nikolos, G. Sidiropoulos	Design of Compact and High speed, Totally Self Checking CMOS Checkers for m-out-of-n Codes. (PDF / PS)	DFT	1997	DBLP DOI BibTeX RDF	SelfChecking circuits, totally selfchecking circuits, moutofn codes, fault tolerance

Publications of "Xrysovalantis Kavousianos" ( http://dblp.L3S.de/Authors/Xrysovalantis_Kavousianos )