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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 15 occurrences of 12 keywords
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Results
Found 59 publication records. Showing 59 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Zhihua Gui, Fan Yang, Xuan Zeng |
Stochastic Non-homogeneous Arnoldi Method for Analysis of On-Chip Power Grid Networks under Process Variations.  |
IEICE Transactions  |
2011 |
DBLP BibTeX RDF |
|
| 1 | Chunyang Feng, Hai Zhou, Changhao Yan, Jun Tao, Xuan Zeng |
Efficient Approximation Algorithms for Chemical Mechanical Polishing Dummy Fill. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Min Gong, Hai Zhou, Li Li, Jun Tao, Xuan Zeng |
Binning Optimization for Transparently-Latched Circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Zyad Hassan, Nicholas Allec, Fan Yang, Li Shang, Robert P. Dick, Xuan Zeng |
Full-Spectrum Spatial-Temporal Dynamic Thermal Analysis for Nanometer-Scale Integrated Circuits. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaodong Liu, Yifan Zhang, Gary K. Yeap, Xuan Zeng |
An integrated algorithm for 3D-IC TSV assignment. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jian Sun 0005, Yinghai Lu, Hai Zhou, Xuan Zeng |
Post-routing layer assignment for double patterning. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yanling Zhi, Hai Zhou, Xuan Zeng |
A practical method for multi-domain clock skew optimization. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | James Williamson, Yinghai Lu, Li Shang, Hai Zhou, Xuan Zeng |
Parallel cross-layer optimization of high-level synthesis and physical design. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Li Li, Jian Sun 0005, Yinghai Lu, Hai Zhou, Xuan Zeng |
Low power discrete voltage assignment under clock skew scheduling. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yanling Zhi, Wai-Shing Luk, Hai Zhou, Changhao Yan, Hengliang Zhu, Xuan Zeng |
An efficient algorithm for multi-domain clock skew scheduling. |
DATE |
2011 |
DBLP BibTeX RDF |
|
| 1 | Changhao Yan, Sheng-Guo Wang, Xuan Zeng |
A new method for multiparameter robust stability distribution analysis of linear analog circuits. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou |
Stochastic Sparse-Grid Collocation Algorithm for Steady-State Analysis of Nonlinear System with Process Variations. |
IEICE Transactions |
2010 |
DBLP BibTeX RDF |
|
| 1 | Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng |
Multicore Parallelization of Min-Cost Flow for CAD Applications. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Ke Zong, Fan Yang, Xuan Zeng |
A Wavelet-Collocation-Based Trajectory Piecewise-Linear Algorithm for Time-Domain Model-Order Reduction of Nonlinear Circuits. |
IEEE Trans. on Circuits and Systems |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yanjun Zhang, Xuan Zeng, You Yu, Peng Han |
The design of Three Gorges water environment risk and early warning platform based on GIS technology. |
Geoinformatics |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaodong Liu, Yifan Zhang, Gary K. Yeap, Chunlei Chu, Jian Sun 0005, Xuan Zeng |
Global routing and track assignment for flip-chip designs. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
flip-chip, track assignment, voronoi diagram, global routing |
| 1 | Xiaoda Pan, Fan Yang, Xuan Zeng, Yangfeng Su |
An efficient transistor-level piecewise-linear macromodeling approach for model order reduction of nonlinear circuits. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Qiang Fu, Wai-Shing Luk, Jun Tao, Changhao Yan, Xuan Zeng |
Characterizing Intra-Die Spatial Correlation Using Spectral Density Fitting Method. |
IEICE Transactions |
2009 |
DBLP BibTeX RDF |
|
| 1 | Hengliang Zhu, Xuan Zeng, Xu Luo, Wei Cai |
Generalized Stochastic Collocation Method for Variation-Aware Capacitance Extraction of Interconnects Considering Arbitrary Random Probability. |
IEICE Transactions |
2009 |
DBLP BibTeX RDF |
|
| 1 | Qiang Fu, Wai-Shing Luk, Jun Tao, Xuan Zeng, Wei Cai |
Intra-Die Spatial Correlation Extraction with Maximum Likelihood Estimation Method for Multiple Test Chips. |
IEICE Transactions |
2009 |
DBLP BibTeX RDF |
|
| 1 | Xu Luo, Fan Yang, Xuan Zeng, Jun Tao, Hengliang Zhu, Wei Cai |
A Modified Nested Sparse Grid Based Adaptive Stochastic Collocation Method for Statistical Static Timing Analysis. |
IEICE Transactions |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yinghai Lu, Hai Zhou, Li Shang, Xuan Zeng |
Multicore parallel min-cost flow algorithm for CAD applications. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
min-cost flow, parallel programming, multicore |
| 1 | Chunyang Feng, Hai Zhou, Changhao Yan, Jun Tao, Xuan Zeng |
Provably good and practically efficient algorithms for CMP dummy fill. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
covering linear programming, dummy fill problem, design for manufacturability |
| 1 | Yinghai Lu, Li Shang, Hai Zhou, Hengliang Zhu, Fan Yang, Xuan Zeng |
Statistical reliability analysis under process variation and aging effects. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
process variations, yield, NBTI |
| 1 | Duo Li, Sheldon X.-D. Tan, Gengsheng Chen, Xuan Zeng |
Statistical analysis of on-chip power grid networks by variational extended truncated balanced realization method. |
ASP-DAC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Tracey Y. Zhou, Dian Zhou, Xuan Zeng |
Incremental Circuit Simulation Analysis for Design Modification and Verification. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhenyu Tu, Xuan Zeng |
The Study on the Electric Network Planning Problem Based on the Ant Colony-Simulated Annealing Algorithm. |
WGEC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Min Gong, Hai Zhou, Jun Tao, Xuan Zeng |
Binning optimization based on SSTA for transparently-latched circuits. |
ICCAD |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yi Wang, Xuan Zeng, Jun Tao, Hengliang Zhu, Wei Cai |
Adaptive Stochastic Collocation Method for Parameterized Statistical Timing Analysis with Quadratic Delay Model. |
IEICE Transactions |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng |
Model Order Reduction of Parameterized Interconnect Networks via a Two-Directional Arnoldi Process. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Qiang Fu, Wai-Shing Luk, Jun Tao, Changhao Yan, Xuan Zeng |
Characterizing Intra-Die Spatial Correlation Using Spectral Density Method. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
intra-die variation, spectral domain, spectral density, spatial correlation |
| 1 | Yi Wang, Xuan Zeng, Jun Tao, Hengliang Zhu, Xu Luo, Changhao Yan, Wei Cai |
Adaptive Stochastic Collocation Method (ASCM) for Parameterized Statistical Timing Analysis with Quadratic Delay Model. |
ISQED |
2008 |
DBLP DOI BibTeX RDF |
adaptive stochastic collocation method, max, process variations, statistical static timing analysis |
| 1 | Yi Wang, Wai-Shing Luk, Xuan Zeng, Jun Tao, Changhao Yan, Jiarong Tong, Wei Cai, Jia Ni |
Timing yield driven clock skew scheduling considering non-Gaussian distributions of critical path delays. |
DAC |
2008 |
DBLP DOI BibTeX RDF |
non-Gaussian, process variations, yield, clock skew scheduling |
| 1 | Ming-e Jing, Yue Hao, Dian Zhou, Xuan Zeng |
A Novel Optimization Method for Parametric Yield: Uniform Design Mapping Distance Algorithm. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Tao, Xuan Zeng, Wei Cai, Yangfeng Su, Dian Zhou, Charles Chiang |
Stochastic Sparse-grid Collocation Algorithm (SSCA) for Periodic Steady-State Analysis of Nonlinear System with Process Variations. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Peng Zhang, Wai-Shing Luk, Yu Song, Jiarong Tong, Pushan Tang, Xuan Zeng |
WCOMP: Waveform Comparison Tool for Mixed-signal Validation Regression in Memory Design. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
Flash memory design, WCOMP, waveform comparison tool, full-chip validation, design cost, automated mixed-signal validation regression, functional match, time-to-market |
| 1 | Xuexin Liu, Wai-Shing Luk, Yu Song, Pushan Tang, Xuan Zeng |
Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic. |
ASP-DAC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hengliang Zhu, Xuan Zeng, Wei Cai, Jintao Xue, Dian Zhou |
A sparse grid based spectral stochastic collocation method for variations-aware capacitance extraction of interconnects under nanometer process technology. |
DATE |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Fan Yang, Xuan Zeng, Yangfeng Su, Dian Zhou |
RLCSYN: RLC Equivalent Circuit Synthesis for Structure-Preserved Reduced-order Model of Interconnect. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yung-Ta Li, Zhaojun Bai, Yangfeng Su, Xuan Zeng |
Parameterized model order reduction via a two-directional Arnoldi process. |
ICCAD |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Hengliang Zhu, Xuan Zeng, Wei Cai, Dian Zhou |
A Spectral Stochastic Collocation Method for Capacitance Extraction of Interconnects with Process Variations. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuan Zeng, Lihong Feng, Yangfeng Su, Wei Cai, Dian Zhou, Charles Chiang |
Time domain model order reduction by wavelet collocation method. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Tao, Xuan Zeng, Fan Yang, Yangfeng Su, Lihong Feng, Wei Cai, Dian Zhou, Charles Chiang |
A one-shot projection method for interconnects with process variations. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng |
Power-optimal simultaneous buffer insertion/sizing and wire sizing for two-pin nets. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Bang Liu, Xuan Zeng, Yangfeng Su, Jun Tao, Zhaojun Bai, Charles Chiang, Dian Zhou |
Block SAPOR: block Second-order Arnoldi method for Passive Order Reduction of multi-input multi-output RCS interconnect circuits. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuan Zeng, Bang Liu, Jun Tao, Charles Chiang, Dian Zhou |
A novel wavelet method for noise analysis of nonlinear circuits. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng |
Power-optimal simultaneous buffer insertion/sizing and uniform wire sizing for single long wires. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Jian Wang, Jun Tao, Xuan Zeng, Charles Chiang, Dian Zhou |
Analog circuit behavioral modeling via wavelet collocation method with auto-companding. |
ASP-DAC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Lihong Feng, Xuan Zeng, Charles Chiang, Dian Zhou, Qiang Fang |
Direct Nonlinear Order Reduction with Variational Analysis. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Xin Zhou, Dian Zhou, Jin Liu, Ruiming Li, Xuan Zeng, Charles Chiang |
Steady-State Analysis of Nonlinear Circuits Using Discrete Singular Convolution Method. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Jian Wang, Xuan Zeng, Wei Cai, Charles Chiang, Jiarong Tong, Dian Zhou |
Frequency domain wavelet method with GMRES for large-scale linear circuit simulation. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Lihong Feng, Xuan Zeng, Jiarong Tong, Charles Chiang, Dian Zhou |
Two-sided projection method in variational equation model order reduction of nonlinear circuits. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Yangfeng Su, Jian Wang, Xuan Zeng, Zhaojun Bai, Charles Chiang, Dian Zhou |
SAPOR: second-order Arnoldi method for passive order reduction of RCS circuits. |
ICCAD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuan Zeng, Sheng Huang, Yangfeng Su, Dian Zhou |
An efficient Sylvester equation solver for time domain circuit simulation by wavelet collocation method. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuan Zeng, Jun Tao, Yangfeng Su, Wenbing Chen, Dian Zhou |
An error distribution based nonlinear companding method for analog behavioral modeling via wavelet approximation. |
ISCAS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Ruiming Li, Dian Zhou, Jin Liu, Xuan Zeng |
Power-Optimal Simultaneous Buffer Insertion/Sizing and Wire Sizing. |
ICCAD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling |
Wavelet method for high-speed clock tree simulation. |
ISCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Xin Li, Bo Hu, Xieting Ling, Xuan Zeng |
A wavelet balance approach for steady-state analysis of nonlinear circuits. |
ISCAS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Xin Li, Xuan Zeng, Dian Zhou, Xieting Ling |
Behavioral Modeling of Analog Circuits by Wavelet Collocation Method. |
ICCAD |
2001 |
DBLP BibTeX RDF |
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