|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 22 occurrences of 18 keywords
|
|
|
|
|
Results
Found 22 publication records. Showing 22 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Jiying Xue, Yangdong Deng, Zuochang Ye, Hongrui Wang, Liu Yang, Zhiping Yu |
A Framework for Layout-Dependent STI Stress Analysis and Stress-Aware Circuit Optimization.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Hao Qian, Yangdong Deng, Bo D. Wang, Shuai Mu |
Towards accelerating irregular EDA applications with GPUs. |
Integration |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Guanyi Sun, Shengnan Xu, Xu Wang, Dawei Wang, Eugene Tang, Yangdong Deng, Sun Chan |
A High-Throughput, High-Accuracy System-Level Simulation Framework for System on Chips. |
VLSI Design |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuhao Zhu, Bo D. Wang, Yangdong Deng |
Massively Parallel Logic Simulation with GPUs. |
ACM Trans. Design Autom. Electr. Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yuhao Zhu, Yangdong Deng, Yubei Chen |
Hermes: an integrated CPU/GPU microarchitecture for IP routing. |
DAC |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jin Zhao, Xinya Zhang, Xin Wang 0002, Yangdong Deng, Xiaoming Fu |
Exploiting graphics processors for high-performance IP lookup in software routers. |
INFOCOM |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Shuai Mu, Chenxi Wang, Ming Liu, Dongdong Li, Maohua Zhu, Xiaoliang Chen, Xiang Xie, Yangdong Deng |
Evaluating the potential of graphics processors for high performance embedded computing. |
DATE |
2011 |
DBLP BibTeX RDF |
|
| 1 | Hao Qian, Yangdong Deng |
Accelerating RTL simulation with GPUs. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiying Xue, Tao Li, Yangdong Deng, Zhiping Yu |
Full-chip leakage analysis for 65 nm CMOS technology and beyond. |
Integration |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Bo D. Wang, Yuhao Zhu, Yangdong Deng |
Distributed time, conservative parallel logic simulation on GPUs. |
DAC |
2010 |
DBLP DOI BibTeX RDF |
CMB algorithm, gate-level simulation, GPU, discrete event simulation |
| 1 | Jiying Xue, Xiaomeng Jiao, Yangdong Deng, Hao Qian, Dajie Zeng, Guoyu Li, Zhiping Yu |
Massively Parallel Finite Element Simulator for Full-Chip STI Stress Analysis. |
CIT |
2010 |
DBLP DOI BibTeX RDF |
STI stress, parallel, GPU, CUDA, FEM |
| 1 | Yangdong Steve Deng |
GPU Accelerated VLSI Design Verification. |
CIT |
2010 |
DBLP DOI BibTeX RDF |
Simulation, Verification, VLSI, GPU, Timing analysis, SAT |
| 1 | Shuai Mu, Xinya Zhang, Nairen Zhang, Jiaxin Lu, Yangdong Steve Deng, Shu Zhang |
IP routing processing with graphic processors. |
DATE |
2010 |
DBLP BibTeX RDF |
|
| 1 | Jiying Xue, Zuochang Ye, Yangdong Deng, Hongrui Wang, Liu Yang, Zhiping Yu |
Layout-dependent STI stress analysis and stress-aware RF/analog circuit design optimization. |
ICCAD |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yangdong Deng, Bo D. Wang, Shuai Mu |
Taming irregular EDA applications on GPUs. |
ICCAD |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yangdong Deng, Peng Li |
Temperature-Aware Floorplanning of 3-D ICs Considering Thermally Dependent Leakage Power. |
J. Low Power Electronics |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yangdong Deng, W. P. Maly |
2.5-dimensional VLSI system integration. |
IEEE Trans. VLSI Syst. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Peng Li, Yangdong Deng, Lawrence T. Pileggi |
Temperature-Dependent Optimization of Cache Leakage Power Dissipation. |
ICCD |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yangdong Steve Deng, Wojciech Maly |
2.5D system integration: a design driven system implementation schema. |
ASP-DAC |
2004 |
DBLP DOI BibTeX RDF |
2.5D System Integration, 3D stacking, 3D-IC |
| 1 | Yangdong Deng, Wojciech Maly |
Physical Design of the "2.5D" Stacked System. |
ICCD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Jingcao Hu, Yangdong Deng, Radu Marculescu |
System-Level Point-to-Point Communication Synthesis using Floorplanning Information. |
VLSI Design |
2002 |
DBLP DOI BibTeX RDF |
System-leve design, low-power, floorplanning, Communication synthesis, point-to-point communication |
| 1 | Yangdong Deng, Wojciech Maly |
Interconnect characteristics of 2.5-D system integration scheme. |
ISPD |
2001 |
DBLP DOI BibTeX RDF |
2.5-D system integration, bounded sliceline grid, VLSI, partition, placement, floorplanning, wirelength |
Displaying result #1 - #22 of 22 (100 per page; Change: )
|
|
![[Valid RSS]](Pics/valid-rss.png "Validate my RSS feed")