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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 13 occurrences of 13 keywords
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Results
Found 20 publication records. Showing 20 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yibin Ye, Stefano Squartini, Francesco Piazza |
On-Line Extreme Learning Machine for Training Time-Varying Neural Networks.  |
ICIC  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Yibin Ye, Stefano Squartini, Francesco Piazza |
ELM-Based Time-Variant Neural Networks with Incremental Number of Output Basis Functions.  |
ISNN  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Yibin Ye, Stefano Squartini, Francesco Piazza |
ELM-based Algorithms for Nonstationary Volterra System Identification.  |
WIRN  |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yibin Ye, Stefano Squartini, Francesco Piazza |
Incremental-Based Extreme Learning Machine Algorithms for Time-Variant Neural Networks.  |
ICIC  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Yibin Ye, Stefano Squartini, Francesco Piazza |
A Group Selection Evolutionary Extreme Learning Machine approach for Time-Variant Neural Networks.  |
WIRN  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Zhigeng Pan, Huansen Li, Mingmin Zhang, Yibin Ye, Xi Cheng, Alvin Tang, Ruigang Yang |
Photo Realistic 3D Cartoon Face Modeling Based on Active Shape Model.  |
T. Edutainment  |
2009 |
DBLP DOI BibTeX RDF |
Cartoon deformation, 3D human face modeling, Feature detection |
| 1 | Yibin Ye, Mingmin Zhang, Huansen Li, Ruiying Jiang, Xing Tang, Zhigeng Pan |
EasyFace: a realistic face modeling and facial animation authoring system.  |
VRCAI  |
2009 |
DBLP DOI BibTeX RDF |
facial animation, face modeling, mesh deformation, facial feature detection |
| 1 | Maged Ghoneima, Muhammad M. Khellah, James Tschanz, Yibin Ye, Nasser Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail, Vivek K. De |
Skewed Repeater Bus: A Low-Power Scheme for On-Chip Buses.  |
IEEE Trans. on Circuits and Systems  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Yibin Ye, Muhammad M. Khellah, Dinesh Somasekhar, Vivek De |
Evaluation of differential vs. single-ended sensing and asymmetric cells in 90 nm logic technology for on-chip caches.  |
ISCAS  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Yehea I. Ismail, Muhammad M. Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Vivek De |
Skewing adjacent line repeaters to reduce the delay and energy dissipation of on-chip buses.  |
ISCAS  |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Muhammad M. Khellah, Maged Ghoneima, James Tschanz, Yibin Ye, Nasser Kurd, Javed Barkatullah, Srikanth Nimmagadda, Yehea I. Ismail |
A Skewed Repeater Bus Architecture for On-Chip Energy Reduction in Microprocessors.  |
ICCD  |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Arman Vassighi, Ali Keshavarzi, Siva Narendra, Gerhard Schrom, Yibin Ye, Seri Lee, Greg Chrysler, Manoj Sachdev, Vivek De |
Design optimizations for microprocessors at low temperature.  |
DAC  |
2004 |
DBLP DOI BibTeX RDF |
electrothermal modeling, low temperature, refrigeration, power, microprocessor, CMOS, frequency, cooling |
| 1 | Fatih Hamzaoglu, Yibin Ye, Ali Keshavarzi, Kevin Zhang, Siva Narendra, Shekhar Borkar, Mircea R. Stan, Vivek De |
Analysis of dual-VT SRAM cells with full-swing single-ended bit line sensing for on-chip cache.  |
IEEE Trans. VLSI Syst.  |
2002 |
DBLP DOI BibTeX RDF |
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| 1 | Tanay Karnik, Yibin Ye, James Tschanz, Liqiong Wei, Steven M. Burns, Venkatesh Govindarajulu, Vivek De, Shekhar Borkar |
Total power optimization by simultaneous dual-Vt allocation and device sizing in high performance microprocessors.  |
DAC  |
2002 |
DBLP DOI BibTeX RDF |
Dual-Vt design, multiple threshold, optimization, sizing |
| 1 | Dinesh Somasekhar, Seung Hoon Choi, Kaushik Roy, Yibin Ye, Vivek De |
Dynamic noise analysis in precharge-evaluate circuits.  |
DAC  |
2000 |
DBLP DOI BibTeX RDF |
SPICE |
| 1 | Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De |
Design and optimization of dual-threshold circuits for low-voltage low-power applications.  |
IEEE Trans. VLSI Syst.  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Liqiong Wei, Zhanping Chen, Kaushik Roy, Yibin Ye, Vivek De |
Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Power Applications.  |
DAC  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Yibin Ye, Kaushik Roy, Rolf Drechsler |
Power Consumption in XOR-Based Circuits.  |
ASP-DAC  |
1999 |
DBLP DOI BibTeX RDF |
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| 1 | Yibin Ye, Kaushik Roy, Georgios I. Stamoulis |
Quasi-static energy recovery logic and supply-clock generation circuits.  |
ISLPED  |
1997 |
DBLP DOI BibTeX RDF |
|
| 1 | Yibin Ye, Kaushik Roy |
A Graph-Based Synthesis Algorithm for AND/XOR Networks.  |
DAC  |
1997 |
DBLP DOI BibTeX RDF |
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