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Searching for phrase Yifan Liu (changed automatically) with no syntactic query expansion in authors only.

Publication years (Num. hits)
2004 (1) 2008 (5) 2009 (2) 2010 (3)
Publication types (Num. hits)
article(4) inproceedings(7)
Venues (Conferences, Journals, ...)
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The graphs summarize 7 occurrences of 6 keywords

Results
Found 11 publication records. Showing 11 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
2Yifan Liu, Lawrence M. Wein A Queueing Analysis to Determine How Many Additional Beds Are Needed for the Detention and Removal of Illegal Aliens. Search with DBLP WebCrawler Search on Bibsonomy Management Science The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
2Yifan Liu, Zheng Su Generalized Rayleigh Quotient Shift Strategy in QR Algorithm for Eigenvalue Problems. Search with DBLP WebCrawler Search on Bibsonomy NAA The full citation details ... 2004 DBLP  DOI  BibTeX  RDF
1Daniel K. Beece, Jinjun Xiong, Chandu Visweswariah, Vladimir Zolotov, Yifang Liu Transistor sizing of custom high-performance digital circuits with parametric yield considerations. Search with DBLP WebCrawler Search on Bibsonomy DAC The full citation details ... 2010 DBLP  DOI  BibTeX  RDF custom circuits, optimization
1Venkata Rajesh Mekala, Yifang Liu, Xiaoji Ye, Jiang Hu, Peng Li Accurate clock mesh sizing via sequential quadraticprogramming. Search with DBLP WebCrawler Search on Bibsonomy ISPD The full citation details ... 2010 DBLP  DOI  BibTeX  RDF optimization, sequential quadratic programming
1Yifang Liu, Jiang Hu A New Algorithm for Simultaneous Gate Sizing and Threshold Voltage Assignment. Search with DBLP WebCrawler Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Yifang Liu, Jiang Hu GPU-based parallelization for fast circuit optimization. Search with DBLP WebCrawler Search on Bibsonomy DAC The full citation details ... 2009 DBLP  DOI  BibTeX  RDF VLSI circuit optimization, parallel computing, GPU
1Yifang Liu, Jiang Hu A new algorithm for simultaneous gate sizing and threshold voltage assignment. Search with DBLP WebCrawler Search on Bibsonomy ISPD The full citation details ... 2009 DBLP  DOI  BibTeX  RDF threshold voltage assignment, gate sizing
1Yifang Liu, Rupesh S. Shelar, Jiang Hu Delay-optimal simultaneous technology mapping and placement with applications to timing optimization. Search with DBLP WebCrawler Search on Bibsonomy ICCAD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Yifang Liu, Jiang Hu, Weiping Shi Multi-scenario buffer insertion in multi-core processor designs. Search with DBLP WebCrawler Search on Bibsonomy ISPD The full citation details ... 2008 DBLP  DOI  BibTeX  RDF multi-core design, buffer insertion
1Yifang Liu, Jiang Hu, Weiping Shi Buffering Interconnect for Multicore Processor Designs. Search with DBLP WebCrawler Search on Bibsonomy IEEE Trans. on CAD of Integrated Circuits and Systems The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
1Jiquan Zhou, Xiangli Liu, Xiaozhong Yang, Yifang Liu Novel soliton-like and multi-solitary wave solutions of (3 + 1)-dimensional Burgers equation. Search with DBLP WebCrawler Search on Bibsonomy Applied Mathematics and Computation The full citation details ... 2008 DBLP  DOI  BibTeX  RDF
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