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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 17 occurrences of 13 keywords
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Results
Found 23 publication records. Showing 23 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Zheng Li, Moustafa Mohamed, Xi Chen, Eric Dudley, Ke Meng, Li Shang, Alan Rolf Mickelson, Russ Joseph, Manish Vachharajani, Brian Schwartz, Yihe Sun |
Reliability Modeling and Management of Nanophotonic On-Chip Networks.  |
IEEE Trans. VLSI Syst.  |
2012 |
DBLP DOI BibTeX RDF |
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| 1 | Junli Gu, Yihe Sun, Steven S. Lumetta, Rakesh Kumar |
MOPED: Accelerating Data Communication on Future CMPs. |
IEEE Micro |
2011 |
DBLP DOI BibTeX RDF |
data communication, Multicore architecture, cache hierarchy |
| 1 | Junli Gu, Steven S. Lumetta, Rakesh Kumar, Yihe Sun |
MOPED: Orchestrating interprocess message data on CMPs. |
HPCA |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Zheng Li, Moustafa Mohamed, Hongyu Zhou, Li Shang, Alan Rolf Mickelson, Dejan Filipovic, Manish Vachharajani, Wounjhang Park, Yihe Sun |
Global On-Chip Coordination at Light Speed. |
IEEE Design & Test of Computers |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Bo Yu, Terrence S. T. Mak, Xiangyu Li, Fei Xia, Alexandre Yakovlev, Yihe Sun, Chi-Sang Poon |
A Reconfigurable Hebbian Eigenfilter for Neurophysiological Spike Train Analysis. |
FPL |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Moustafa Mohamed, Zheng Li, Xi Chen, Li Shang, Alan Rolf Mickelson, Manish Vachharajani, Yihe Sun |
Power-efficient variation-aware photonic on-chip network management. |
ISLPED |
2010 |
DBLP DOI BibTeX RDF |
networks on chip, optical interconnects, nanophotonics |
| 1 | Yang Xu, Hu He, Yihe Sun |
A Novel Low Energy Scheduling Algorithm for Clustered Very Long Instruction Word Architectures. |
J. Low Power Electronics |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Zheng Li, Jie Wu, Li Shang, Alan Rolf Mickelson, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, Yihe Sun |
A high-performance low-power nanophotonic on-chip network. |
ISLPED |
2009 |
DBLP DOI BibTeX RDF |
networks-on-chip, optical communication, silicon photonics |
| 1 | Zheng Shen, Hu He, Yihe Sun |
Simultaneous Multithreading VLIW DSP Architecture with Dynamic Dispatch Mechanism. |
DSD |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Zheng Li, Dan Fay, Alan Rolf Mickelson, Li Shang, Manish Vachharajani, Dejan Filipovic, Wounjhang Park, Yihe Sun |
Spectrum: a hybrid nanophotonic-electric on-chip network. |
DAC |
2009 |
DBLP DOI BibTeX RDF |
Networks-on-Chip, optical communication, silicon photonics |
| 1 | Zheng Li, Jie Wu, Li Shang, Robert P. Dick, Yihe Sun |
Latency criticality aware on-chip communication. |
DATE |
2009 |
DBLP BibTeX RDF |
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| 1 | Zheng Li, Changyun Zhu, Li Shang, Robert P. Dick, Yihe Sun |
Transaction-Aware Network-on-Chip Resource Reservation. |
Computer Architecture Letters |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Adriel Cheng, Cheng-Chew Lim, Yihe Sun, Hu He, Zhixiong Zhou, Ting Lei |
Using Genetic Evolutionary Software Application Testing to Verify a DSP SoC. |
DELTA |
2008 |
DBLP DOI BibTeX RDF |
SoC system testing, genetic and evolutionary algorithm, design verification |
| 1 | Yang Xu, Hu He, Zhou Zhixiong, Yanjun Zhang, Yihe Sun |
Heuristic on a Novel Power Management System Cooperating with Compiler. |
J. Low Power Electronics |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Zheng Shen, Hu He, Yanjun Zhang, Yihe Sun |
A Video Specific Instruction Set Architecture for ASIP design. |
VLSI Design |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Zhixiong Zhou, Hu He, Yanjun Zhang, Yihe Sun, Adriel Cheng |
A 2-Dimension Force-Directed Scheduling Algorithm for Register-File-Connectivity Clustered VLIW Architecture. |
ASAP |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Zhou Zhixiong, Yang Xu, He Hu 0002, Yihe Sun |
A Retargetable Compiler of VLIW ASIP for Media Signal Processing. |
ESA |
2006 |
DBLP BibTeX RDF |
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| 1 | Zheng Shen, Hu He, Yanjun Zhang, Yihe Sun |
VS-ISA: A Video Specific Instruction Set Architecture for ASIP Design. |
IIH-MSP |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Yanjun Zhang, Hu He, Yihe Sun |
A new register file access architecture for software pipelining in VLIW processors. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
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| 1 | Xingjun Wu, Hongyi Chen, Yihe Sun, Weixin Gai |
A Fully-Pipeline Linear Systolic Architecture for Modular Multiplier in Public-Key Crypto-Systems. |
VLSI Signal Processing |
2003 |
DBLP DOI BibTeX RDF |
public-key crypto-system, systolic array, modular-multiplication, pipeline architecture, modular-exponentiation |
| 1 | He Hu 0002, Yihe Sun |
Test-Point Selection Algorithm Using Small Signal Model for Scan-Based BIST. |
Asian Test Symposium |
2003 |
DBLP DOI BibTeX RDF |
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| 1 | Ke Jiang, Yihe Sun |
An Optimizing Search Method of Systolic Array Design. |
IASTED PDCS |
2002 |
DBLP BibTeX RDF |
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| 1 | Lei Xu, Yihe Sun, Hongyi Chen |
Scan array solution for testing power and testing time. |
ITC |
2001 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #23 of 23 (100 per page; Change: )
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