Search results for "Yintang Yang"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Libo Qian, Zhangming Zhu, Yintang Yang	Through-silicon-via insertion for performance optimization in three-dimensional integrated circuits.	Microelectronics Journal	2012	DBLP DOI BibTeX RDF
1	BaoXing Duan, YinTang Yang	Breakdown voltage analysis for the new RESURF AlGaN/GaN HEMTs.	SCIENCE CHINA Information Sciences	2012	DBLP DOI BibTeX RDF
1	Xiang Gao, Yintang Yang, Duan Zhou, Jianxian Zhang, Changchun Chai	Target Tracking Approximation Algorithms with Particle Filter Optimization and Fault-Tolerant Analysis in Wireless Sensor Networks.	JNW	2012	DBLP DOI BibTeX RDF
1	Feiyang Liu, Huaxi Gu, Yintang Yang	DTBR: A dynamic thermal-balance routing algorithm for Network-on-Chip.	Computers & Electrical Engineering	2012	DBLP DOI BibTeX RDF
1	Xingyuan Tong, Yintang Yang, Zhangming Zhu, Lianxi Liu	Novel hybrid D/A structures for high-resolution SAR ADCs - analysis, modeling and realization.	Microelectronics Journal	2011	DBLP DOI BibTeX RDF
1	BaoXing Duan, YinTang Yang	Strain coefficient measurement for the (100) uniaxial strain silicon by Raman spectroscopy.	SCIENCE CHINA Information Sciences	2011	DBLP DOI BibTeX RDF
1	Jing Zhang, Huaxi Gu, Yintang Yang	An improved distributed routing algorithm for Benes based optical NoC	CoRR	2011	DBLP BibTeX RDF
1	Junhui Wang, Huaxi Gu, Yintang Yang, Zhi Deng	An Efficient Bee Behavior-Based Multi-function Routing Algorithm for Network-on-Chip.	ICSI	2011	DBLP DOI BibTeX RDF
1	Xuguang Guan, Zhangming Zhu, Duan Zhou, Yintang Yang	High Speed Multi-Resource Arbiter with Active Virtual Channel Allocation for Network on Chips.	Journal of Circuits, Systems, and Computers	2010	DBLP DOI BibTeX RDF
1	Shan Chen, Xingyuan Tong, Naiqiong Cai, Yintang Yang	A 12-bit 1MS/s Non-calibrating SAR A/D Converter Based on 90nm CMOS Process.	MVHI	2010	DBLP DOI BibTeX RDF	single-ended, non-calibrating, finger capacitors, small area, SAR, analog-to-digital converter
1	Xuguang Guan, Yu Liu, Yintang Yang	Performance Analysis of Low Power Null Convention Logic Units with Power Cutoff.	APWCS	2010	DBLP DOI BibTeX RDF	power cutoff, low power, asynchronous circuits, threshold gates, null convention logic
1	Yu Liu, Xuguang Guan, Yang Yang, Yintang Yang	An asynchronous low latency ordered arbiter for network on chips.	ICNC	2010	DBLP DOI BibTeX RDF
1	Xuguang Guan, Duan Zhou, Dan Wang, Yintang Yang, Zhangming Zhu	A Novel GALS Single-Track Protocol Asynchronous Communication Circuits.	PACCS	2009	DBLP DOI BibTeX RDF
1	Xingyuan Tong, Zhangming Zhu, Yintang Yang	Low-power Capacitor Arrays for Charge Redistribution SAR A-D Converter in 65nm CMOS.	PACCS	2009	DBLP DOI BibTeX RDF
1	Xuguang Guan, Duan Zhou, Yintang Yang, Zhangming Zhu	A GALS Delay-insensitive Self-timed Wrapper for Network on Chips.	PACCS	2009	DBLP DOI BibTeX RDF
1	Xingyuan Tong, Yintang Yang, Zhangming Zhu, Yan Xiao, Jianming Chen	A Novel R-C Combination Based Pseudo-differential SAR A/D Converter in 90nm CMOS Process.	PACCS	2009	DBLP DOI BibTeX RDF
1	Libo Qian, Zhangming Zhu, Yintang Yang	A Low Distortion CMOS Bootstrapped Switch.	PACCS	2009	DBLP DOI BibTeX RDF
1	ZhenYu Wu, YinTang Yang, ChangChun Chai, YueJin Li, JiaYou Wang, Jing Liu, Bin Liu	Temperature-dependent stress-induced voiding in dual-damascene Cu interconnects.	Microelectronics Reliability	2008	DBLP DOI BibTeX RDF
1	Haixia Gao, Yintang Yang, Xiaohua Ma, Gang Dong	Testing for Resistive Shorts in FPGA Interconnects.	ISQED	2005	DBLP DOI BibTeX RDF
1	Haixia Gao, Yintang Yang, Xiaohua Ma, Gang Dong	Analysis of the Effect of LUT Size on FPGA Area and Delay Using Theoretical Derivations.	ISQED	2005	DBLP DOI BibTeX RDF
1	Qungang Ma, Yuejin Li, Yintang Yang	Study of swing potential on deep submicron on-chip interconnect.	Microelectronics Reliability	2004	DBLP DOI BibTeX RDF

Publications of "Yintang Yang" ( http://dblp.L3S.de/Authors/Yintang_Yang )