| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Eric Love, Yier Jin, Yiorgos Makris |
Proof-Carrying Hardware Intellectual Property: A Pathway to Trusted Module Acquisition.  |
IEEE Transactions on Information Forensics and Security  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Nathan Kupp, Yiorgos Makris |
Applying the Model-View-Controller Paradigm to Adaptive Test. |
IEEE Design & Test of Computers |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yier Jin, Dzmitry Maliuk, Yiorgos Makris |
Post-deployment trust evaluation in wireless cryptographic ICs. |
DATE |
2012 |
DBLP BibTeX RDF |
|
| 1 | Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
instruction-level error, microprocessor controller, Fault simulation, concurrent error detection |
| 1 | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Chandra Tirumurti, Yiorgos Makris |
Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
scheduler, microprocessor, invariance, Concurrent error detection |
| 1 | Alfredo Benso, Yiorgos Makris, Pinaki Mazumder |
Guest Editors' Introduction: Special Section on Chips and Architectures for Emerging Technologies and Applications. |
IEEE Trans. Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Nathan Kupp, He Huang, Yiorgos Makris, Petros Drineas |
Improving Analog and RF Device Yield through Performance Calibration. |
IEEE Design & Test of Computers |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
AVF Analysis Acceleration via Hierarchical Fault Pruning. |
European Test Symposium |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Michail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer |
Exponent monitoring for low-cost concurrent error detection in FPU control logic. |
VTS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Eric Love, Yier Jin, Yiorgos Makris |
Enhancing security via provably trustworthy hardware intellectual property. |
HOST |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Nathan Kupp, Mustapha Slamani, Yiorgos Makris |
Correlating inline data with final test outcomes in analog/RF devices. |
DATE |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yier Jin, Yiorgos Makris |
PSCML: Pseudo-Static Current Mode Logic. |
ICECS |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Nathan Kupp, Haralampos-G. D. Stratigopoulos, Petros Drineas, Yiorgos Makris |
On proving the efficiency of alternative RF tests. |
ICCAD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yier Jin, Yiorgos Makris |
Is single-scheme Trojan prevention sufficient? |
ICCD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris |
RF Specification Test Compaction Using Learning Machines. |
IEEE Trans. VLSI Syst. |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yier Jin, Yiorgos Makris |
Hardware Trojans in Wireless Cryptographic ICs. |
IEEE Design & Test of Computers |
2010 |
DBLP DOI BibTeX RDF |
hardware Trojan, wireless cryptographic IC, statistical analysis, design and test |
| 1 | Nathan Kupp, He Huang, Petros Drineas, Yiorgos Makris |
Post-production performance calibration in analog/RF devices. |
ITC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, He Huang, Yiorgos Makris |
Analog neural network design for RF built-in self-test. |
ITC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Michail Maniatakos, Yiorgos Makris |
Workload-driven selective hardening of control state elements in modern microprocessors. |
VTS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yier Jin, Nathan Kupp, Yiorgos Makris |
DFTT: Design for Trojan Test. |
ICECS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits. |
IOLTS |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Shi, Yiorgos Makris |
Enhancing Simulation Accuracy through Advanced Hazard Detection in Asynchronous Circuits. |
IEEE Trans. Computers |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Feng Shi, Eric Love, Yiorgos Makris |
Soft-Error Tolerance and Mitigation in Asynchronous Burst-Mode Circuits. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Nathan Kupp, Petros Drineas, Mustapha Slamani, Yiorgos Makris |
On Boosting the Accuracy of Non-RF to RF Correlation-Based Specification Test Compaction. |
J. Electronic Testing |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yiorgos Makris, Haralampos-G. D. Stratigopoulos |
Special Session 7C: TTTC 2009 Best Doctoral Thesis Contest. |
VTS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Instruction-Level Impact Comparison of RT- vs. Gate-Level Faults in a Modern Microprocessor Controller. |
VTS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Yier Jin, Nathan Kupp, Yiorgos Makris |
Experiences in Hardware Trojan Design and Implementation. |
HOST |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris |
Enrichment of limited training sets in machine-learning-based analog/RF test. |
DATE |
2009 |
DBLP BibTeX RDF |
|
| 1 | Yiorgos Makris |
Workload-Cognizant Impact Analysis and its Applications in Error Detection and Tolerance in Modern Microprocessors. |
DFT |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Naghmeh Karimi, Michail Maniatakos, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris |
Impact analysis of performance faults in modern microprocessors. |
ICCD |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Yiorgos Makris |
Soft Error Mitigation Through Selective Addition of Functionally Redundant Wires. |
IEEE Transactions on Reliability |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
Error Moderation in Low-Cost Machine-Learning-Based Analog/RF Testing. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Yiorgos Makris |
On the Correlation between Controller Faults and Instruction-Level Errors in Modern Microprocessors. |
ITC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Nathan Kupp, Petros Drineas, Mustapha Slamani, Yiorgos Makris |
Confidence Estimation in Non-RF to RF Correlation-Based Specification Test Compaction. |
European Test Symposium |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | James Dardig, Haralampos-G. D. Stratigopoulos, Eric Stern, Mark Reed, Yiorgos Makris |
A Statistical Approach to Characterizing and Testing Functionalized Nanowires. |
VTS |
2008 |
DBLP DOI BibTeX RDF |
testing, statistical analysis, nanowires |
| 1 | Yier Jin, Yiorgos Makris |
Hardware Trojan Detection Using Path Delay Fingerprint. |
HOST |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti |
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris |
On the Minimization of Potential Transient Errors and SER in Logic Circuits Using SPFD. |
IOLTS |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Yiorgos Makris |
Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines. |
IEEE Trans. Computers |
2007 |
DBLP DOI BibTeX RDF |
asynchronous burst-mode machines, error-detecting codes, Concurrent error detection, Berger code |
| 1 | Yiorgos Makris, Alex Orailoglu |
On the identification of modular test requirements for low cost hierarchical test path construction. |
Integration |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris |
Non-RF to RF Test Correlation Using Learning Machines: A Case Study. |
VTS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
Concurrent detection of erroneous responses in linear analog circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
Entropy-driven parity-tree selection for low-overhead concurrent error detection in finite state machines. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Yiorgos Makris, Yu-Shen Yang, Andreas G. Veneris |
Seamless Integration of SER in Rewiring-Based Design Space Exploration. |
ITC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Shi, Yiorgos Makris |
A Transistor-Level Test Strategy for C^2MOS MOUSETRAP Asynchronous Pipelines. |
ASYNC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Gennette Gill, Ankur Agiwal, Montek Singh, Feng Shi, Yiorgos Makris |
Low-Overhead Testing of Delay Faults in High-Speed Asynchronous Pipelines. |
ASYNC |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Andreas G. Veneris, Yiorgos Makris |
Session Abstract. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing. |
VTS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Yiorgos Makris |
Berger code-based concurrent error detection in asynchronous burst-mode machines. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Shi, Yiorgos Makris |
Testing delay faults in asynchronous handshake circuits. |
ICCAD |
2006 |
DBLP DOI BibTeX RDF |
test generation, asynchronous circuits, delay faults, handshake circuits |
| 1 | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
Compaction-based concurrent error detection for digital circuits. |
Microelectronics Journal |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
Nonlinear decision boundaries for testing analog circuits. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Shi, Yiorgos Makris, Steven M. Nowick, Montek Singh |
Test generation for ultra-high-speed asynchronous pipelines. |
ITC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
Generating decision regions in analog measurement spaces. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
implicit functional test, neural networks, analog circuits |
| 1 | Feng Shi, Yiorgos Makris |
SPIN-PAC: test compaction for speed-independent circuits. |
ASP-DAC |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
Constructive Derivation of Analog Specification Test Criteria. |
VTS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Yiorgos Makris |
Concurrent Error Detection in Asynchronous Burst-Mode Controllers. |
DATE |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu |
Enhancing reliability of RTL controller-datapath circuits via Invariant-based concurrent test. |
IEEE Transactions on Reliability |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
An Analog Checker with Input-Relative Tolerance for Duplicate Signals. |
J. Electronic Testing |
2004 |
DBLP DOI BibTeX RDF |
analog checkers, on-line test, analog test, concurrent test |
| 1 | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
Concurrent Error Detection for Combinational and Sequential Logic via Output Compaction. |
ISQED |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Shi, Yiorgos Makris |
SPIN-SIM: Logic and Fault Simulation for Speed-Independent Circuits. |
ITC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Shi, Yiorgos Makris |
Fault simulation and random test generation for speed-independent circuits. |
ACM Great Lakes Symposium on VLSI |
2004 |
DBLP DOI BibTeX RDF |
random test pattern generation, fault simulation, asynchronous circuits, speed-independent circuits |
| 1 | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
Cost-Driven Selection of Parity Trees. |
VTS |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
On Concurrent Error Detection with Bounded Latency in FSMs. |
DATE |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Shi, Yiorgos Makris |
SPIN-TEST: automatic test pattern generation for speed-independent circuits. |
ICCAD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Feng Shi, Sobeeh Almukhaizim, Pey-Chang Lin, Yiorgos Makris |
Compiler-Based Frame Formation for Static Optimization. |
ICCD |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Petros Drineas, Yiorgos Makris |
SPaRe: selective partial replication for concurrent fault-detection in FSMs. |
IEEE T. Instrumentation and Measurement |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Petros Drineas, Yiorgos Makris |
Concurrent Fault Detection in Random Combinational Logic. |
ISQED |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
Concurrent Error Detection in Linear Analog Circuits Using State Estimation. |
ITC |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits. |
VTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Petros Drineas, Yiorgos Makris |
SPaRe: Selective Partial Replication for Concurrent Fault Detection in FSMs. |
VLSI Design |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Petros Drineas, Yiorgos Makris |
Non-Intrusive Concurrent Error Detection in FSMs through State/Output Compaction and Monitoring via Parity Trees. |
DATE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Yiorgos Makris |
Fault Tolerant Design of Combinational and Sequential Logic Based on a Parity Check Code. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Konstantinos Rokas, Yiorgos Makris, Dimitris Gizopoulos |
Low Cost Convolutional Code Based Concurrent Error Detection in FSMs. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Haralampos-G. D. Stratigopoulos, Yiorgos Makris |
An Analog Checker With Input-Relative Tolerance for Duplicate Signals. |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris |
On Compaction-Based Concurrent Error Detection. (PDF / PS) |
IOLTS |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Sobeeh Almukhaizim, Thomas Verdel, Yiorgos Makris |
Cost-Effective Graceful Degradation in Speculative Processor Subsystems: The Branch Prediction Case. |
ICCD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Petros Drineas, Yiorgos Makris |
Independent Test Sequence Compaction through Integer Programming. |
ICCD |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Jamison Collins, Alex Orailoglu |
Fast Hierarchical Test Path Construction for Circuits with DFT-Free Controller-Datapath Interface. |
J. Electronic Testing |
2002 |
DBLP DOI BibTeX RDF |
controller-datapath circuit, hierarchical test path, influence tables, transparency |
| 1 | Petros Drineas, Yiorgos Makris |
Non-Intrusive Design of Concurrently Self-Testable FSMs. |
Asian Test Symposium |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Alex Orailoglu |
Test Requirement Analysis for Low Cost Hierarchical Test Path Construction. |
Asian Test Symposium |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Thomas Verdel, Yiorgos Makris |
Duplication-Based Concurrent Error Detection in Asynchronous Circuits: Shortcomings and Remedies. (PDF / PS) |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Vishal Patel, Alex Orailoglu |
Efficient Transparency Extraction and Utilization in Hierarchical Test. |
VTS |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Jamison Collins, Alex Orailoglu |
Fast hierarchical test path construction for DFT-free controller-datapath circuits. |
Asian Test Symposium |
2000 |
DBLP DOI BibTeX RDF |
fast hierarchical test path construction, DFT-free controller-datapath circuits, transparency based scheme, locally generated vectors, global design test, influence tables, valid control state sequences, module testing, fault coverage levels, vector counts, logic testing, test generation, automatic test pattern generation, ATPG, computational cost reduction |
| 1 | Yiorgos Makris, Ismet Bayraktaroglu, Alex Orailoglu |
Invariance-Based On-Line Test for RTL Controller-Datapath Circuits. |
VTS |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Alex Orailoglu |
Channel-Based Behavioral Test Synthesis for Improved Module Reachability. |
DATE |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Alex Orailoglu |
A Module Diagnosis and Design-for-Debug Methodology Based on Hierarchical Test Paths. (PDF / PS) |
DFT |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Yiorgos Makris, Alex Orailoglu |
RTL Test Justification and Propagation Analysis for Modular Designs. |
J. Electronic Testing |
1998 |
DBLP DOI BibTeX RDF |
RTL testability analysis, test justification, test propagation, DFT, modular design |
| 1 | Yiorgos Makris, Alex Orailoglu |
DFT guidance through RTL test justification and propagation analysis. |
ITC |
1998 |
DBLP DOI BibTeX RDF |
|
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