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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 10 occurrences of 10 keywords
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Results
Found 30 publication records. Showing 30 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu, Bei Cao |
Test Pattern Generation Based on Multi-TRC Scan Architecture for Reducing Test Cost.  |
J. Low Power Electronics  |
2012 |
DBLP BibTeX RDF |
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| 1 | Bin Zhou, Liyi Xiao, Yizheng Ye, Xin-chun Wu |
Optimization of Test Power and Data Volume in BIST Scheme Based on Scan Slice Overlapping. |
J. Electronic Testing |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Bin Zhou, Yizheng Ye, Zhao-lin Li, Jianwei Zhang, Xin-chun Wu, Rui Ke |
A test set embedding approach based on twisted-ring counter with few seeds. |
Integration |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Bin Zhou, Yizheng Ye, Zhao-lin Li, Xin-chun Wu, Rui Ke |
A new low power test pattern generator using a variable-length ring counter. |
ISQED |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Bin Zhou, Yizheng Ye, Xin-chun Wu, Zhao-lin Li |
Reduction of Test Power and Data Volume in BIST Scheme based on Scan Slice Overlapping. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Jianwei Zhang, Yizheng Ye, Bin-Da Liu, Feng Guan |
Self-timed Charge Recycling Search-line Drivers in Content-addressable Memories. |
ISCAS |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Jianwei Zhang, Yizheng Ye, Bin-Da Liu |
A Current-Recycling Technique for Shadow-Match-Line Sensing in Content-Addressable Memories. |
IEEE Trans. VLSI Syst. |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye |
A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends. |
IEEE Trans. on Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Qingli Zhang, Jinxiang Wang, Yizheng Ye |
Delay and Energy Efficient Design of On-Chip Encoded Bus with Repeaters. |
VLSI Design |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Bin Zhou, Yizheng Ye, Yongsheng Wang |
Simultaneous reduction in test data volume and test time for TRC-reseeding. |
ACM Great Lakes Symposium on VLSI |
2007 |
DBLP DOI BibTeX RDF |
encoded vector, twisted-ring counter, built-in self test |
| 1 | Jianwei Zhang, Yizheng Ye, Bin-Da Liu |
A new mismatch-dependent low power technique with shadow match-line voltage-detecting scheme for CAMs. |
ISLPED |
2006 |
DBLP DOI BibTeX RDF |
mismatch-dependent, voltage detecting, low power, high speed, CAM |
| 1 | Qingli Zhang, Jinxiang Wang, Yizheng Ye |
An energy-efficient temporal encoding circuit technique for on-chip high performance buses. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
on-chip buses, energy-efficient, encoding, repeaters |
| 1 | Tong Zhou, Zhibo Zhou, Mingyan Yu, Yizheng Ye |
Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Qingli Zhang, Jinxiang Wang, Yizheng Ye |
Low-Power Crosstalk Avoidance Encoding for On-Chip Data Buses. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Jianwei Zhang, Yizheng Ye, Bin-Da Liu |
A Low-Power Technique Based on Charge Injection and Current-Saving Methods for Match-Line Sensing in Content-Addressable Memories. |
APCCAS |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Tong Zhou, Mingyan Yu, Yizheng Ye |
A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor. |
VLSI Design |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Guochi Huang, Tae-Sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye |
Post linearization of CMOS LNA using double cascade FETs. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Shengtian Sang, Xiaoming Li, Yizheng Ye |
Dependency driven partitioning objects generation for hardware/software partitioning. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Zhiqiang Gao, Mingyan Yu, Yizheng Ye, Jianguo Ma |
A CMOS bandpass filter with wide-tuning range for wireless applications. |
ISCAS |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Yongsheng Wang, Jinxiang Wang, Fengchang Lai, Yizheng Ye |
Optimal Schemes for ADC BIST Based on Histogram. |
Asian Test Symposium |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhonghai Wang, Yizheng Ye |
The improvement for transaction level verification functional coverage. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu |
Large tuning band range of high frequency filter for wireless applications. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang, Yizheng Ye |
A Test Architecture for System-on-a-Chip. |
Asian Test Symposium |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Liyi Xiao, Yizheng Ye, Bin Li |
A New Synchronization Algorithm for VHDL-AMS Simulation. |
J. Comput. Sci. Technol. |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Xuemei Zhao, Yizheng Ye |
Design and Realization of a Low Power Register File Using Energy Model. |
PATMOS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Bin Li, Liyi Xiao, Yizheng Ye, Guoyong Huang |
CLUGGS and CLUCR-Two Matrix Solution Methods for General Circuit Simulation. |
Annual Simulation Symposium |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Liyi Xiao, Bin Li, Yizheng Ye, Guoyong Huang, JinJun Guo, Peng Zhang |
A mixed-signal simulator for VHDL-AMS. |
ASP-DAC |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Liu Songyan, Zhigang Mao, Yizheng Ye |
Implementation of Java Card Virtual Machine. |
J. Comput. Sci. Technol. |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Zulan Huang, Yizheng Ye, Zhigang Mao |
A New Algorithm for Retiming-Based Partial Scan. |
Asian Test Symposium |
1999 |
DBLP DOI BibTeX RDF |
retiming, Partial scan, minimum feedback vertex set |
| 1 | Pingying Zeng, Zhigang Mao, Yizheng Ye, Yuliang Deng |
Test Pattern Generation for Column Compression Multiplier. |
Asian Test Symposium |
1998 |
DBLP DOI BibTeX RDF |
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