| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | In-Seok Jung, Yong-Bin Kim |
A low stand-by power start-up circuit for SMPS PWM controller.  |
ACM Great Lakes Symposium on VLSI  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jing Yang, Yong-bin Kim |
Self adaptive body biasing scheme for leakage power reduction in nanoscale CMOS circuit. |
ACM Great Lakes Symposium on VLSI |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | HeungJun Jeon, Yong-Bin Kim |
A fully integrated switched-capacitor DC-DC converter with dual output for low power application. |
ACM Great Lakes Symposium on VLSI |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi |
A 11-Transistor Nanoscale CMOS Memory Cell for Hardening to Soft Errors. |
IEEE Trans. VLSI Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi |
Modeling and design of a nanoscale memory cell for hardening to a single event with multiple node upset. |
ICCD |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Zhao, Yong-Bin Kim |
A Low-Power Digitally Controlled Oscillator for All Digital Phase-Locked Loops. |
VLSI Design |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | HeungJun Jeon, Yong-Bin Kim, Minsu Choi |
Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems. |
IEEE T. Instrumentation and Measurement |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi |
Design and analysis of a 32 nm PVT tolerant CMOS SRAM cell for low leakage and high stability. |
Integration |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Zhao, Yong-Bin Kim |
A novel all-digital fractional-N frequency synthesizer architecture with fast acquisition and low spur. |
ISQED |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi |
8Gb/s capacitive low power and high speed 4-PWAM transceiver design. |
ACM Great Lakes Symposium on VLSI |
2010 |
DBLP DOI BibTeX RDF |
pam, pulse amplitude modulation, pwam. low power, high performance, high speed, receiver, transceiver, capacitive, transmitter, pwm, pulse width modulation |
| 1 | Janardhanan S. Ajit, Yong-Bin Kim, Minsu Choi |
Performance assessment of analog circuits with carbon nanotube FET (CNFET). |
ACM Great Lakes Symposium on VLSI |
2010 |
DBLP DOI BibTeX RDF |
analog, circuits |
| 1 | Jun Wu, Yong-Bin Kim, Minsu Choi |
Low-power side-channel attack-resistant asynchronous S-box design for AES cryptosystems. |
ACM Great Lakes Symposium on VLSI |
2010 |
DBLP DOI BibTeX RDF |
substitution box, substitution box (S-box), differential power/noise analysis, power/noise measurement, security, advanced encryption standard, advanced encryption standard, side-channel attacks (SCA), null convention logic |
| 1 | Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi |
Read-out schemes for a CNTFET-based crossbar memory. |
ACM Great Lakes Symposium on VLSI |
2010 |
DBLP DOI BibTeX RDF |
carbon nanotube field effect transistor, crossbar design, read-out circuit, noise margin |
| 1 | HeungJun Jeon, Yong-Bin Kim |
A low-offset high-speed double-tail dual-rail dynamic latched comparator. |
ACM Great Lakes Symposium on VLSI |
2010 |
DBLP DOI BibTeX RDF |
clocked comparator, dynamic latched comparator, low-offset low-power high-speed, voltage sense amplifier (sa) |
| 1 | Young Bok Kim, Yong-Bin Kim |
High speed and low power transceiver design with CNFET and CNT bundle interconnect. |
SoCC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jiaping Hu, Yong-Bin Kim, Joseph Ayers |
A 65nm CMOS ultra low power and low noise 131M front-end transimpedance amplifier. |
SoCC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | HeungJun Jeon, Yong-Bin Kim |
A CMOS low-power low-offset and high-speed fully dynamic latched comparator. |
SoCC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi |
A Novel Statistical Timing and Leakage Power Characterization of Partially Depleted Silicon-on-Insulator Gates. |
IEEE T. Instrumentation and Measurement |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyung Ki Kim, Yong-Bin Kim |
A Novel Adaptive Design Methodology for Minimum Leakage Power Considering PVT Variations on Nanoscale VLSI Systems. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristiana Bolchini, Yong-Bin Kim |
Guest Editorial. |
J. Electronic Testing |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi |
Soft-Error Hardening Designs of Nanoscale CMOS Latches. |
VTS |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Xiaojun Ma, Masoud Hashempour, Yong-Bin Kim, Fabrizio Lombardi |
Errors in DNA Self-Assembly by Synthesized Tile Sets. |
DFT |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi |
A Novel Hardened Design of a CMOS Memory Cell at 32nm. |
DFT |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio Lombardi |
Analysis and Simulation of Jitter Sequences for Testing Serial Data Channels. |
IEEE Trans. Industrial Informatics |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Byunghyun Jang, Yong-Bin Kim, Fabrizio Lombardi |
Monomer Control for Error Tolerance in DNA Self-Assembly. |
J. Electronic Testing |
2008 |
DBLP DOI BibTeX RDF |
Molecular manufacturing, Tiling, Error tolerance, DNA self-assembly |
| 1 | Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi |
A low leakage 9t sram cell for ultra-low power operation. |
ACM Great Lakes Symposium on VLSI |
2008 |
DBLP DOI BibTeX RDF |
sram cell, low power, nanotechnology, leakage power, static noise margin |
| 1 | Cristiana Bolchini, Yong-Bin Kim, Dimitris Gizopoulos, Mohammad Tehranipoor (eds.) |
23rd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2008), 1-3 October 2008, Boston, MA, USA |
DFT |
2008 |
DBLP BibTeX RDF |
|
| 1 | Stephen Frechette, Yong-Bin Kim, Fabrizio Lombardi |
Checkpointing of Rectilinear Growth in DNA Self-Assembly. |
DFT |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Young Bok Kim, Yong-Bin Kim, Fabrizio Lombardi |
Low power 8T SRAM using 32nm independent gate FinFET technology. |
SoCC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jun Zhao, Yong-Bin Kim |
A low power 32 nanometer CMOS digitally controlled oscillator. |
SoCC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Young-Jun Lee, Jihyun Lee, Kyung Ki Kim, Yong-Bin Kim, Joseph Ayers |
Low power CMOS electronic central pattern generator design for a biomimetic underwater robot. |
Neurocomputing |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Leonid Zamdborg, Richard D. LeDuc, Kevin J. Glowacz, Yong-Bin Kim, Vinayak Viswanathan, Ian T. Spaulding, Bryan P. Early, Eric J. Bluhm, Shannee Babai, Neil L. Kelleher |
ProSight PTM 2.0: improved protein identification and characterization for top down mass spectrometry. |
Nucleic Acids Research |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyung Ki Kim, Yong-Bin Kim, Minsu Choi, Nohpill Park |
Leakage Minimization Technique for Nanoscale CMOS VLSI. |
IEEE Design & Test of Computers |
2007 |
DBLP DOI BibTeX RDF |
nanometer CMOS, cell characterization, gate-tunneling current, input pattern generation, leakage power, subthreshold leakage current |
| 1 | Kyung Ki Kim, Yong-Bin Kim |
Optimal Body Biasing for Minimum Leakage Power in Standby Mode. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yong-Bin Kim, Kyung Ki Kim, James T. Doyle |
A CMOS Low Power Fully Digital Adaptive Power Delivery System Based on Finite State Machine Control. |
ISCAS |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Cristiana Bolchini, Yong-Bin Kim, Adelio Salsano, Nur A. Touba (eds.) |
22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007), 26-28 September 2007, Rome, Italy. |
DFT |
2007 |
DBLP BibTeX RDF |
|
| 1 | Young Bok Kim, Yong-Bin Kim |
Fault Tolerant Source Routing for Network-on-Chip. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Ravi Bonam, Yong-Bin Kim, Minsu Choi |
Defect-Tolerant Gate Macro Mapping & Placement in Clock-Free Nanowire Crossbar Architecture. |
DFT |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Rui Tang, Fengming Zhang, Yong-Bin Kim |
Design metal-dot based QCA circuits using SPICE model. |
Microelectronics Journal |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Marco Ottavi, Luca Schiano, Xiaopeng Wang, Yong-Bin Kim, Fred J. Meyer, Fabrizio Lombardi |
Evaluating the Yield of Repairable SRAMs for ATE. |
IEEE T. Instrumentation and Measurement |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Schiano, Mariam Momenzadeh, Fengming Zhang, Young-Jun Lee, Thomas Kane, Solomon Max, Philip Perkins, Yong-Bin Kim, Fabrizio Lombardi, Fred J. Meyer |
Measuring the timing jitter of ATE in the frequency domain. |
IEEE T. Instrumentation and Measurement |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Woon Kang, Yong-Bin Kim, T. Doyle |
A high-efficiency fully digital synchronous buck converter power delivery system based on a finite-state machine. |
IEEE Trans. VLSI Syst. |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Jihyun Lee, Yong-Bin Kim |
ASLIC: A low power CMOS analog circuit design automation. |
Integration |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Rui Tang, Yong-Bin Kim |
PWAM signalling scheme for high speed serial link transceiver design. |
ACM Great Lakes Symposium on VLSI |
2006 |
DBLP DOI BibTeX RDF |
DDJ, PWAM, level spacing |
| 1 | Byunghyun Jang, Yong-Bin Kim, Fabrizio Lombardi |
Error Tolerance of DNA Self-Assembly by Monomer Concentration Control. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Fengming Zhang, Warren Necoechea, Peter Reiter, Yong-Bin Kim, Fabrizio Lombardi |
Load Board Designs Using Compound Dot Technique and Phase Detector for Hierarchical ATE Calibrations. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Yadunandana Yellambalase, Minsu Choi, Yong-Bin Kim |
Inherited Redundancy and Configurability Utilization for Repairing Nanowire Crossbars with Clustered Defects. |
DFT |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Fengming Zhang, Rui Tang, Yong-Bin Kim |
SET-based nano-circuit simulation and design method using HSPICE. |
Microelectronics Journal |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Noh-Jin Park, K. M. George, Nohpill Park, Minsu Choi, Yong-Bin Kim, Fabrizio Lombardi |
Environmental-based characterization of SoC-based instrumentation systems for stratified testing. |
IEEE T. Instrumentation and Measurement |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Jihyun Lee, Yong-Bin Kim |
ASLIC: A Low Power CMOS Analog Circuit Design Automation. |
ISQED |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Rui Tang, Fengming Zhang, Yong-Bin Kim |
Quantum-dot cellular automata SPICE macro model. |
ACM Great Lakes Symposium on VLSI |
2005 |
DBLP DOI BibTeX RDF |
QCA macro modeling |
| 1 | Rui Tang, Fengming Zhang, Yong-Bin Kim |
QCA-based nano circuits design [adder design example]. |
ISCAS |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyung Ki Kim, Jing Huang, Yong-Bin Kim, Fabrizio Lombardi |
On the Modeling and Analysis of Jitter in ATE Using Matlab. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Kyung Ki Kim, Yong-Bin Kim, Fabrizio Lombardi |
Data Dependent Jitter (DDJ) Characterization Methodology. |
DFT |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | James T. Doyle, Young-Jun Lee, Yong-Bin Kim |
Fast and accurate DAC modeling techniques based on wavelet theory. |
Microelectronics Journal |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsu Choi, Nohpill Park, Vincenzo Piuri, Yong-Bin Kim, Fabrizio Lombardi |
Balanced dual-stage repair for dependable embedded memory cores. |
Journal of Systems Architecture |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Richard D. LeDuc, Gregory K. Taylor, Yong-Bin Kim, Thomas E. Januszyk, Lee H. Bynum, Joseph V. Sola, John S. Garavelli, Neil L. Kelleher |
ProSight PTM: an integrated environment for protein identification and characterization by top-down mass spectrometry. |
Nucleic Acids Research |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Luca Schiano, Yong-Bin Kim, Fabrizio Lombardi |
Scan Test of IP Cores in an ATE Environment. |
DELTA |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Fengming Zhang, Rui Tang, Yong-Bin Kim |
SET-based nano-circuit simulation and design method using HSPICE. |
ACM Great Lakes Symposium on VLSI |
2004 |
DBLP DOI BibTeX RDF |
SET circuit design, SET modeling, SET simulation with HSPICE |
| 1 | T. Feng, Byoungjae Jin, J. Wang, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi |
Fault tolerant clockless wave pipeline design. |
Conf. Computing Frontiers |
2004 |
DBLP DOI BibTeX RDF |
clockless wave pipeline, inter-wave fault, intra-wave fault, fault tolerance, reliability |
| 1 | Young-Jun Lee, Yong-Bin Kim |
A fast and precise interconnect capacitive coupling noise model. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | Young-Jun Lee, Jihyun Lee, Yong-Bin Kim, Joseph Ayers, Alexander Volkovskii, Allen I. Selverston, Henry D. I. Abarbanel, Mikhail I. Rabinovich |
Low power real time electronic neuron VLSI design using subthreshold technique. |
ISCAS |
2004 |
DBLP BibTeX RDF |
|
| 1 | T. Feng, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi, Fred J. Meyer |
Reliability Modeling and Assurance of Clockless Wave Pipeline. |
DFT |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Young-Jun Lee, Thomas Kane, Jong-Jin Lim, Young Jun Schiano, Yong-Bin Kim, Fred J. Meyer, Fabrizio Lombardi, Solomon Max |
Analysis and measurement of timing jitter induced by radiated EMI noise in automatic test equipment. |
IEEE T. Instrumentation and Measurement |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Soha Hassoun, Yong-Bin Kim, Fabrizio Lombardi |
Guest Editors' Introduction: Clockless VLSI Systems. (PDF / PS) |
IEEE Design & Test of Computers |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Woo Jin Kim, Yong-Bin Kim |
Automating Wave-Pipelined Circuit Design. |
IEEE Design & Test of Computers |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsu Choi, Hardy J. Pottinger, Nohpill Park, Yong-Bin Kim |
Need For Undergraduate And Graduate-Level Education In Testing Of Microelectronic Circuits And Systems. |
MSE |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Young-Jun Lee, Jong-Jin Lim, Yong-Bin Kim |
A Novel Clocking Strategy for Dynamic Circuits. |
ISQED |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Yeshwant Kolla, Yong-Bin Kim, John Carter |
A novel 32-bit scalable multiplier architecture. |
ACM Great Lakes Symposium on VLSI |
2003 |
DBLP DOI BibTeX RDF |
CMOS VLSI, architecture, multiplier |
| 1 | Minsu Choi, Noh-Jin Park, K. M. George, Byoungjae Jin, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi |
Fault Tolerant Memory Design for HW/SW Co-Reliability in Massively Parallel Computing Systems. (PDF / PS) |
NCA |
2003 |
DBLP DOI BibTeX RDF |
Built-in-self-repair (BISR), Field Reconfiguration, HW/SW Co-reliability, Reliability Assurance, Reliability, High performance computing, Yield, Massively parallel computing, Fault-tolerant memory, Modular Redundancy |
| 1 | T. Feng, Nohpill Park, Yong-Bin Kim, Vincenzo Piuri |
Yield Modeling and Analysis of a Clockless Asynchronous Wave Pipeline with Pulse Faults. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Fengming Zhang, Young-Jun Lee, Thomas Kane, Luca Schiano, Mariam Momenzadeh, Yong-Bin Kim, Fred J. Meyer, Fabrizio Lombardi, Solomon Max, Phil Perkinson |
A Digital and Wide Power Bandwidth H-Field Generator for Automatic Test Equipment. |
DFT |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri |
Optimal Spare Utilization in Repairable and Reliable Memory Cores. |
MTDT |
2003 |
DBLP DOI BibTeX RDF |
Embedded Memory Repair and Reliability, Fault-Tolerant Memory Core, System-on-chip, Yield, Built-In-Self-Repair |
| 1 | Minsu Choi, Nohpill Park, Yong-Bin Kim, Fabrizio Lombardi |
Hardware/Software Co-Reliability of Configurable Digital Systems. |
PRDC |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Dae Woon Kang, Yong-Bin Kim |
Design flow of robust routed power distribution for low power ASIC. |
ISCAS |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Hamidreza Hashempour, Yong-Bin Kim, Nohpill Park |
A Test-Vector Generation Methodology for Crosstalk Noise Faults. (PDF / PS) |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Minsu Choi, Nohpill Park, Fabrizio Lombardi, Yong-Bin Kim, Vincenzo Piuri |
Balanced Redundancy Utilization in Embedded Memory Cores for Dependable Systems. (PDF / PS) |
DFT |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Chris Winstead, Jie Dai, Woo Jin Kim, Scott Little, Yong-Bin Kim, Chris J. Myers, Christian Schlegel |
Analog MAP Decoder for (8, 4) Hamming Code in Subthreshold CMOS. |
ARVLSI |
2001 |
DBLP DOI BibTeX RDF |
|
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