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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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Results
Found 10 publication records. Showing 10 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Nobuaki Ozaki, Yoshihiro Yasuda, Mai Izawa, Yoshiki Saito, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo |
Cool Mega-Arrays: Ultralow-Power Reconfigurable Accelerator Chips.  |
IEEE Micro  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Nobuaki Ozaki, Yoshihiro Yasuda, Yoshiki Saito, Daisuke Ikebuchi, Masayuki Kimura, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo |
Cool Mega-Array: A highly energy efficient reconfigurable accelerator. |
FPT |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Lei Zhao, Daisuke Ikebuchi, Yoshiki Saito, M. Kamata, Naomi Seki, Yu Kojima, Hideharu Amano, Satoshi Koyama, Tatsunori Hashida, Y. Umahashi, D. Masuda, Kimiyoshi Usami, Keiji Kimura, Mitaro Namiki, Seidai Takeda, Hiroshi Nakamura, Masaaki Kondo |
Geyser-2: The second prototype CPU with fine-grained run-time power gating. |
ASP-DAC |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Kazuei Hironaka, Masayuki Kimura, Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Hideharu Amano |
Reducing power consumption for Dynamically Reconfigurable Processor Array with Partially Fixed Configuration Mapping. |
FPT |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Masayuki Kimura, Hideharu Amano |
MuCCRA-3: a low power dynamically reconfigurable processor array. |
ASP-DAC |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Toru Sano, Yoshiki Saito, Masaru Kato, Hideharu Amano |
Fine Grain Partial Reconfiguration for energy saving in Dynamically Reconfigurable Processors. |
FPL |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Lei Zhao, Hui Xu, Naomi Seki, Yoshiki Saito, Yohei Hasegawa, Kimiyoshi Usami, Hideharu Amano |
Cache Controller Design on Ultra Low Leakage Embedded Processors. |
ARCS |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Toru Sano, Yoshiki Saito, Hideharu Amano |
Configuration with Self-Configured Datapath: A High Speed Configuration Method for Dynamically Reconfigurable Processors. |
ERSA |
2009 |
DBLP BibTeX RDF |
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| 1 | Yoshiki Saito, Toru Sano, Masaru Kato, Vasutan Tunbunheng, Yoshihiro Yasuda, Hideharu Amano |
A Real Chip Evaluation of MuCCRA-3: A Low Power Dycamically Reconfigurable Processor Array. |
ERSA |
2009 |
DBLP BibTeX RDF |
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| 1 | Takashi Nishimura, Keiichiro Hirai, Yoshiki Saito, Takuro Nakamura, Yohei Hasegawa, Satoshi Tsutsusmi, Vasutan Tunbunheng, Hideharu Amano |
Power reduction techniques for Dynamically Reconfigurable Processor Arrays. |
FPL |
2008 |
DBLP DOI BibTeX RDF |
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Displaying result #1 - #10 of 10 (100 per page; Change: )
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