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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 14 occurrences of 12 keywords
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Results
Found 10 publication records. Showing 10 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil D. Dutt |
A Multi-Granularity Power Modeling Methodology for Embedded Processors.  |
IEEE Trans. VLSI Syst.  |
2011 |
DBLP DOI BibTeX RDF |
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| 1 | Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil D. Dutt |
CAPPS: A Framework for Power-Performance Tradeoffs in Bus-Matrix-Based On-Chip Communication Architecture Synthesis.  |
IEEE Trans. VLSI Syst.  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Sudeep Pasricha, Young-Hwan Park, Nikil D. Dutt, Fadi J. Kurdahi |
System-level PVT variation-aware power exploration of on-chip communication architectures.  |
ACM Trans. Design Autom. Electr. Syst.  |
2009 |
DBLP DOI BibTeX RDF |
PVT variation, on-chip communication architectures, performance exploration, high-level synthesis, power estimation, digital systems |
| 1 | Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil Dutt |
Incorporating PVT Variations in System-Level Power Exploration of On-Chip Communication Architectures.  |
VLSI Design  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil Dutt |
Methodology for multi-granularity embedded processor power model generation for an ESL design flow.  |
CODES+ISSS  |
2008 |
DBLP DOI BibTeX RDF |
system-on-chip, embedded processor, power modeling, esl |
| 1 | Kang Yi, Shih-Yang Cheng, Young-Hwan Park, Fadi J. Kurdahi, Ahmed M. Eltawil |
An Alternative Organization of Defect Map for Defect-Resilient Embedded On-Chip Memories.  |
Asia-Pacific Computer Systems Architecture Conference  |
2007 |
DBLP DOI BibTeX RDF |
Embedded memory Yield, Defect Map, Memory Error Resilient Design, Video error concealment |
| 1 | Young-Hwan Park, Sudeep Pasricha, Fadi J. Kurdahi, Nikil Dutt |
System level power estimation methodology with H.264 decoder prediction IP case study.  |
ICCD  |
2007 |
DBLP DOI BibTeX RDF |
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| 1 | Fadi J. Kurdahi, Ahmed M. Eltawil, Young-Hwan Park, Rouwaida Kanj, Sani R. Nassif |
System-Level SRAM Yield Enhancement.  |
ISQED  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Kang Yi, Kyeong-Hoon Jung, Shih-Yang Cheng, Young-Hwan Park, Fadi J. Kurdahi, Ahmed M. Eltawil |
Design and Analysis of Low Power Image Filters Toward Defect-Resilient Embedded Memories for Multimedia SoCs.  |
Asia-Pacific Computer Systems Architecture Conference  |
2006 |
DBLP DOI BibTeX RDF |
Low power image filter design, Memory yield enhancement, Memory-error resilient design, H.264 codec, BIST, Embedded memory, BISR |
| 1 | Sudeep Pasricha, Young-Hwan Park, Fadi J. Kurdahi, Nikil D. Dutt |
System-level power-performance trade-offs in bus matrix communication architecture synthesis.  |
CODES+ISSS  |
2006 |
DBLP DOI BibTeX RDF |
bus matrix synthesis, system-on-chip, power estimation, communication architectures, power-performance trade-offs |
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