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Publications of "Yu-Liang Chou" ( http://dblp.L3S.de/Authors/Yu-Liang_Chou )

  Author page on DBLP  Author page in RDF  Community of Yu-Liang Chou in ASPL-2

Publication years (Num. hits)
2008 (1) 2009 (2) 2010 (4) 2011 (1)
Publication types (Num. hits)
article(4) inproceedings(4)
Venues (Conferences, Journals, ...)
GrowBag graphs for keyword ? (Num. hits/coverage)

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The graphs summarize 13 occurrences of 9 keywords

Results
Found 8 publication records. Showing 8 according to the selection in the facets
Hits ? Authors Title Venue Year Link Author keywords
1Jih-Ching Chiu, Yu-Liang Chou, Po-Kai Chen, Ding-Siang Su A Unitable Computing Architecture for Chip Multiprocessors. Search on Bibsonomy Comput. J. The full citation details ... 2011 DBLP  DOI  BibTeX  RDF
1Jih-Ching Chiu, Yu-Liang Chou A multi-streaming SIMD multimedia computing engine. Search on Bibsonomy Microprocessors and Microsystems - Embedded Hardware Design The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Jih-Ching Chiu, Yu-Liang Chou, Tseng-Kuei Lin The Basic Block Reassembling Instruction Stream Buffer with LWBTB for X86 ISA. Search on Bibsonomy J. Inf. Sci. Eng. The full citation details ... 2010 DBLP  BibTeX  RDF
1Jih-Ching Chiu, Yu-Liang Chou, Po-Kai Chen Hyperscalar: A Novel Dynamically Reconfigurable Multi-core Architecture. Search on Bibsonomy ICPP The full citation details ... 2010 DBLP  DOI  BibTeX  RDF
1Jih-Ching Chiu, Yu-Liang Chou, Ding-Siang Su A hyperscalar multi-core architecture. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2010 DBLP  DOI  BibTeX  RDF cmps, dynamic multi-core chips, reconfigurable multi-core architectures, chip multiprocessors
1Jih-Ching Chiu, Yu-Liang Chou, Hua-Yi Tzeng A multi-streaming SIMD architecture for multimedia applications. Search on Bibsonomy Conf. Computing Frontiers The full citation details ... 2009 DBLP  DOI  BibTeX  RDF SIMD, streaming processing, streaming computing, processor-in-memory, mmx, multimedia extensions, pim
1Jih-Ching Chiu, Kai-Ming Yang, Yu-Liang Chou Design of a novel SIMD architecture by fusing operations and registers. Search on Bibsonomy ICS The full citation details ... 2009 DBLP  DOI  BibTeX  RDF processor-in-memory, mmx, simd, multimedia extensions, pim
1Jih-Ching Chiu, Yu-Liang Chou, Ren-Bang Lin The Multi-context Reconfigurable Processing Unit for Fine-grain Computing. Search on Bibsonomy J. Inf. Sci. Eng. The full citation details ... 2008 DBLP  BibTeX  RDF
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