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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 62 occurrences of 42 keywords
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Found 67 publication records. Showing 67 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | Yongjoo Kim, Jongeun Lee, Toan X. Mai, Yunheung Paek |
Improving performance of nested loops on reconfigurable array processors.  |
TACO  |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongjoo Kim, Jongeun Lee, Jinyong Lee, Toan X. Mai, Ingoo Heo, Yunheung Paek |
Exploiting Both Pipelining and Data Parallelism with SIMD Reconfigurable Architecture. |
ARC |
2012 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonghee M. Youn, Jongwon Lee, Yunheung Paek, Jongeun Lee, Hanno Scharwächter, Rainer Leupers |
Fast graph-based instruction selection for multi-output instructions. |
Softw., Pract. Exper. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek |
Memory access optimization in compilation for coarse-grained reconfigurable architectures. |
ACM Trans. Design Autom. Electr. Syst. |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee W. Yoon, Doosan Cho, Yunheung Paek |
High Throughput Data Mapping for Coarse-Grained Reconfigurable Architectures. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonghee W. Yoon, Jongeun Lee, Jaewan Jung, Sanghyun Park, Yongjoo Kim, Yunheung Paek, Doosan Cho |
I2CRF: Incremental interconnect customization for embedded reconfigurable fabrics. |
DATE |
2011 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonghee M. Youn, Minwook Ahn, Yunheung Paek, Jongwung Kim, Jeonghun Cho |
Two versions of architectures for dynamic implied addressing mode. |
Journal of Systems Architecture - Embedded Systems Design |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonghee M. Youn, Jongwon Lee, Yunheung Paek, Jongwung Kim, Jeonghun Cho |
Implementing dynamic implied addressing mode for multi-output instructions. |
CASES |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Jonghee W. Yoon, Yunheung Paek |
Memory-Aware Application Mapping on Coarse-Grained Reconfigurable Arrays. |
HiPEAC |
2010 |
DBLP DOI BibTeX RDF |
|
| 1 | Yongjoo Kim, Jongeun Lee, Aviral Shrivastava, Yunheung Paek |
Operation and data mapping for CGRAs with multi-bank memory. |
LCTES |
2010 |
DBLP DOI BibTeX RDF |
bank conflict, multi-bank memory, compilation, arbiter, coarse-grained reconfigurable architecture |
| 1 | Minwook Ahn, Yunheung Paek |
Register coalescing techniques for heterogeneous register architecture with copy sifting. |
ACM Trans. Embedded Comput. Syst. |
2009 |
DBLP DOI BibTeX RDF |
heterogeneous register architecture, compiler, Register allocation, embedded processors, register coalescing |
| 1 | Minwook Ahn, Yunheung Paek |
Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers. |
T. HiPEAC |
2009 |
DBLP DOI BibTeX RDF |
heterogeneous register architecture, register aliasing, compiler, code generation, register allocation, register coalescing |
| 1 | Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Sanghyun Park, Yunheung Paek |
Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil D. Dutt, Minwook Ahn, Yunheung Paek |
Adaptive Scratch Pad Memory Management for Dynamic Behavior of Multimedia Applications. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn, Yunheung Paek |
A Graph Drawing Based Spatial Mapping Algorithm for Coarse-Grained Reconfigurable Architectures. |
IEEE Trans. VLSI Syst. |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Minwook Ahn, Jonghee M. Youn, Youngkyu Choi, Doosan Cho, Yunheung Paek |
Iterative Algorithm for Compound Instruction Selection with Register Coalescing. |
DSD |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonghee M. Youn, Daeho Kim, Minwook Ahn, Yongjoo Kim, Yunheung Paek |
Orthogonal Instruction Encoding for a 16-bit Embedded Processor with Dynamic Implied Addressing Mode. |
HPCC |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonghee M. Youn, Minwook Ahn, Daeho Kim, Jonghee W. Yoon, Yunheung Paek, Sechul Shin, Hochang Chae, Jeonghun Cho |
A new addressing mode for the encoding space problem on embedded processors. |
SASP |
2009 |
DBLP DOI BibTeX RDF |
|
| 1 | Junwook Kwak, Sechul Shin, Soohyun Kwon, Hochang Chae, Jeonghun Cho, Yunheung Paek, Yenjo Han, Heeseok Kim, Jin Seok |
Management environment of mass Windows Servers for server-based computing. |
ICOIN |
2009 |
DBLP BibTeX RDF |
|
| 1 | Seongnam Kwon, Yongjoo Kim, Woo-Chul Jeun, Soonhoi Ha, Yunheung Paek |
A retargetable parallel-programming framework for MPSoC. |
ACM Trans. Design Autom. Electr. Syst. |
2008 |
DBLP DOI BibTeX RDF |
parallel-programming, design-space exploration, Embedded software, multiprocessor system on chip, software generation |
| 1 | Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek, Eugene Earlie |
Register File Power Reduction Using Bypass Sensitive Compiler. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Jonghee W. Yoon, Aviral Shrivastava, Sanghyun Park, Minwook Ahn, Reiley Jeyapaul, Yunheung Paek |
SPKM : A novel graph drawing based algorithm for application mapping onto coarse-grained reconfigurable architectures. |
ASP-DAC |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanghyun Park, Aviral Shrivastava, Yunheung Paek |
Hiding Cache Miss Penalty Using Priority-based Execution for Embedded Processors. |
DATE |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Doosan Cho, Sudeep Pasricha, Ilya Issenin, Nikil Dutt, Yunheung Paek, SunJun Ko |
Compiler driven data layout optimization for regular/irregular array access patterns. |
LCTES |
2008 |
DBLP DOI BibTeX RDF |
compiler, memory hierarchy, energy consumption, data placement |
| 1 | Rajiv Gupta, Yunheung Paek |
Introduction to the special LCTES'05 issue. |
ACM Trans. Embedded Comput. Syst. |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunheung Paek, Minwook Ahn, Doosan Cho, Taehwan Kim |
Efficient embedded code generation with multiple load/store instructions. |
Softw., Pract. Exper. |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Aviral Shrivastava, Sanghyun Park, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek |
Automatic Design Space Exploration of Register Bypasses in Embedded Processors. |
IEEE Trans. on CAD of Integrated Circuits and Systems |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Lynn Choi, Yunheung Paek, Sangyeun Cho (eds.) |
Advances in Computer Systems Architecture, 12th Asia-Pacific Conference, ACSAC 2007, Seoul, Korea, August 23-25, 2007, Proceedings |
Asia-Pacific Computer Systems Architecture Conference |
2007 |
DBLP BibTeX RDF |
|
| 1 | Doosan Cho, Ilya Issenin, Nikil Dutt, Jonghee W. Yoon, Yunheung Paek |
Software controlled memory layout reorganization for irregular array access patterns. |
CASES |
2007 |
DBLP DOI BibTeX RDF |
energy consumption, data layout, scratch pad memory |
| 1 | Doosan Cho, Ravi Ayyagari, Gang-Ryung Uh, Yunheung Paek |
Preprocessing Strategy for Effective Modulo Scheduling on Multi-issue Digital Signal Processors. |
CC |
2007 |
DBLP DOI BibTeX RDF |
|
| 1 | Minwook Ahn, Jooyeon Lee, Yunheung Paek |
Optimistic coalescing for heterogeneous register architectures. |
LCTES |
2007 |
DBLP DOI BibTeX RDF |
heterogeneous register architecture, register coalesing, compiler, register allocation, embedded processors |
| 1 | Hanno Scharwächter, Jonghee M. Youn, Rainer Leupers, Yunheung Paek, Gerd Ascheid, Heinrich Meyr |
A code-generator generator for multi-output instructions. |
CODES+ISSS |
2007 |
DBLP DOI BibTeX RDF |
ISS, code-selection, compiler/architecture co-design, ASIP |
| 1 | Prasad A. Kulkarni, Wankang Zhao, Stephen Hines, David B. Whalley, Xin Yuan, Robert van Engelen, Kyle Gallivan, Jason Hiser, Jack W. Davidson, Baosheng Cai, Mark W. Bailey, Hwashin Moon, Kyunghwan Cho, Yunheung Paek |
VISTA: VPO interactive system for tuning applications. |
ACM Trans. Embedded Comput. Syst. |
2006 |
DBLP DOI BibTeX RDF |
User-directed code improvement, interactive compilation, genetic algorithms, phase ordering |
| 1 | Yoonjin Kim, Ilhyun Park, Kiyoung Choi, Yunheung Paek |
Power-conscious configuration cache structure and code mapping for coarse-grained reconfigurable architecture. |
ISLPED |
2006 |
DBLP DOI BibTeX RDF |
coarse-grained reconfigurable architecture (CGRA), context pipelining, temporal mapping, low power, system-on-chip (SoC), loop pipelining, configuration cache, spatial mapping |
| 1 | Minwook Ahn, Jonghee W. Yoon, Yunheung Paek, Yoonjin Kim, Mary Kiemb, Kiyoung Choi |
A spatial mapping algorithm for heterogeneous coarse-grained reconfigurable architectures. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Sanghyun Park, Eugene Earlie, Aviral Shrivastava, Alex Nicolau, Nikil Dutt, Yunheung Paek |
Automatic generation of operation tables for fast exploration of bypasses in embedded processors. |
DATE |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Doosan Cho, Ravi Ayyagari, Gang-Ryung Uh, Yunheung Paek |
Instruction Re-selection for Iterative Modulo Scheduling on High Performance Multi-issue DSPs. |
EUC Workshops |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeonghun Cho, Yunheung Paek |
Run-Time Memory Optimization for DDMB Architecture Through a CCB Algorithm. |
EUC Workshops |
2006 |
DBLP DOI BibTeX RDF |
dual data memory banks, compiler and on-chip memory, DSP, Run-time environment |
| 1 | Sanghyun Park, Aviral Shrivastava, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek, Eugene Earlie |
Bypass aware instruction scheduling for register file power reduction. |
LCTES |
2006 |
DBLP DOI BibTeX RDF |
architecture-sensitive compiler, bypass-sensitive, forwarding paths, operation table, processor bypasses, reservation table, power consumption, register file |
| 1 | Gang-Ryung Uh, Yuhong Wang, David B. Whalley, Sanjay Jinturkar, Yunheung Paek, Vincent Cao, Chris Burns |
Compiler transformations for effectively exploiting a zero overhead loop buffer. |
Softw., Pract. Exper. |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunheung Paek, Rajiv Gupta (eds.) |
Proceedings of the 2005 ACM SIGPLAN/SIGBED Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'05), Chicago, Illinois, USA, June 15-17, 2005 |
LCTES |
2005 |
DBLP BibTeX RDF |
|
| 1 | Jinhwan Kim, Yunheung Paek, Gang-Ryung Uh |
Code optimizations for a VLIW-style network processing unit. |
Softw., Pract. Exper. |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Jeonghun Cho, Yunheung Paek, David B. Whalley |
Fast memory bank assignment for fixed-point digital signal processors. |
ACM Trans. Design Autom. Electr. Syst. |
2004 |
DBLP DOI BibTeX RDF |
dual memory banks, nonorthogonal architecture, Compiler, DSP, dependence analysis, maximum spanning tree |
| 1 | Yunheung Paek, Junsik Choi, Jinoo Joung, Junseo Lee, Seonwook Kim |
Exploiting Parallelism in Memory Operations for Code Optimization. |
LCPC |
2004 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunheung Paek, Minwook Ahn, Soonho Lee |
Case Studies on Automatic Extraction of Target-Specific Architectural Parameters in Complex Code Generation. |
SCOPES |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Sejong Oh, Yunheung Paek |
A Quantitative Comparison of Two Retargetable Compilation Approaches. |
ICPP |
2003 |
DBLP DOI BibTeX RDF |
|
| 1 | Prasad A. Kulkarni, Wankang Zhao, Hwashin Moon, Kyunghwan Cho, David B. Whalley, Jack W. Davidson, Mark W. Bailey, Yunheung Paek, Kyle Gallivan |
Finding effective optimization phase sequences. |
LCTES |
2003 |
DBLP DOI BibTeX RDF |
interactive compilation, genetic algorithms, phase ordering |
| 1 | Oukseh Lee, Kwangkeun Yi, Yunheung Paek |
A proof method for the correctness of modularized 0CFA. |
Inf. Process. Lett. |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunheung Paek, Angeles G. Navarro, Emilio L. Zapata, Jay Hoeflinger, David A. Padua |
An Advanced Compiler Framework for Non-Cache-Coherent Multiprocessors. |
IEEE Trans. Parallel Distrib. Syst. |
2002 |
DBLP DOI BibTeX RDF |
array privatization, noncoherent caches, Put/Get, compiler, multiprocessors, dependence analysis, shared-memory programming |
| 1 | Yunheung Paek, Jay Hoeflinger, David A. Padua |
Efficient and precise array access analysis. |
ACM Trans. Program. Lang. Syst. |
2002 |
DBLP DOI BibTeX RDF |
Array access analysis, linear memory access descriptors, internal representation |
| 1 | Jeonghun Cho, Jinhwan Kim, Yunheung Paek |
A Study on Data Allocation of On-Chip Dual Memory Banks. |
Interaction between Compilers and Computer Architectures |
2002 |
DBLP DOI BibTeX RDF |
|
| 1 | Jinhwan Kim, Sungjoon Jung, Yunheung Paek, Gang-Ryung Uh |
Experience with a retargetable compiler for a commercial network processor. |
CASES |
2002 |
DBLP DOI BibTeX RDF |
non-orthogonal architecture, compiler, network processor |
| 1 | Jeonghun Cho, Yunheung Paek, David B. Whalley |
Efficient register and memory assignment for non-orthogonal architectures via graph coloring and MST algorithms. |
LCTES-SCOPES |
2002 |
DBLP DOI BibTeX RDF |
dual memory, memory assignment, non-orthogonal architecture, compiler, graph coloring, maximum spanning tree |
| 1 | Jay Hoeflinger, Yunheung Paek, Kwang Yi |
Unified Interprocedural Parallelism Detection. |
International Journal of Parallel Programming |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Sungjoon Jung, Yunheung Paek |
The very portable optimizer for digital signal processors. |
CASES |
2001 |
DBLP DOI BibTeX RDF |
|
| 1 | Sang Seok Lim, Yunheung Paek, Kyu Ho Park, Jay Hoeflinger |
A Parallel Programming Environment for a V-Busbased PC-cluste. |
CLUSTER |
2001 |
DBLP DOI BibTeX RDF |
Automatic ParallelizingCompiler, LMAD(Linear Memory Access Descriptor), parallel, MPI, PC-cluster, SPMD |
| 1 | Jay Hoeflinger, Yunheung Paek |
A Comparative Analysis of Dependence Testing Mechanisms. |
LCPC |
2000 |
DBLP DOI BibTeX RDF |
|
| 1 | Jay Hoeflinger, Yunheung Paek |
The Access Region Test. |
LCPC |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Andrew Sohn, Yunheung Paek, Jui-Yuan Ku, Yuetsu Kodama, Yoshinori Yamaguchi |
Communication Studies of Single-Threaded and Multithreaded Distributed-Memory Multiprocessors. |
HPCA |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunheung Paek, Jay Hoeflinger, David A. Padua |
Simplification of Array Access Patterns for Compiler Optimizations. |
PLDI |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunheung Paek, Angeles G. Navarro, Emilio L. Zapata, David A. Padua |
Parallelization of Benchmarks for Scalable Shared-Memory Multiprocessors. |
IEEE PACT |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunheung Paek, David A. Padua |
Experimental Study of Compiler Techniques for NUMA Machines. (PDF / PS) |
IPPS/SPDP |
1998 |
DBLP DOI BibTeX RDF |
|
| 1 | Yunheung Paek, David A. Padua |
Compiling for Scalable Multiprocessors with Polaris. |
Parallel Processing Letters |
1997 |
DBLP BibTeX RDF |
|
| 1 | Angeles G. Navarro, Emilio L. Zapata, Yunheung Paek, David A. Padua |
Compiler Techniques for Effective Communication on Distributed-Memory Multiprocessors. (PDF / PS) |
ICPP |
1997 |
DBLP DOI BibTeX RDF |
Parallelization, Compiler, Data Distribution, Communication Analysis |
| 1 | William Blume, Ramon Doallo, Rudolf Eigenmann, John Grout, Jay Hoeflinger, Thomas Lawrence, Jaejin Lee, David A. Padua, Yunheung Paek, William M. Pottenger, Lawrence Rauchwerger, Peng Tu |
Parallel Programming with Polaris. |
IEEE Computer |
1996 |
DBLP DOI BibTeX RDF |
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| 1 | William Blume, Rudolf Eigenmann, Keith Faigin, John Grout, Jaejin Lee, Thomas Lawrence, Jay Hoeflinger, David A. Padua, Yunheung Paek, Paul Petersen, William M. Pottenger, Lawrence Rauchwerger, Peng Tu, Stephen Weatherford |
Restructuring Programs for High-Speed Computers with Polaris. |
ICPP Workshop |
1996 |
DBLP BibTeX RDF |
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| 1 | Yunheung Paek, David A. Padua |
Automatic Parallelization for Non-cache Coherent Multiprocessors. |
LCPC |
1996 |
DBLP DOI BibTeX RDF |
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