Search results for "adaptive supply voltage"

Found 17 publication records. Showing 17 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy	Low-power carry-select adder using adaptive supply voltage based on input vector patterns.	ISLPED	2004	DBLP DOI BibTeX RDF	adaptive supply voltage, low power adder, carry-select adder
2	Woopyo Jeong, Bipul Chandra Paul, Kaushik Roy	Adaptive supply voltage technique for low swing interconnects.	ASP-DAC	2004	DBLP DOI BibTeX RDF
2	T. Chen, S. Naffziger	Comparison of adaptive body bias (ABB) and adaptive supply voltage (ASV) for improving delay and leakage under the presence of process variation.	IEEE Trans. VLSI Syst.	2003	DBLP DOI BibTeX RDF
2	W. Kuang, J. S. Yuan	An Adaptive Supply-Voltage Scheme for Low Power Self-Timed CMOS Digital Design.	VLSI Design	2003	DBLP DOI BibTeX RDF
1	Sven Lütkemeier, Thorsten Jungeblut, Mario Porrmann, Ulrich Rückert	A 200mV 32b subthreshold processor with adaptive supply voltage control.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Yuji Osaki, Tetsuya Hirose, Kei Matsumoto, Nobutaka Kuroki, Masahiro Numa	Robust Subthreshold CMOS Digital Circuit Design with On-Chip Adaptive Supply Voltage Scaling Technique.	IEICE Transactions	2011	DBLP BibTeX RDF
1	Kyu-Nam Shim, Jiang Hu, José Silva-Martínez	A dual-level adaptive supply voltage system for variation resilience.	ISQED	2010	DBLP DOI BibTeX RDF
1	Giacomo Paci, Davide Bertozzi, Luca Benini	Effectiveness of adaptive supply voltage and body bias as post-silicon variability compensation techniques for full-swing and low-swing on-chip communication channels.	DATE	2009	DBLP BibTeX RDF
1	Sanjay V. Kumar, Chris H. Kim, Sachin S. Sapatnekar	Adaptive techniques for overcoming performance degradation due to aging in digital circuits.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Saraju P. Mohanty	Unified Challenges in Nano-CMOS High-Level Synthesis.	VLSI Design	2009	DBLP DOI BibTeX RDF
1	Yink Khai Teh, Faisal Mohd-Yasin, Florence Choong, Mamun Bin Ibne Reaz	Design of adaptive supply voltage for sub-threshold logic based on sub-1 V bandgap reference circuit.	Microelectronics Journal	2008	DBLP DOI BibTeX RDF
1	Girish Varatkar, Sriram Narayanan, Naresh R. Shanbhag, Douglas L. Jones	Trends in energy-efficiency and robustness using stochastic sensor network-on-a-chip.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	reliable design, sensor network-on-chip, robust design
1	Sachin S. Sapatnekar	Adapting to the times [review of Adaptive Techniques for Dynamic Processor Optimization: Theory and Practice (Wang, A. and Naffziger, S., Eds.; 2008)].	IEEE Design & Test of Computers	2008	DBLP DOI BibTeX RDF
1	Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy	Adaptive Supply Voltage for Low-Power Ripple-Carry and Carry-Select Adders.	IEICE Transactions	2007	DBLP DOI BibTeX RDF
1	James Tschanz, Siva Narendra, Ali Keshavarzi, Vivek De	Adaptive circuit techniques to minimize variation impacts on microprocessor performance and power.	ISCAS	2005	DBLP DOI BibTeX RDF
1	Mauro Olivieri, Mirko Scarana, Giuseppe Scotti, Alessandro Trifiletti	Yield Optimization by Means of Process Parameters Estimation: Comparison Between ABB and ASV Techniques.	PATMOS	2004	DBLP DOI BibTeX RDF
1	Hiroaki Suzuki, Woopyo Jeong, Kaushik Roy	Low Power Adder with Adaptive Supply Voltage.	ICCD	2003	DBLP DOI BibTeX RDF