Search results for "architectural performance"

Found 11 publication records. Showing 11 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Dennis B. Mulcare	System-level optimization of architectural performance under varying service demands.	ECBS	1996	DBLP DOI BibTeX RDF	system-level optimization, architectural performance, varying service demands, cost-performance measures, dynamic performance, varying workload, system resource parameters, architecture parameters, online transaction processing system, fitness metric, fitness ranking, multiple mutation operator mechanism, genetic algorithms, genetic algorithm, optimization, distributed processing, convergence, system design, systems analysis, performance measures, transaction processing, software performance evaluation, software prototyping, tolerances, online operation, chromosome, distributed system architectures
1	Yi-Siou Chen, Lih-Yih Chiou, Hsun-Hsiang Chang	A fast and effective dynamic trace-based method for analyzing architectural performance.	ASP-DAC	2011	DBLP DOI BibTeX RDF
1	Klaus Krogmann, Christian M. Schweda, Sabine Buckl, Michael Kuperberg, Anne Martens, Florian Matthes	Improved Feedback for Architectural Performance Prediction Using Software Cartography Visualizations.	QoSA	2009	DBLP DOI BibTeX RDF
1	Padma Apparao, Ravi R. Iyer, Ricardo Morin, Naren Nayak, Mahesh Bhat, David Halliwell, William Steinberg	Architectural Characterization of an XML-Centric Commercial Server Workload.	ICPP	2004	DBLP DOI BibTeX RDF
1	Andy D. Pimentel, Cagkan Erbas	An IDF-based trace transformation method for communication refinement.	DAC	2003	DBLP DOI BibTeX RDF	communication refinement, design space exploration
1	Kevin M. Lepak, Harold W. Cain, Mikko H. Lipasti	Redeeming IPC as a Performance Metric for Multithreaded Programs.	IEEE PACT	2003	DBLP DOI BibTeX RDF
1	Matthias Jacob, Keith H. Randall	Cross-Architectural Performance Portability of a Java Virtual Machine Implementation.	Java Virtual Machine Research and Technology Symposium	2002	DBLP BibTeX RDF
1	Kwang-Hoon Kim, Clarence A. Ellis	Workflow performance and scalability analysis using the layered queuing modeling methodology.	GROUP	2001	DBLP DOI BibTeX RDF	architectural performance analysis, architectural quality attribute, hardware contention model, method of layer (MOL), performance analytic model, software contention model, taxonomy of workflow architectures, performance, scalability, architectural framework
1	Pradip Bose	Ensuring Dependable Processor Performance: An Experience Report on Pre-Silicon Performance Validation.	DSN	2001	DBLP DOI BibTeX RDF
1	H. Tanaka	Toward more advanced usage of instruction level parallelism by a very large data path processor architecture.	ISPAN	1997	DBLP DOI BibTeX RDF	very large data path processor, instruction analysis, parallel gain, parallel architectures, microprocessor, instruction level parallelism, processor architecture, performance gain
1	S. Surya, Pradip Bose, Jacob A. Abraham	Architectural Performance Verification: PowerPCTM Processors.	ICCD	1994	DBLP BibTeX RDF