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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 26387 occurrences of 7453 keywords
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Results
Found 27063 publication records. Showing 27063 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 7 | Julio Villalba, J. C. Arrabal, Emilio L. Zapata, Elisardo Antelo, Javier D. Bruguera |
Radix-4 Vectoring Cordic Algorithm And Architectures.  |
ASAP  |
1996 |
DBLP DOI BibTeX RDF |
radix-4 vectoring CORDIC algorithm, radix-4 vectoring CORDIC architectures, vectoring mode, microrotations, zero skipping technique, recursive architectures, matrix triangularization, rotation angle, computational complexity, complexity, parallel architectures, singular value decomposition, SVD, signal processing, digital arithmetic, digital arithmetic, matrix algebra, pipelined architectures |
| 6 | Reiner W. Hartenstein, Jürgen Becker, Michael Herz, Rainer Kress, Ulrich Nageldinger |
A Synthesis System For Bus-Based Wavefront Array Architectures.  |
ASAP  |
1996 |
DBLP DOI BibTeX RDF |
synthesis system, bus-based wavefront array architectures, datapath synthesis system, reconfigurable datapath architecture, internal data bus, automatic mapping, datapath units, high speed datapaths, parallel architectures, rapid prototyping, reconfigurable architectures, software prototyping, fine grained parallelism, data manipulations |
| 5 | JongSoo Park, William J. Dally |
Buffer-space efficient and deadlock-free scheduling of stream applications on multi-core architectures.  |
SPAA  |
2010 |
DBLP DOI BibTeX RDF |
compiler and tools for concurrent programming, green computing and power-efficient architectures, multi-core architectures, stream programming |
| 5 | Marco Ferretti |
Multi-Media Extensions in Super-Pipelined Micro-Architectures. A New Case for SIMD Processing?  |
CAMP  |
2000 |
DBLP DOI BibTeX RDF |
super-pipelined microarchitectures, general purpose microprocessors, Von-Neumann paradigm, image processing, parallel architectures, associated memory, instruction set architectures, massively parallel processors, multimedia extensions, SIMD processing |
| 5 | Richard T. Bechtold |
Diagnostic Software Architectures.  |
ESPRIT ARES Workshop  |
1998 |
DBLP DOI BibTeX RDF |
Diagnostic Software Architectures, Error Management, Software Families, Embedded Systems, Software Architectures |
| 5 | Roberto R. Osorio, Javier D. Bruguera |
New arithmetic coder/decoder architectures based on pipelining.  |
ASAP  |
1997 |
DBLP DOI BibTeX RDF |
arithmetic coder/decoder architectures, arithmetic encoding, arithmetic decoding, multilevel images, cycle length, VLSI, pipelining, VLSI architectures |
| 5 | Carl Ebeling, Darren C. Cronquist, Paul Franklin |
Configurable computing: the catalyst for high-performance architectures.  |
ASAP  |
1997 |
DBLP DOI BibTeX RDF |
high-performance architectures, cost-performance, application-specific computation pipelines, static configuration, FPGAs, computational complexity, computer architectures, configurable computing, dynamic control, RaPiD, application-specific hardware |
| 5 | Jing-Chiou Liou, Michael A. Palis |
CASS: an efficient task management system for distributed memory architectures.  |
ISPAN  |
1997 |
DBLP DOI BibTeX RDF |
CASS, granularity optimization, parallel algorithm, parallelism, compiler, parallel architectures, operating system, task scheduling, task management, distributed memory architectures |
| 5 | James D. Allen, David E. Schimmel |
The impact of pipelining on SIMD architectures. (PDF / PS)  |
IPPS  |
1995 |
DBLP DOI BibTeX RDF |
massively parallel SIMD architectures, stall penalties, reduction operations, Scheduling mechanisms, area costs, scheduling, parallel architectures, pipelining, program compilers, pipeline processing, performance improvement, SIMD architectures, instruction delivery |
| 4 | Yahya Jan, Lech Józwiak |
CABAC Accelerator Architectures for Video Compression in Future Multimedia: A Survey.  |
SAMOS  |
2009 |
DBLP DOI BibTeX RDF |
RC hardware architectures, UHDTV, H.264/AVC, video compression, accelerators, multimedia processing, CABAC |
| 4 | Friman Sánchez, Alex Ramírez, Mateo Valero |
Quantitative analysis of sequence alignment applications on multiprocessor architectures.  |
Conf. Computing Frontiers  |
2009 |
DBLP DOI BibTeX RDF |
bioinformatics applications, parallel architectures, multiprocessor architectures, sequence comparison |
| 4 | Yahya Jan, Lech Józwiak |
Survey of Advanced CABAC Accelerator Architectures for Future Multimedia.  |
ARC  |
2009 |
DBLP DOI BibTeX RDF |
RC hardware architectures, UHDTV, H.264/AVC, video compression, accelerators, multimedia processing, CABAC |
| 4 | Gustavo Alonso |
Challenges and Opportunities for Formal Specifications in Service Oriented Architectures.  |
Petri Nets  |
2008 |
DBLP DOI BibTeX RDF |
Web Services, Service Oriented Architectures, Workflow, Business Processes, Declarative Languages, Multi-tier architectures |
| 4 | Jesper Berthing, Thomas Maier |
A Taxonomy for Modelling Safety Related Architectures in Compliance with Functional Safety Requirements.  |
SAFECOMP  |
2007 |
DBLP DOI BibTeX RDF |
dependable architectures, safety related architectures, IEC61508 |
| 4 | Claudia Canali, Sara Casolari, Riccardo Lancellotti |
Architectures for scalable and flexible Web personalization services.  |
AAA-IDEA  |
2005 |
DBLP DOI BibTeX RDF |
Web content adaptation, High performance architectures, Web content delivery |
| 4 | Flávio Oquendo |
pi-ADL: an Architecture Description Language based on the higher-order typed pi-calculus for specifying dynamic and mobile software architectures.  |
ACM SIGSOFT Software Engineering Notes  |
2004 |
DBLP DOI BibTeX RDF |
specification languages, Architecture Description Languages, ?-calculus, dynamic architectures, mobile architectures |
| 4 | Predrag Knezevic, Bhaskar Mehta, Claudia Niederée, Thomas Risse, Ulrich Thiel, Ingo Frommholz |
Supporting Information Access in Next Generation Digital Library Architectures.  |
DELOS Workshop: Digital Library Architectures - LNCS Volume  |
2004 |
DBLP DOI BibTeX RDF |
|
| 4 | Danilo Ardagna, Chiara Francalanci |
A cost-oriented methodology for the design of web based IT architectures.  |
SAC  |
2002 |
DBLP DOI BibTeX RDF |
IT architectures, web architectures, cost minimization |
| 4 | Nathan Combs, Jeff Vagle |
Adaptive mirroring of system of systems architectures.  |
WOSS  |
2002 |
DBLP DOI BibTeX RDF |
adaptive mirroring, self-healing architectures, service and contract workflow, agent architectures |
| 4 | Patrice Quinton, Tanguy Risset |
Structured Scheduling of Recurrence Equations: Theory and Practice.  |
Embedded Processor Design Challenges  |
2002 |
DBLP DOI BibTeX RDF |
parallelization of loop nests, structured recurrence equations, automatic synthesis of parallel architectures, parallel VLSI architectures, scheduling |
| 4 | Joanna Bryson, Lynn Andrea Stein |
Modularity and Specialized Learning: Mapping between Agent Architectures and Brain Organization.  |
Emergent Neural Computational Architectures Based on Neuroscience  |
2001 |
DBLP DOI BibTeX RDF |
Structural and Temporal Modularity, Complete Autonomous Agents, Behavior-Based AI, Brain Organization, Action Selection and Synchronization, Perceptual, Episodic and Semantic Memory, Spatial |
| 4 | Krishna M. Kavi, Roberto Giorgi, Joseph Arul |
Scheduled Dataflow: Execution Paradigm, Architecture, and Performance Evaluation.  |
IEEE Trans. Computers  |
2001 |
DBLP DOI BibTeX RDF |
superscalar, Thread Level Parallelism, Multithreaded architectures, decoupled architectures, dataflow architectures |
| 4 | William L. Freking, Keshab K. Parhi |
Performance-Scalable Array Architectures for Modular Multiplication.  |
ASAP  |
2000 |
DBLP DOI BibTeX RDF |
high-radix algorithms, cylindrical arrays, folding transformation, systolic arrays, modular multiplication, scalable architectures |
| 4 | Ralf-Dieter Schimkat, Gerd Nusser, Dieter Bühler |
Scalability and Interoperability in Service-Centric Architectures for the Web. (PDF / PS)  |
DEXA Workshops  |
2000 |
DBLP DOI BibTeX RDF |
service-centric architectures, decentralized distributed software architectures, service node network, heterogenous services, security, Internet, scalability, interoperability, Web, bandwidth, open systems, object migration, code migration |
| 4 | Mahmut T. Kandemir, J. Ramanujam, Alok N. Choudhary |
Compiler Algorithms for Optimizing Locality and Parallelism on Shared and Distributed Memory Machines.  |
IEEE PACT  |
1997 |
DBLP DOI BibTeX RDF |
storage layout, SUN SPARCstation 5, IBM SP-2, SGI Challenge, Convex Exemplar, parallel architectures, parallel architectures, optimizing compilers, interprocessor communication, cache performance, distributed memory machines, shared memory machines, loop nests, data decomposition, compiler algorithms |
| 4 | Thomas M. Conte, Sanjeev Banerjia, Sergei Y. Larin, Kishore N. Menezes, Sumedh W. Sathaye |
Instruction Fetch Mechanisms for VLIW Architectures with Compressed Encodings.  |
MICRO  |
1996 |
DBLP BibTeX RDF |
TINKER experimental testbed, compressed encodings, compressed instruction encoding, i-fetch hardware, instruction fetch mechanisms, instruction words, multiple instruction issue, silo cache, parallel architectures, trace-driven simulations, instruction cache, VLIW architectures |
| 4 | Chi-Hsiang Yeh, Behrooz Parhami |
Swapped networks: unifying the architectures and algorithms of a wide class of hierarchical parallel processors. (PDF / PS)  |
ICPADS  |
1996 |
DBLP DOI BibTeX RDF |
swapped networks, hierarchical parallel processors, high-dimensional meshes, generalized hypercubes, fixed-degree building blocks, parallel algorithms, interconnection networks, parallel architectures, parallel architectures, hypercubes, multiprocessor interconnection networks |
| 4 | Dedy Dewanto Tjhie, Helmut Rzehak |
Design and Performance Evaluation of Network Interconnection Architectures. (PDF / PS)  |
LCN  |
1996 |
DBLP DOI BibTeX RDF |
network interconnection architectures, protocol layer, output process, mean values, GI/G/1-K model, GI/G/1 model, performance evaluation, power, local area network, response time, performance metrics, high speed network, gateways, end-to-end delay, queueing network models, LAN interconnection, protocol architectures, service process, protocol stacks, buffer requirement, arrival process |
| 4 | R. S. Hogg, W. I. Hughes, David W. Lloyd |
A Novel Asynchronous ALU for Massively Parallel Architectures.  |
PDP  |
1996 |
DBLP DOI BibTeX RDF |
novel asynchronous ALU, self timed asynchronous bit serial massively parallel architecture, fixed word length, small magnitude data, self timed communication techniques, self timed single instruction systolic array, ST-SISA, self timed delay insensitive techniques, parallel architectures, systolic arrays, asynchronous circuits, clock skew, massively parallel architectures, clocked control, arithmetic logic unit |
| 4 | Anthony-Trung Nguyen, Maged M. Michael, Arun Sharma, Josep Torrellas |
The Augmint multiprocessor simulation toolkit for Intel x86 architectures. (PDF / PS)  |
ICCD  |
1996 |
DBLP DOI BibTeX RDF |
Augmint multiprocessor simulation toolkit, Intel x86 architectures, publicly available simulation tools, instruction mix, memory reference patterns, CISC architectures, execution driven multiprocessor simulation toolkit, m4 macro extended C, C++ applications, SPLASH-2 benchmark suites, thread based programming model, shared global address space, private stack space, simulator interface, MINT simulation toolkit, x8d based uniprocessor systems, multiprocessing systems, trace driven simulation, architecture simulators, uniprocessors |
| 4 | K. P. Lam, A. Furness |
On parallelization of neural classification algorithms.  |
ISPAN  |
1996 |
DBLP DOI BibTeX RDF |
neural classification algorithms, neural classifier architecture, neural architectures, VLSI processing model, neural networks, parallelization, parallel computation, parallel architectures, pattern classification, neural net architecture |
| 4 | D. K. Arvind, Robert D. Mullins, Vinod E. F. Rebello |
Micronets: a model for decentralising control in asynchronous processor architectures.  |
ASYNC  |
1995 |
DBLP DOI BibTeX RDF |
decentralising control, asynchronous processor architectures, micronets, communicating resources, four-phase protocol, hazard avoidance mechanisms, SPICE-level simulations, computer architecture, computer architecture, pipeline processing, processor architectures, fine-grain concurrency |
| 4 | Heejo Lee, Kenji Toda, Jong Kim, Kenji Nishida, Eiichi Takahashi, Yoshinori Yamaguchi |
Performance comparison of real-time architectures using simulation.  |
RTCSA  |
1995 |
DBLP DOI BibTeX RDF |
real-time architectures, discrete event-driven, task-based simulator, priority-based communication, simulation, schedulability, performance evaluation, real-time systems, parallel processing, predictability, distributed processing, discrete event simulation, performance prediction, network architectures, processor, distributed real-time systems, performance comparison, scheduling policy, parallel computer systems, dedicated processor, interrupt handling |
| 4 | Xian-He Sun, Jianping Zhu |
Performance prediction of scalable computing: a case study.  |
HICSS  |
1995 |
DBLP DOI BibTeX RDF |
high performance power, parallel machine architectures, single processor computing power, multi-ring KSR-1, shared virtual memory machine, topology variation, sophisticated hierarchical architecture, performance evaluation, parallel algorithms, parallel algorithms, scalability, parallel architectures, virtual machines, parallel machines, performance prediction, reconfigurable architectures, shared memory systems, scalable computing |
| 4 | Raminder Singh Bajwa, Robert Michael Owens, Mary Jane Irwin |
Area Time Trade-Offs in Micro-Grain VLSI Array Architectures.  |
IEEE Trans. Computers  |
1994 |
DBLP DOI BibTeX RDF |
area time trade-offs, micro-grain VLSI array architectures, massively parallel control-flow architectures, associative memory architecture, Mux-based SIMD architecture, systolic MIMD/MISD computation, data-flow requirements, performance evaluation, performance, VLSI, parallel architectures, FFT, matrix multiplication, RAMs |
| 4 | Patrick W. Dowd, Kalyani Bogineni, Khaled A. Aly, James A. Perreault |
Hierarchical Scalable Photonic Architectures for High-Performance Processor Interconnection.  |
IEEE Trans. Computers  |
1993 |
DBLP DOI BibTeX RDF |
photonic architectures, optical structures, processor interconnection, single-hop, optical fiber communication, parallel architectures, discrete-event simulation, discrete event simulation, analytic models, wavelength division multiplexing, wavelength division multiplexing, optical interconnections, hierarchical, parallel computer architecture, hierarchical architectures |
| 4 | Sylvie Norre |
Static Allocation of Tasks on Multiprocessor Architectures with Interprocessor Communication Delays.  |
PARLE  |
1993 |
DBLP DOI BibTeX RDF |
Deterministic scheduling, Task allocation on multiprocessor architectures, Stochastic scheduling |
| 4 | Hussein M. Alnuweiri, Viktor K. Prasanna |
Parallel Architectures and Algorithms for Image Component Labeling.  |
IEEE Trans. Pattern Anal. Mach. Intell.  |
1992 |
DBLP DOI BibTeX RDF |
image component labeling, computer vision, computer vision, parallel algorithms, parallel algorithms, parallel architectures, parallel architectures, image recognition |
| 3 | Jon G. Hall, John Grundy, Ivan Mistrík, Patricia Lago, Paris Avgeriou |
Introduction: Relating Requirements and Architectures.  |
Relating Software Requirements and Architectures  |
2011 |
DBLP DOI BibTeX RDF |
|
| 3 | Luciano Baresi, Liliana Pasquale |
Adaptation Goals for Adaptive Service-Oriented Architectures.  |
Relating Software Requirements and Architectures  |
2011 |
DBLP DOI BibTeX RDF |
|
| 3 | Nikos Hardavellas, Michael Ferdman, Babak Falsafi, Anastasia Ailamaki |
Near-Optimal Cache Block Placement with Reactive Nonuniform Cache Architectures.  |
IEEE Micro  |
2010 |
DBLP DOI BibTeX RDF |
nonuniform cache architectures, parallel architectures, multicore, cache memories, data placement |
| 3 | Iván García-Magariño, Massimo Cossentino, Valeria Seidita |
A metrics suite for evaluating agent-oriented architectures.  |
SAC  |
2010 |
DBLP DOI BibTeX RDF |
multi-agent systems, architectures, metrics, agent-oriented software engineering |
| 3 | Vijay Anand Korthikanti, Gul Agha |
Towards optimizing energy costs of algorithms for shared memory architectures.  |
SPAA  |
2010 |
DBLP DOI BibTeX RDF |
performance, parallel algorithms, energy, shared memory architectures |
| 3 | David A. Koufaty, Dheeraj Reddy, Scott Hahn |
Bias scheduling in heterogeneous multi-core architectures.  |
EuroSys  |
2010 |
DBLP DOI BibTeX RDF |
scheduling, heterogeneous architectures |
| 3 | Virgil D. Gligor |
Architectures for practical security.  |
SACMAT  |
2010 |
DBLP DOI BibTeX RDF |
architectures |
| 3 | Lukasz Strozek, David Brooks |
Energy- and area-efficient architectures through application clustering and architectural heterogeneity.  |
TACO  |
2009 |
DBLP DOI BibTeX RDF |
Efficient custom architectures, heterogeneous ISA processors |
| 3 | Tom Ziemke, Robert Lowe |
On the Role of Emotion in Embodied Cognitive Architectures: From Organisms to Robots.  |
Cognitive Computation  |
2009 |
DBLP DOI BibTeX RDF |
Homeostasis, Emotion, Motivation, Computational modeling, Organisms, Affect, Cognitive architectures, Grounding, Cognitive robotics, Embodied cognition |
| 3 | Paul Gastin, Nathalie Sznajder, Marc Zeitoun |
Distributed synthesis for well-connected architectures.  |
Formal Methods in System Design  |
2009 |
DBLP DOI BibTeX RDF |
Synthesis problem, Synchronous architectures, Distributed systems |
| 3 | Luigi Carro, Stephan Wong |
Introduction to the Future of Reconfigurable Computing and Processor Architectures.  |
SAMOS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Pavel G. Zaykov, Georgi Kuzmanov, Georgi Nedeltchev Gaydadjiev |
Reconfigurable Multithreading Architectures: A Survey.  |
SAMOS  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Niranjan Suri |
Dynamic service-oriented architectures for tactical edge networks.  |
WEWST  |
2009 |
DBLP DOI BibTeX RDF |
dynamic service-oriented architectures, tactical edge networks, load balancing, service discovery, green computing, service migration |
| 3 | Bertil Schmidt, Douglas L. Maskell |
Workshop on Using Emerging Parallel Architectures for Computational Science.  |
ICCS  |
2009 |
DBLP DOI BibTeX RDF |
High Performance Computing, Reconfigurable Computing, Computational Science, GPGPU, Parallel Computer Architectures, Heterogeneous Multi-cores |
| 3 | Anne E. James, Joshua Cooper, Keith G. Jeffery, Gunter Saake |
Research Directions in Database Architectures for the Internet of Things: A Communication of the First International Workshop on Database Architectures for the Internet of Things (DAIT 2009).  |
BNCOD  |
2009 |
DBLP DOI BibTeX RDF |
Security, Privacy, Trust, Searching, Benchmarking, Sensors, Time-series, Transactions, Database Management, State, Internet of Things, Storage Structures, Storage Structures, Services Architecture, Database Architectures |
| 3 | Youssouf Zatout, Eric Campo, Jean-François Llibre |
Toward hybrid WSN architectures for monitoring people at home.  |
MEDES  |
2009 |
DBLP DOI BibTeX RDF |
wireless body area network (WBAN), wireless sensor networks (WSNs), evaluation metrics, hybrid architectures, design framework, home monitoring |
| 3 | Christoph Schroth, Beat Schmid, Willy Müller |
Designing Modular Architectures for Cross-Organizational Electronic Interaction.  |
UNISCON  |
2009 |
DBLP DOI BibTeX RDF |
Cross-Organizational Electronic Interaction, Modular Architectures |
| 3 | Heiko Koziolek, Roland Weiss, Jens Doppelhamer |
Evolving Industrial Software Architectures into a Software Product Line: A Case Study.  |
QoSA  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Ian Gray, Neil C. Audsley |
Exposing non-standard architectures to embedded software using compile-time virtualisation.  |
CASES  |
2009 |
DBLP DOI BibTeX RDF |
architectures, virtualization, embedded, application-specific, compile-time |
| 3 | Muhammad Umar Farooq, Lizy K. John |
Loop-Aware Instruction Scheduling with Dynamic Contention Tracking for Tiled Dataflow Architectures.  |
CC  |
2009 |
DBLP DOI BibTeX RDF |
tiled dataflow architectures, operand network latency, instruction scheduling, resource contention |
| 3 | Marc Erich Latoschik, Dirk Reiners, Roland Blach, Pablo Figueroa, Raimund Dachselt |
SEARIS: software engineering and architectures for realtime interactive systems.  |
OOPSLA Companion  |
2009 |
DBLP DOI BibTeX RDF |
virtual reality, interaction, software architectures, augmented reality, frameworks, design patterns, abstraction, mixed reality, reusability, behavior |
| 3 | Mythri Alle, Keshavan Varadarajan, Alexander Fell, S. K. Nandy, Ranjani Narayan |
Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures.  |
ARC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Jean-Claude Charr, Raphaël Couturier, David Laiymani |
JACEP2P-V2: A Fully Decentralized and Fault Tolerant Environment for Executing Parallel Iterative Asynchronous Applications on Volatile Distributed Architectures.  |
GPC  |
2009 |
DBLP DOI BibTeX RDF |
Decentralized global Convergence, Parallel iterative asynchronous algorithms, Distributed clusters, Peer-to-Peer architectures |
| 3 | Damián A. Mallón, Guillermo L. Taboada, Carlos Teijeiro, Juan Touriño, Basilio B. Fraguela, Andrés Gómez, Ramon Doallo, José Carlos Mouriño |
Performance Evaluation of MPI, UPC and OpenMP on Multicore Architectures.  |
PVM/MPI  |
2009 |
DBLP DOI BibTeX RDF |
NAS Parallel Benchmarks (NPB), Performance Evaluation, MPI, OpenMP, Multicore Architectures, UPC |
| 3 | Víctor J. Jiménez, Lluís Vilanova, Isaac Gelado, Marisa Gil, Grigori Fursin, Nacho Navarro |
Predictive Runtime Code Scheduling for Heterogeneous Architectures.  |
HiPEAC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Muhammad Umar Farooq, Lizy Kurian John, Margarida F. Jacome |
Compiler Controlled Speculation for Power Aware ILP Extraction in Dataflow Architectures.  |
HiPEAC  |
2009 |
DBLP DOI BibTeX RDF |
Tiled dataflow architectures, predication, power-performance trade-offs |
| 3 | Mattias V. Eriksson, Christoph W. Kessler |
Integrated Modulo Scheduling for Clustered VLIW Architectures.  |
HiPEAC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Taewook Oh, Bernhard Egger, Hyunchul Park, Scott A. Mahlke |
Recurrence cycle aware modulo scheduling for coarse-grained reconfigurable architectures.  |
LCTES  |
2009 |
DBLP DOI BibTeX RDF |
software pipelining, placement and routing, coarse-grained reconfigurable architectures |
| 3 | Roberto Giorgi, Zdravko Popovic, Nikola Puzovic |
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture.  |
SAMOS  |
2009 |
DBLP DOI BibTeX RDF |
DTA, many-core architectures |
| 3 | Ronald G. Dreslinski, David Fick, David Blaauw, Dennis Sylvester, Trevor N. Mudge |
Reconfigurable Multicore Server Processors for Low Power Operation.  |
SAMOS  |
2009 |
DBLP DOI BibTeX RDF |
Server Architectures, Low Power, Reconfigurable |
| 3 | Asma Kahoul, George A. Constantinides, Alastair M. Smith, Peter Y. K. Cheung |
Heterogeneous Architecture Exploration: Analysis vs. Parameter Sweep.  |
ARC  |
2009 |
DBLP DOI BibTeX RDF |
FPGA, Reconfigurable architectures, Floorplanning, integer linear programming (ILP) |
| 3 | Adrian Paschke, Paul Vincent |
A reference architecture for Event Processing.  |
DEBS  |
2009 |
DBLP DOI BibTeX RDF |
system architectures, complex event processing, reference architecture, domain-specific architectures |
| 3 | Gerard Briscoe, Philippe De Wilde |
Computing of applied digital ecosystems.  |
MEDES  |
2009 |
DBLP DOI BibTeX RDF |
distributed evolutionary computing, ecosystem-oriented architectures, multi-agent systems, service-oriented architectures |
| 3 | Romain Rouvoy, Paolo Barone, Yun Ding, Frank Eliassen, Svein O. Hallsteinsen, Jorge Lorenzo, Alessandro Mamelli, Ulrich Scholz |
MUSIC: Middleware Support for Self-Adaptation in Ubiquitous and Service-Oriented Environments.  |
Software Engineering for Self-Adaptive Systems ![In: Software Engineering for Self-Adaptive Systems [outcome of a Dagstuhl Seminar], pp. 164-182, 2009, Springer, 978-3-642-02160-2. The full citation details ...](Pics/full.jpeg) |
2009 |
DBLP DOI BibTeX RDF |
Adaptation planning, service-oriented architectures, self-adaptation, component-based architectures |
| 3 | Bernhard Scholz, Bernd Burgstaller, Jingling Xue |
Minimal placement of bank selection instructions for partitioned memory architectures.  |
ACM Trans. Embedded Comput. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
Partitioned boolean quadratic programming, bank selection, partitioned memory architectures |
| 3 | Matteo Monchiero, Ramon Canal, Antonio González |
Power/Performance/Thermal Design-Space Exploration for Multicore Architectures.  |
IEEE Trans. Parallel Distrib. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
simulation of, Modeling, evaluation, Measurement, Parallel Architectures, Shared memory, Energy-aware systems, multiple-processor systems |
| 3 | Nastaran Baradaran, Pedro C. Diniz |
A compiler approach to managing storage and memory bandwidth in configurable architectures.  |
ACM Trans. Design Autom. Electr. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
high-level hardware synthesis, storage allocation and management, Compiler analysis, configurable architectures |
| 3 | Marjan Karkooti, Predrag Radosavljevic, Joseph R. Cavallaro |
Configurable LDPC Decoder Architectures for Regular and Irregular Codes.  |
Signal Processing Systems  |
2008 |
DBLP DOI BibTeX RDF |
Error correcting codes, Reconfigurable architectures, Low density parity check codes |
| 3 | Hsin-Chou Chi, Chia-Ming Wu, Jun-Hui Lee |
Integrated Mapping and Scheduling for Circuit-Switched Network-on-Chip Architectures.  |
DELTA  |
2008 |
DBLP DOI BibTeX RDF |
network-on-chip architectures, scheduling, mapping, circuit-switched networks |
| 3 | Falko Bause, Peter Buchholz, Jan Kriege, Sebastian Vastag |
A Framework for Simulation Models of Service-Oriented Architectures.  |
SIPEW  |
2008 |
DBLP DOI BibTeX RDF |
Process Chains, Simulation, Service-Oriented Architectures, OMNeT++ |
| 3 | Jan W. M. Jacobs, Leroy van Engelen, Jan Kuper, Gerard J. M. Smit, Rui Dai |
IRIS: A Firmware Design Methodology for SIMD Architectures.  |
DSD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 3 | Christophe Wolinski, Krzysztof Kuchcinski, Jürgen Teich, Frank Hannig |
Communication Network Reconfiguration Overhead Optimization in Programmable Processor Array Architectures.  |
DSD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 3 | Magnus Själander, Andrei Terechko, Marc Duranton |
A Look-Ahead Task Management Unit for Embedded Multi-Core Architectures.  |
DSD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 3 | Annie A. M. Cuyt, Walter Krämer, Wolfram Luther, Peter W. Markstein |
08021 Summary - Numerical Validation in Current Hardware Architectures.  |
Numerical Validation in Current Hardware Architectures  |
2008 |
DBLP BibTeX RDF |
|
| 3 | Wolfram Luther, Annie A. M. Cuyt, Walter Krämer, Peter W. Markstein |
08021 Abstracts Collection - Numerical Validation in Current Hardware Architectures.  |
Numerical Validation in Current Hardware Architectures  |
2008 |
DBLP BibTeX RDF |
|
| 3 | Carolyn McGregor, J. Mikael Eklund |
Real-Time Service-Oriented Architectures to Support Remote Critical Care: Trends and Challenges.  |
COMPSAC  |
2008 |
DBLP DOI BibTeX RDF |
Neonatal Care, Intensive Care Unit, Critical Care, Service Oriented Architectures, Health Informatics, Event Stream Processing |
| 3 | Juha Savolainen, Anssi Karhinen |
Matching Service Requirements to Empirical Capability Models in Service-Oriented Architectures.  |
COMPSAC  |
2008 |
DBLP DOI BibTeX RDF |
service-oriented architectures, grid, services |
| 3 | Qi Li, Mingwei Xu, Ke Xu, Jianping Wu |
Evaluating Service Scalability of Network Architectures.  |
ICN  |
2008 |
DBLP DOI BibTeX RDF |
Service Scalability, Service Utility, Network architectures |
| 3 | Pramod Kumar Meher, Jagdish Chandra Patra |
Fully-pipelined efficient architectures for FPGA realization of discrete Hadamard transform.  |
ASAP  |
2008 |
DBLP DOI BibTeX RDF |
|
| 3 | David Dickin, Lesley Shannon |
Extending the SIMPPL SoC architectural framework to support application-specific architectures on multi-FPGA platforms.  |
ASAP  |
2008 |
DBLP DOI BibTeX RDF |
|
| 3 | Paolo Bonzini, Giovanni Ansaloni, Laura Pozzi |
Compiling custom instructions onto expression-grained reconfigurable architectures.  |
CASES  |
2008 |
DBLP DOI BibTeX RDF |
horizontal microprogramming, compilers, instruction set extensions, coarse-grained reconfigurable architectures, data-flow architectures |
| 3 | Antonio Carlos Schneider Beck, Mateus B. Rutzig, Georgi Gaydadjiev, Luigi Carro |
Run-time Adaptable Architectures for Heterogeneous Behavior Embedded Systems.  |
ARC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 3 | Eli Gjørven, Romain Rouvoy, Frank Eliassen |
Cross-layer self-adaptation of service-oriented architectures.  |
MW4SOC  |
2008 |
DBLP DOI BibTeX RDF |
planning-based adaptation framework, service-oriented architectures |
| 3 | Muhammad Abul Kalam Azad, Md. Ashik Ali Khan, Mahbubul Alam |
Government enterprise architectures: present status of Bangladesh and scope of development.  |
ICEGOV  |
2008 |
DBLP DOI BibTeX RDF |
federal enterprise architecture (FEA), government enterprise architectures (GEA), policy |
| 3 | Scott A. Hendrickson, Swaminathan Subramanian, André van der Hoek |
Multi-tiered design rationale for change set based product line architectures.  |
SHARK  |
2008 |
DBLP DOI BibTeX RDF |
design rationale, architectural knowledge, product line architectures |
| 3 | Licia Capra, Rami Bahsoon, Wolfgang Emmerich, Mohamed E. Fayad |
The international workshop on software architectures and mobility (SAM 2008).  |
ICSE Companion  |
2008 |
DBLP DOI BibTeX RDF |
mobility, software architectures |
| 3 | Shirish Tatikonda, Srinivasan Parthasarathy |
An adaptive memory conscious approach for mining frequent trees: implications for multi-core architectures.  |
PPOPP  |
2008 |
DBLP DOI BibTeX RDF |
CMP architectures, frequent tree mining |
| 3 | Adriano Idalgo, Nahri Moreano |
DNA Physical Mapping on a Reconfigurable Platform.  |
ARC  |
2008 |
DBLP DOI BibTeX RDF |
Consecutive ones problem, Software/hardware partitioning, Reconfigurable architectures |
| 3 | Cesare Pautasso, Olaf Zimmermann, Frank Leymann |
Restful web services vs. "big"' web services: making the right architectural decision.  |
WWW  |
2008 |
DBLP DOI BibTeX RDF |
WS-* vs. REST, architectural decision modeling, resource oriented architectures, technology comparison, web services, service oriented architectures, HTTP, SOAP, WSDL, REST |
| 3 | Roman Obermaisser |
Temporal Partitioning of Communication Resources in an Integrated Architecture.  |
IEEE Trans. Dependable Sec. Comput.  |
2008 |
DBLP DOI BibTeX RDF |
Infrastructure protection, System integration and implementation, Fault-tolerance, Distributed Systems, Design, System architectures, Distributed architectures, Real-time and embedded systems, Network communications, integration and modeling, Real-time distributed |
| 3 | Romain Rouvoy, Frank Eliassen, Jacqueline Floch, Svein O. Hallsteinsen, Erlend Stav |
Composing Components and Services Using a Planning-Based Adaptation Middleware.  |
Software Composition  |
2008 |
DBLP DOI BibTeX RDF |
Adaptation planning, service-oriented architectures, self-adaptation, component-based architectures |
| 3 | Pedro Chaparro, José González, Grigorios Magklis, Qiong Cai, Antonio González |
Understanding the Thermal Implications of Multi-Core Architectures.  |
IEEE Trans. Parallel Distrib. Syst.  |
2007 |
DBLP DOI BibTeX RDF |
Activity Migration, Dynamic Voltage, Multi-Core Architectures, Frequency Scaling, Dynamic Thermal Management |
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