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Found 7493 publication records. Showing 7493 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 7 | Michael J. Schulte, Earl E. Swartzlander Jr. |
Hardware Design and Arithmetic Algorithms for a Variable-Precision, Interval Arithmetic Coprocessor.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
arithmetic algorithms, computer arithmetic, hardware, Interval arithmetic, precision, coprocessor, numerical computations |
| 6 | Ulrich W. Kulisch |
Complete Interval Arithmetic and Its Implementation on the Computer.  |
Numerical Validation in Current Hardware Architectures  |
2008 |
DBLP DOI BibTeX RDF |
arithmetic standards, computer arithmetic, interval arithmetic, floating-point arithmetic |
| 6 | Vassil S. Dimitrov, Graham A. Jullien, William C. Miller |
Algorithms for Multi-Exponentiation Based on Complex Arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
1997 |
DBLP DOI BibTeX RDF |
multi-exponentiation algorithms, binary-like complex arithmetic, multiple modular exponentiation operations, performance, cryptographic protocols, digital arithmetic |
| 6 | Michael J. Flynn, Kevin J. Nowka, Gary Bewick, Eric M. Schwarz, Nhon T. Quach |
The SNAP Project: Towards Sub-Nanosecond Arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
floating-point multiplication, computer arithmetic, floating-point arithmetic, wave pipelining, floating-point addition |
| 5 | Jean-Claude Bajard, Laurent Imbert, Thomas Plantard |
Arithmetic Operations in the Polynomial Modular Number System.  |
IEEE Symposium on Computer Arithmetic  |
2005 |
DBLP DOI BibTeX RDF |
Table-based methods, Modular arithmetic, Lattice theory, Number system |
| 5 | Michael J. Schulte, Earl E. Swartzlander Jr. |
A Family of Variable-Precision Interval Arithmetic Processors.  |
IEEE Trans. Computers  |
2000 |
DBLP DOI BibTeX RDF |
variable-precision arithmetic, computer arithmetic, accuracy, Processors, interval arithmetic, hardware designs, roundoff error |
| 5 | Roberto R. Osorio, Javier D. Bruguera |
New arithmetic coder/decoder architectures based on pipelining.  |
ASAP  |
1997 |
DBLP DOI BibTeX RDF |
arithmetic coder/decoder architectures, arithmetic encoding, arithmetic decoding, multilevel images, cycle length, VLSI, pipelining, VLSI architectures |
| 5 | Mark G. Arnold, Thomas A. Bailey, John R. Cowles, Mark D. Winkel |
Arithmetic Co-transformations in the Real and Complex Logarithmic Number Systems.  |
IEEE Symposium on Computer Arithmetic  |
1997 |
DBLP DOI BibTeX RDF |
Logarithmic arithmetic, complex number system, addition and subtraction logarithm, co-transformation, interpolation, FFT |
| 5 | Gerben J. Hekstra, Ed F. Deprettere |
Fast Rotations: Low-cost Arithmetic Methods for Orthonormal Rotation.  |
IEEE Symposium on Computer Arithmetic  |
1997 |
DBLP DOI BibTeX RDF |
fast rotations, orthonormal, micro-rotations, computer arithmetic, CORDIC |
| 5 | Stuart F. Oberman, Hesham A. Al-Twaijry, Michael J. Flynn |
The SNAP Project: Design of Floating Point Arithmetic Unit.  |
IEEE Symposium on Computer Arithmetic  |
1997 |
DBLP DOI BibTeX RDF |
performance-area tradeoffs, computer arithmetic, multiplication, division, Addition, floating point unit |
| 5 | Manindra Agrawal, Eric Allender, Samir Datta |
On TC0, AC0, and Arithmetic Circuits. (PDF / PS)  |
IEEE Conference on Computational Complexity  |
1997 |
DBLP DOI BibTeX RDF |
TC/sup 0/, AC/sup 0/, function classes, constant-depth polynomial-size arithmetic circuits, unbounded fanin addition, multiplication gates, constant-depth arithmetic circuits, computational complexity, normal forms, arithmetic circuits, closure properties |
| 5 | Mercedes Peón, Roberto R. Osorio, Javier D. Bruguera |
A VLSI implementation of an arithmetic coder for image compression.  |
EUROMICRO  |
1997 |
DBLP DOI BibTeX RDF |
arithmetic coder, multilevel alphabet, cumulative probabilities, interval range, interval left point, module delays, design speed, chip area, operating frequency, 39 MHz, image compression, updating, VLSI implementation, arithmetic codes, redundant arithmetic |
| 5 | Vassil S. Dimitrov, Graham A. Jullien, William C. Miller |
Theory and applications for a double-base number system.  |
IEEE Symposium on Computer Arithmetic  |
1997 |
DBLP DOI BibTeX RDF |
basic arithmetic operations, index calculus, logarithmic-like arithmetic, hardware reductions, lookup table size, inner product computation, modular exponentiation computation, cryptography, digital signal processing, number theory, sparse representation, double-base number system, geometric interpretation |
| 5 | Albrecht P. Stroele |
Test response compaction using arithmetic functions.  |
VTS  |
1996 |
DBLP DOI BibTeX RDF |
arithmetic functions, combinational faults, underflow, feed back, logic testing, built-in self test, digital arithmetic, test pattern generation, adders, circuits, registers, aliasing probability, overflow, subtracters, test response compaction, arithmetic logic units |
| 5 | Jean-Claude Bajard, Laurent-Stéphane Didier, Jean-Michel Muller |
A New Euclidean Division Algorithm For Residue Number Systems.  |
ASAP  |
1996 |
DBLP DOI BibTeX RDF |
Euclidean division algorithm, large moduli, very large integers, high-radix division method, parallel computer, computational geometry, digital arithmetic, residue number systems, residue number systems, floating point arithmetic, floating-point arithmetic, modular arithmetic, special-purpose architecture |
| 5 | Takahiro Hanyu, Akira Mochizuki, Michitaka Kameyama |
Multiple-Valued Arithmetic Integrated Circuits Based on 1.5V-Supply Dual-Rail Source-Coupled Logic. (PDF / PS)  |
ISMVL  |
1995 |
DBLP DOI BibTeX RDF |
multiple-valued arithmetic integrated circuits, dual-rail source-coupled logic, multiple-valued current-mode MOS integrated circuit, high-speed arithmetic systems, multiple-valued source-coupled logic circuit, dual-rail complementary inputs, pipelined multiplier, 54 bit, 200 MHz, 0.8 mum, 1.5 V, CMOS logic circuits, multiplying circuits, multivalued logic circuits, current-mode logic, pipeline arithmetic |
| 5 | Christoph Baumhof |
A New VLSI Vector Arithmetic Coprocessor for the PC.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
accurate dot product, vector arithmetic coprocessor, Long Accumulator |
| 5 | Belle W. Y. Wei, He Du, Honglu Chen |
A complex-number multiplier using radix-4 digits.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
complex-number multiplier, radix-4 digits, arithmetic datapath, complex-number digital signal processor, binary signed digits, fast multiplication, compact layout, three-multiplication scheme, radix-4 operands, delays, delay, encoding, digital arithmetic, multiplying circuits, binary additions, coding scheme |
| 5 | Thomas Lynch, Ashraf Ahmed, Michael J. Schulte, Thomas K. Callaway, Robert Tisdale |
The K5 transcendental functions.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
K5 transcendental functions, AMD x86 compatible superscalar microprocessor, multi-level development cycle, design schedule, table-driven reductions, multiprecision arithmetic operations, encoding, polynomials, floating point arithmetic, microprocessor chips, approximation theory, polynomial approximations |
| 5 | Mark G. Arnold, Thomas A. Bailey, John R. Cowles, Mark D. Winkel |
Applying Features of IEEE 754 to Sign/Logarithm Arithmetic.  |
IEEE Trans. Computers  |
1992 |
DBLP DOI BibTeX RDF |
sign/logarithm arithmetic, standard floating point arithmetic, multilayer sign/logarithm format, denormalized values, NaNs, logarithmic denormalized arithmetic algorithms, standards, digital arithmetic, number theory, zeros, 32 bit, infinities, IEEE 754 |
| 5 | Mark G. Arnold, Thomas A. Bailey, John R. Cowles, Jerry J. Cupal |
Redundant Logarithmic Arithmetic.  |
IEEE Trans. Computers  |
1990 |
DBLP DOI BibTeX RDF |
32 bit subtraction, redundant logarithmic number system, 29-bit redundant logarithmic unit, ill-conditioned, iterated multiplications, redundant logarithmic arithmetic, redundancy, digital arithmetic, division, table lookups, table lookup, square root, number theory, memory requirement, storage requirements, online arithmetic, data values, arithmetic unit |
| 5 | Peter Kornerup, David W. Matula |
An Algorithm for Redundant Binary Bit-Pipelined Rational Arithmetic.  |
IEEE Trans. Computers  |
1990 |
DBLP DOI BibTeX RDF |
tree pipeline, Gosper, redundant binary bit-pipelined rational arithmetic, redundant binary representation, rational operands, partial quotient arithmetic algorithm, online arithmetic unit, signed bit level, binary radix, binary rational representation, online delays, simulation, parallel computation, redundancy, interconnection, product, digital arithmetic, number theory, difference, quotient, sum |
| 5 | Ulrich W. Kulisch |
Mathematical Foundation of Computer Arithmetic.  |
IEEE Trans. Computers  |
1977 |
DBLP DOI BibTeX RDF |
Axiomatic definition of computer arithmetic, rounding analysis, theory and implementation of computer arithmetic, interval arithmetic, numerical analysis, floating-point arithmetic |
| 5 | E. V. Krishnamurthy |
Matrix Processors Using p-adic Arithmetic for Exact Linear Computations.  |
IEEE Trans. Computers  |
1977 |
DBLP DOI BibTeX RDF |
exact linear computation, matrix processor, p-adic arithmetic, rational arithmetic, Computational complexity, linear equations, Gaussian elimination, residue arithmetic, Galois-field arithmetic |
| 5 | John R. Ehrman |
Correction to "logical" arithmetric on computers with two's complement binary arithmetic.  |
Commun. ACM  |
1970 |
DBLP DOI BibTeX RDF |
binary arithmetric, full-precision arithmetic, maximum significance arithmetic, unsigned operand arithmetic |
| 5 | John R. Ehrman |
"Logical" arithmetic on computers with two's complement binary arithmetic.  |
Commun. ACM  |
1968 |
DBLP DOI BibTeX RDF |
binary arithmetic, full-precision arithmetic, maximum significance arithmetic, unsigned operand arithmetic |
| 4 | Krzysztof R. Apt, Peter Zoeteweij |
An Analysis of Arithmetic Constraints on Integer Intervals.  |
Constraints  |
2007 |
DBLP DOI BibTeX RDF |
Arithmetic constraints, Integer interval arithmetic, Constraint propagation, Local consistency |
| 4 | Chichyang Chen, Paul Chow |
Design of a versatile and cost-effective hybrid floating-point/LNS arithmetic processor.  |
ACM Great Lakes Symposium on VLSI  |
2007 |
DBLP DOI BibTeX RDF |
exponential computation, logarithmic computation, logarithmic number system (LNS) arithmetic, floating-point arithmetic |
| 4 | Marius Cornea, Cristina Anderson, John Harrison, Ping Tak Peter Tang, Eric Schneider, Charles Tsen |
A Software Implementation of the IEEE 754R Decimal Floating-Point Arithmetic Using the Binary Encoding Format.  |
IEEE Symposium on Computer Arithmetic  |
2007 |
DBLP DOI BibTeX RDF |
|
| 4 | Higinio Mora Mora, Jerónimo Mora Pascual, Juan Manuel García Chamizo, Antonio Jimeno-Morenilla |
Real-time arithmetic unit.  |
Real-Time Systems  |
2006 |
DBLP DOI BibTeX RDF |
Real-time, Computer arithmetic, Imprecise computation, Multiple-precision arithmetic |
| 4 | Gunnar Gaubatz, Berk Sunar |
Robust Finite Field Arithmetic for Fault-Tolerant Public-Key Cryptography.  |
FDTC  |
2006 |
DBLP DOI BibTeX RDF |
homomorphic embedding, modulus scaling, fault tolerance, error detection, public-key cryptography, arithmetic codes, Finite field arithmetic, cyclic codes, idempotency |
| 4 | Robert Granger, Dan Page, Martijn Stam |
Hardware and Software Normal Basis Arithmetic for Pairing-Based Cryptography in Characteristic Three.  |
IEEE Trans. Computers  |
2005 |
DBLP DOI BibTeX RDF |
computer arithmetic, Public key cryptosystems, high-speed arithmetic |
| 4 | Behzad Akbarpour, Sofiène Tahar, Abdelkader Dekdouk |
Formalization of Fixed-Point Arithmetic in HOL.  |
Formal Methods in System Design  |
2005 |
DBLP DOI BibTeX RDF |
theorem-proving, floating-point arithmetic, fixed-point arithmetic, HOL |
| 4 | Marc Daumas, Guillaume Melquiond, César Muñoz |
Guaranteed Proofs Using Interval Arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
2005 |
DBLP DOI BibTeX RDF |
|
| 4 | Yves Nievergelt |
Analysis and applications of Priest's distillation.  |
ACM Trans. Math. Softw.  |
2004 |
DBLP DOI BibTeX RDF |
fused multiply-add instruction, matrix arithmetic, provable accuracy, interval arithmetic, Floating-point arithmetic, rounding error, complex arithmetic |
| 4 | Yves Nievergelt |
Scalar fused multiply-add instructions produce floating-point matrix arithmetic provably accurate to the penultimate digit.  |
ACM Trans. Math. Softw.  |
2003 |
DBLP DOI BibTeX RDF |
Doubly compensated summation, fused multiply-add instruction, matrix arithmetic, provable accuracy, floating-point arithmetic, rounding error |
| 4 | Sorin Cotofana, Casper Lageweg, Stamatis Vassiliadis |
On Computing Addition Related Arithmetic Operations via Controlled Transport of Charge.  |
IEEE Symposium on Computer Arithmetic  |
2003 |
DBLP DOI BibTeX RDF |
|
| 4 | Hossam A. H. Fahmy, Michael J. Flynn |
The Case for a Redundant Format in Floating Point Arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
2003 |
DBLP DOI BibTeX RDF |
|
| 4 | Mustafa Demirci |
Artihmetic of Fuzzy Quantities Based On Vague Arithmetic Operations.  |
IFSA  |
2003 |
DBLP DOI BibTeX RDF |
Vague arithmetic, Fuzzy equivalence relation, Indistinguishability operator, Fuzzy function, Fuzzy arithmetic |
| 4 | Aryan Saed, Majid Ahmadi, Graham A. Jullien |
A Number System with Continuous Valued Digits and Modulo Arithmetic.  |
IEEE Trans. Computers  |
2002 |
DBLP DOI BibTeX RDF |
continuous digits, modulo arithmetic, low-noise circuitry, Computer arithmetic, multiple-valued logic |
| 4 | Sridhar Rajagopal, Joseph R. Cavallaro |
On-line Arithmetic for Detection in Digital Communication Receivers.  |
IEEE Symposium on Computer Arithmetic  |
2001 |
DBLP DOI BibTeX RDF |
|
| 4 | Yozo Hida, Xiaoye S. Li, David H. Bailey |
Algorithms for Quad-Double Precision Floating Point Arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
2001 |
DBLP DOI BibTeX RDF |
|
| 4 | Albrecht P. Stroele, Steffen Tarnick |
Embedded Checker Architectures for Cyclic and Low-Cost Arithmetic Codes.  |
J. Electronic Testing  |
2000 |
DBLP DOI BibTeX RDF |
code checkers, code word accumulators, code word generators, embedded checkers, cyclic arithmetic codes, low-cost arithmetic codes, built-in self-test, on-line test, totally self-checking checkers |
| 4 | Katarzyna Radecka, Zeljko Zilic |
Using Arithmetic Transform for Verification of Datapath Circuits via Error Modeling.  |
VTS  |
2000 |
DBLP DOI BibTeX RDF |
arithmetic transforms, functional verification, arithmetic circuits |
| 4 | Norbert Th. Müller |
The iRRAM: Exact Arithmetic in C++.  |
CCA  |
2000 |
DBLP DOI BibTeX RDF |
Computable Real Analysis, Multi-valued functions, C++, Interval Arithmetic, Limits, Random Access Machines, Multiple Precision Arithmetic |
| 4 | Takafumi Aoki, Ken-ichi Hoshi, Tatsuo Higuchi |
Redundant Complex Arithmetic and Its Application to Complex Multiplier Design. (PDF / PS)  |
ISMVL  |
1999 |
DBLP DOI BibTeX RDF |
Complex Number System, VLSI, Computer Arithmetic, Multiplier, Arithmetic Circuits |
| 4 | Aryan Saed, Majid Ahmadi, Graham A. Jullien |
Arithmetic with Signed Analog Digits.  |
IEEE Symposium on Computer Arithmetic  |
1999 |
DBLP DOI BibTeX RDF |
|
| 4 | Richard P. Brent |
Computer Arithmetic - A Programmer's Perspective.  |
IEEE Symposium on Computer Arithmetic  |
1999 |
DBLP DOI BibTeX RDF |
|
| 4 | Colin D. Walter |
Moduli for Testing Implementations of the RSA Cryptosystem.  |
IEEE Symposium on Computer Arithmetic  |
1999 |
DBLP DOI BibTeX RDF |
RSA modulus, implementation validation benchmark, verification, testing, cryptography, Computer arithmetic, correctness |
| 4 | George J. Klir, Yi Pan |
Constrained fuzzy arithmetic: Basic questions and some answers.  |
Soft Comput.  |
1998 |
DBLP DOI BibTeX RDF |
Fuzzy interval, standard fuzzy arithmetic, constrained fuzzy arithmetic, linguistic variable |
| 4 | Dominique Michelucci, Jean-Michel Moreau |
Lazy Arithmetic.  |
IEEE Trans. Computers  |
1997 |
DBLP DOI BibTeX RDF |
exact rational arithmetic, lazy arithmetic, Computational geometry, robustness, interval arithmetic, inconsistencies, hash coding |
| 4 | Takafumi Aoki, Hiroaki Amada, Tatsuo Higuchi |
Real/Complex Reconfigurable Arithmetic Using Redundant Complex Number Systems.  |
IEEE Symposium on Computer Arithmetic  |
1997 |
DBLP DOI BibTeX RDF |
|
| 4 | Gianluca Cena, Paolo Montuschi, Luigi Ciminiera, Andrea Sanna |
A Q-Coder Algorithm with Carry Free Addition.  |
IEEE Symposium on Computer Arithmetic  |
1997 |
DBLP DOI BibTeX RDF |
image compression, arithmetic coding |
| 4 | Shi Hwa Lee, Dae-Sung Cho, Yu-Shin Cho, Sehoon Son, Euee S. Jang, Jae-Seob Shin, Yang-Seok Seo |
Binary Shape Coding Using 1-D Distance Values from Baseline. (PDF / PS)  |
ICIP  |
1997 |
DBLP DOI BibTeX RDF |
1-D distance values, baseline-based binary shape coding method, arbitrarily shaped object, traced 1-D data, turning point, contour-based method, separated shape, coding modes, intra mode, inter mode, global shape matching, local contour matching, DPCM values, fixed arithmetic encoder, block-based method, context arithmetic encoding, video, quality, MPEG-4, arithmetic codes, object identification, residue coding, coding efficiency |
| 4 | Ching-Long Su, Yin-Tsung Hwang |
Distributed arithmetic-based architectures for high speed IIR filter design. (PDF / PS)  |
ICPADS  |
1996 |
DBLP DOI BibTeX RDF |
high speed IIR filter, pipelining techniques, SPDM technology, parallel processing, parallel architectures, digital arithmetic, recursion, recursive filters, Distributed Arithmetic, IIR filters, DSP applications |
| 4 | Susanto Rahardja, Bogdan J. Falkowski |
Family of Fast Mixed Arithmetic Logic Transforms for Multiple-Valued Input Binary Functions. (PDF / PS)  |
ISMVL  |
1996 |
DBLP DOI BibTeX RDF |
fast mixed arithmetic logic transforms, multiple-valued input binary functions, transform matrices, mixed arithmetic logic spectra, Boolean functions, transforms, matrix algebra, multivalued logic, multivalued logic circuits, inverse transforms |
| 4 | Salvador Manich, Michael Nicolaidis, Joan Figueras |
Enhancing realistic fault secureness in parity prediction array arithmetic operators by I/sub DDQ/ monitoring.  |
VTS  |
1996 |
DBLP DOI BibTeX RDF |
mathematical operators, parity prediction array arithmetic operators, IDDQ current monitoring, fault diagnosis, logic testing, fault detection, stuck-at faults, bridging faults, multiplying circuits, multiplier circuit, arithmetic circuits, logic arrays, stuck-open faults, topological design, SPICE simulation, fault secureness |
| 4 | Harvey L. Davies |
Infinity Arithmetic, Comparisons and J.  |
APL  |
1995 |
DBLP DOI BibTeX RDF |
NaN, error-trapping, indeterminate, infinity arithmetic, APL, comparison, precision, arithmetic, tolerance, comparative, J, limits, infinity, IEEE 754 Standard |
| 4 | Xiaonong Ran, C. Y. Choo |
Syntax-based arithmetic video coding for very low bit rate visual telephony. (PDF / PS)  |
ICIP  |
1995 |
DBLP DOI BibTeX RDF |
very low bit rate visual telephony, syntax-based arithmetic coding, finite homogeneous Markov chains, source entropy coding, layered structure, video coding, video coding, Markov processes, source coding, arithmetic codes, entropy codes, videotelephony |
| 4 | Michael J. Schulte, Earl E. Swartzlander Jr. |
A Processor for Staggered Interval Arithmetic.  |
ASAP  |
1995 |
DBLP DOI BibTeX RDF |
computer arithmetic, hardware, processor, Interval arithmetic, precision, application specific, numerical computations |
| 4 | Nilanjan Mukherjee, H. Kassab, Janusz Rajski, Jerzy Tyszer |
Arithmetic built-in self test for high-level synthesis.  |
VTS  |
1995 |
DBLP DOI BibTeX RDF |
arithmetic built-in self test, data path architectures, arithmetic blocks, compact test responses, testable circuit synthesis, logic testing, built-in self test, high level synthesis, high-level synthesis, integrated circuit testing, logic CAD, testability, abstract level, test vectors, state coverage |
| 4 | Ali Skaf, Alain Guyot |
SAGA: the first general-purpose on-line arithmetic co-processor.  |
VLSI Design  |
1995 |
DBLP DOI BibTeX RDF |
general-purpose co-processor, online arithmetic coprocessor, VLSI realisation, BKM algorithm, complex logarithm function, complex exponential function, VLSI, arithmetic, coprocessors, CMOS digital integrated circuits, redundant number systems, CMOS IC, SAGA |
| 4 | Dominique Michelucci |
An epsilon-Arithmetic for Removing Degeneracies.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
|
| 4 | Chin-Long Wey, Haiyan Wang, Cheng-Ping Wang |
A self-timed redundant-binary number to binary number converter for digital arithmetic processors. (PDF / PS)  |
ICCD  |
1995 |
DBLP DOI BibTeX RDF |
convertors, self-timed redundant-binary number to binary number converter, digital arithmetic processors, self-timed converter circuit, variable conversion time, statistical upper bound, delays, digital arithmetic, propagation delay, redundant number systems |
| 4 | Milos D. Ercegovac, Tomás Lang |
Sign detection and comparison networks with a small number of transitions.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
comparison networks, signal transitions, iterative implementation, k-bit modules, digital arithmetic, flip-flops, tree network, sign detection |
| 4 | Elisardo Antelo, Javier D. Bruguera, Julio Villalba, Emilio L. Zapata |
Redundant CORDIC Rotator Based on Parallel Prediction.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
High speed processor, Parallel prediction, Parallel architecture, CORDIC algorithm, Redundant arithmetic |
| 4 | Hakim Bederr, Michael Nicolaidis, Alain Guyot |
Analytic approach for error masking elimination in on-line multipliers.  |
IEEE Symposium on Computer Arithmetic  |
1995 |
DBLP DOI BibTeX RDF |
error masking elimination, online multipliers, high precision numbers, scan design approach, internal state observability, DFT approach, sequential circuits, digital arithmetic, fault coverage, multiplying circuits, area overhead |
| 4 | R. Murakami, Yoshiteru Ohkura, Ryosaku Shimada |
2k-ary Cyclic AN Codes for Burst Error Correction. (PDF / PS)  |
ISMVL  |
1995 |
DBLP DOI BibTeX RDF |
2/sup k/-ary cyclic AN codes, burst error correction, radix 2/sup k/ expressions, code structure, arithmetic burst errors, burst error correction ability, binary cyclic AN code, error correction codes, error detection, error detection codes, arithmetic codes, arithmetic operations, cyclic codes |
| 4 | Stanislaw J. Piestrak |
Design of Residue Generators and Multioperand Modular Adders Using Carry-Save Adders.  |
IEEE Trans. Computers  |
1994 |
DBLP DOI BibTeX RDF |
residue generators, multioperand modular adders, arithmetic error detecting codes, binary-to-residue number system, residue generator, digital arithmetic, adders, Chinese remainder theorem, residue number system, arithmetic codes, residue arithmetic, carry-save adders |
| 4 | Elio D. Di Claudio, Gianni Orlandi, Francesco Piazza |
A Systolic Redundant Residue Arithmetic Error Correction Circuit.  |
IEEE Trans. Computers  |
1993 |
DBLP DOI BibTeX RDF |
systolic redundant residue arithmetic error correction circuit, concurrent fault tolerance capability, redundant residue number system, high speed VLSI circuit realization, parallel systolic architecture, parallel algorithms, VLSI, systolic arrays, digital arithmetic, error correction, real-time applications, error recovery, decision table, processing element, transient errors, residue arithmetic, memory element |
| 4 | B. J. Kirsch, Peter R. Turner |
Adaptive beamforming using RNS arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
1993 |
DBLP DOI BibTeX RDF |
|
| 4 | David M. Lewis |
An accurate LNS arithmetic unit using interleaved memory function interpolator.  |
IEEE Symposium on Computer Arithmetic  |
1993 |
DBLP DOI BibTeX RDF |
|
| 4 | Daniel W. Lozier |
An underflow-induced graphics failure solved by SLI arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
1993 |
DBLP DOI BibTeX RDF |
|
| 4 | W. Kenneth Jenkins, Bernard A. Schnaufer, A. J. Mansen |
Combined system-level redundancy and modular arithmetic for fault tolerant digital signal processing.  |
IEEE Symposium on Computer Arithmetic  |
1993 |
DBLP DOI BibTeX RDF |
|
| 4 | Mohand Ourabah Benouamer, P. Jaillon, Dominique Michelucci, Jean-Michel Moreau |
A lazy exact arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
1993 |
DBLP DOI BibTeX RDF |
|
| 4 | Peter R. Turner |
Complex SLI arithmetic: Representation, algorithms and analysis.  |
IEEE Symposium on Computer Arithmetic  |
1993 |
DBLP DOI BibTeX RDF |
|
| 4 | Jean Vuillemin |
Exact Real Computer Arithmetic with Continued Fractions.  |
IEEE Trans. Computers  |
1990 |
DBLP DOI BibTeX RDF |
exact real computer arithmetic, computable real numbers, undecidable comparison, integer division, infinite 1/0, undefined 0/0 numbers, algebraic algorithm, transcendental algorithm, Gauss, LeLisp, products, digital arithmetic, positional, exponentials, number theory, special functions, continued fractions, arithmetic operations, logarithms, sums, trigonometric functions |
| 4 | Ryosaku Shimada, Yoshiteru Ohkura, Jun-Ichi Aoe |
Nonbinary Arithmetic AN Codes Using Odd Radix Expressions.  |
IEEE Trans. Computers  |
1985 |
DBLP DOI BibTeX RDF |
symmetric R-ary expressions, Absolute-minimum complete residue system, arithmetic AN codes, arithmetic error, cyclic SR -AN codes, Lee-type arithmetic distance |
| 4 | W. Kenneth Jenkins |
The Design of Error Checkers for Self-Checking Residue Number Arithmetic.  |
IEEE Trans. Computers  |
1983 |
DBLP DOI BibTeX RDF |
Digital processors, self-checking arithmetic, fault tolerance, modular arithmetic, special purpose hardware, residue arithmetic |
| 4 | Lyle B. Smith |
Interval arithmetic determinant evaluation and its use in testing for a Chebyshev system.  |
Commun. ACM  |
1969 |
DBLP DOI BibTeX RDF |
Chebyshev system, determinant evaluation, mathematical proof by computer, range arithmetic, interval arithmetic, error bounds |
| 3 | Joppe W. Bos, Thorsten Kleinjung, Arjen K. Lenstra, Peter L. Montgomery |
Efficient SIMD Arithmetic Modulo a Mersenne Number.  |
IEEE Symposium on Computer Arithmetic  |
2011 |
DBLP DOI BibTeX RDF |
|
| 3 | Florent de Dinechin |
The Arithmetic Operators You Will Never See in a Microprocessor.  |
IEEE Symposium on Computer Arithmetic  |
2011 |
DBLP DOI BibTeX RDF |
|
| 3 | Cassio Pennachin, Moshe Looks, João A. de Vasconcelos |
Robust symbolic regression with affine arithmetic.  |
GECCO  |
2010 |
DBLP DOI BibTeX RDF |
robustness, symbolic regression, affine arithmetic |
| 3 | Julien Lamoureux, Scott Miller, Mihai Sima |
Fine-grained vs. coarse-grained shift-and-add arithmetic in FPGAs (abstract only).  |
FPGA  |
2010 |
DBLP DOI BibTeX RDF |
shift-and-add arithmetic, fpga, cordic, coarse-grained |
| 3 | Ran Raz |
Tensor-rank and lower bounds for arithmetic formulas.  |
STOC  |
2010 |
DBLP DOI BibTeX RDF |
homogenous circuits, multilinear circuits, tensor rank, lower bounds, arithmetic circuits |
| 3 | Amirhossein Alimohammad, Saeed Fouladi Fard, Bruce F. Cockburn |
A Unified Architecture for the Accurate and High-Throughput Implementation of Six Key Elementary Functions.  |
IEEE Trans. Computers  |
2010 |
DBLP DOI BibTeX RDF |
single-precision arithmetic, computer arithmetic, Floating-point arithmetic, square root, reciprocal, logarithm |
| 3 | Trung Hieu Tran, Hyo-Moon Cho, Sang-Bock Cho |
Performance Enhancement of Sum of Absolute Difference (SAD) Computation in H.264/AVC Using Saturation Arithmetic.  |
ICIC  |
2009 |
DBLP DOI BibTeX RDF |
saturation arithmetic, motion estimation, H.264/AVC, SAD |
| 3 | Shouxiang Wang, Chengshan Wang, Gaolei Zhang, Ge Zhao |
Fast Decoupled Power Flow Using Interval Arithmetic Considering Uncertainty in Power Systems.  |
ISNN  |
2009 |
DBLP DOI BibTeX RDF |
Uncertainty, Monte Carlo simulation, Interval arithmetic, power flow |
| 3 | Srivatsan Narayanan, Ananth Raghunathan, Ramarathnam Venkatesan |
Obfuscating straight line arithmetic programs.  |
Digital Rights Management Workshop  |
2009 |
DBLP DOI BibTeX RDF |
hard-to-factor polynomials, straight line arithmetic programs, drm, obfuscation, software protection, secure hardware |
| 3 | Valérie Berthé |
Arithmetic Discrete Planes Are Quasicrystals.  |
DGCI  |
2009 |
DBLP DOI BibTeX RDF |
arithmetic discrete planes, word combinatorics, quasicrystals, tilings, substitutions, digital planes |
| 3 | Stanley Mazor |
A Historical Perspective on Computer Arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Ajay K. Verma, Philip Brisk, Paolo Ienne |
Challenges in Automatic Optimization of Arithmetic Circuits.  |
IEEE Symposium on Computer Arithmetic  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Saeid Gorgin, Ghassem Jaberipur |
Fully Redundant Decimal Arithmetic.  |
IEEE Symposium on Computer Arithmetic  |
2009 |
DBLP DOI BibTeX RDF |
|
| 3 | Ian Pratt-Hartmann, Ivo Düntsch |
Functions Definable by Arithmetic Circuits.  |
CiE  |
2009 |
DBLP DOI BibTeX RDF |
integer expression, complex algebra, Arithmetic circuit, expressive power |
| 3 | Krishna V. Palem, Lakshmi N. Chakrapani, Zvi M. Kedem, Lingamneni Avinash, Kirthi Krishna Muntimadugu |
Sustaining moore's law in embedded computing through probabilistic and approximate design: retrospects and prospects.  |
CASES  |
2009 |
DBLP DOI BibTeX RDF |
approximate arithmetic, approximate design, probabilistic CMOS, probabilistic arithmetic, probabilistic design, digital signal processing |
| 3 | Amine Chaieb, Tobias Nipkow |
Proof Synthesis and Reflection for Linear Arithmetic.  |
J. Autom. Reasoning  |
2008 |
DBLP DOI BibTeX RDF |
Proof synthesis, Linear arithmetic, Reflection |
| 3 | Evan Goris |
Feasible Operations on Proofs: The Logic of Proofs for Bounded Arithmetic.  |
Theory Comput. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
Logic of proofs, Bounded arithmetic |
| 3 | Felix Klaedtke |
Bounds on the automata size for Presburger arithmetic.  |
ACM Trans. Comput. Log.  |
2008 |
DBLP DOI BibTeX RDF |
Automata-based decision procedures, complexity, quantifier elimination, Presburger arithmetic |
| 3 | Ping Guo, Jing Chen |
Arithmetic Operation in Membrane System.  |
BMEI  |
2008 |
DBLP DOI BibTeX RDF |
Membrane system, computing model, Arithmetic Operation |
| 3 | Eva Dyllong |
Some Applications of Interval Arithmetic in Hierarchical Solid Modeling.  |
Numerical Validation in Current Hardware Architectures  |
2008 |
DBLP DOI BibTeX RDF |
Reliable solid modeling, interval arithmetic, hierarchical data structure |
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