Search results for "behavioral specification"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Mamoun Sqali, Lucile Torres, Claudia S. Frydman	Synthesizing scenarios to DEVS models.	SpringSim	2008	DBLP DOI BibTeX RDF	requirement validation and checking, scenarios, DEVS, behavioral specification
2	Thomas Cottenier, Aswin van den Berg, Tzilla Elrad	Joinpoint Inference from Behavioral Specification to Implementation.	ECOOP	2007	DBLP DOI BibTeX RDF	Modules and Interfaces, Aspect-Oriented Software Development, Model-Driven Software Engineering
2	Michihiro Matsumoto, Kokichi Futatsugi	Highly Reliable Component-Based Software Development by Using Algebraic Behavioral Specification. (PDF / PS)	ICFEM	2000	DBLP DOI BibTeX RDF
2	Motoshi Saeki	Behavioral specification of GOF design patterns with LOTOS.	APSEC	2000	DBLP DOI BibTeX RDF	gang-of-four design patterns, LOTOS simulator, composite and command patterns, formal specification, object-oriented programming, specification languages, object-oriented methods, software patterns, behavioral specification
2	Michihiro Matsumoto, Kokichi Futatsugi	The support tool for highly reliable component-based software development.	APSEC	2000	DBLP DOI BibTeX RDF	reliable component-based software development support tool, output reliability, automated refinement verification, automated connector generation, tree architecture, projection-style behavioral specification, refined specification, component combination, Java, software architecture, formal specification, formal verification, software tools, software reliability, requirements specification, subroutines, distributed object management, JavaBeans, development systems, component-based software architecture
2	Michihiro Matsumoto, Kokichi Futatsugi	Simply Observable Behavioral Specification.	APSEC	1999	DBLP DOI BibTeX RDF
2	Rémi Bastide, Ousmane Sy, Philippe A. Palanque	Formal Specification and Prototyping of CORBA Systems.	ECOOP	1999	DBLP DOI BibTeX RDF	Formal methods, Petri nets, CORBA, behavioral specification, Distributed object-oriented systems
2	Ghassan Al Hayek, Chantal Robach	On the Adequacy of Deriving Hardware Test Data from the Behavioral Specification.	EUROMICRO	1996	DBLP DOI BibTeX RDF	hardware test data, behavioral fault modeling, gate-level strategies, high-level fault detection, gate-level fault detection, design automation tools, generated test set, gate-level fault coverage, hardware description languages, hardware description languages, behavioral specification
2	Frank Vahid	Procedure exlining: a transformation for improved system and behavioral synthesis.	ISSS	1995	DBLP DOI BibTeX RDF	VHDL transformation tool, distinct computation, procedure exlining, procedure inlining, redundant sequences, statements, formal specification, distributed processing, VHDL, hardware description languages, remote procedure calls, behavioral synthesis, behavioral specification, system synthesis, procedure calls, synthesis tools
1	Einar Broch Johnsen, Reiner Hähnle, Jan Schäfer, Rudolf Schlatte, Martin Steffen	ABS: A Core Language for Abstract Behavioral Specification.	FMCO	2010	DBLP DOI BibTeX RDF
1	Paolo A. G. Sivilotti, Matthew Lang	Interfaces first (and foremost) with Java.	SIGCSE	2010	DBLP DOI BibTeX RDF	concrete state, abstraction, behavioral specification
1	Swarat Chaudhuri, Armando Solar-Lezama	Smooth interpretation.	PLDI	2010	DBLP DOI BibTeX RDF	parameter synthesis, program smoothing, continuity
1	Manoli Albert, Jordi Cabot, Cristina Gómez, Vicente Pelechano	Automatic generation of basic behavior schemas from UML class diagrams.	Software and System Modeling	2010	DBLP DOI BibTeX RDF	Behavior schema, Structural event, UML, OCL, Operation, Class diagram
1	Benjamin Hummel, Judith Thyssen	Behavioral Specification of Reactive Systems Using Stream-Based I/O Tables.	SEFM	2009	DBLP DOI BibTeX RDF
1	Seyed Morteza Babamir, Faezeh Sadat Babamir	Behavioral Specification of Real-Time Requirements.	APSEC	2008	DBLP DOI BibTeX RDF
1	Nadya Kuzmina, John Paul, Ruben Gamboa, James Caldwell	Extending dynamic constraint detection with disjunctive constraints.	WODA	2008	DBLP DOI BibTeX RDF	disjunctive constraint, dynamic constraint inference, behavioral specification
1	Youngsik Kim, Nazanin Mansouri	Automated formal verification of scheduling with speculative code motions.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	formal verification, high level synthesis, automated theorem-proving, speculation
1	A. Neslin Ismailoglu, Murat Askar	SDIVA: Structural Delay Insensitivity Verification Analysis Method for Bit-Level Pipelined Systolic Arrays with Early Output Evaluation.	DSD	2008	DBLP DOI BibTeX RDF
1	Judith E. Y. Rossebø, Rolv Bræk	Using Composition Policies to Manage Authentication and Authorization Patterns and Services.	ARES	2008	DBLP DOI BibTeX RDF	authentication and authorization, policy, service composition, service engineering
1	Chandan Karfa, Dipankar Sarkar, Chitta Mandal, P. Kumar	An Equivalence-Checking Method for Scheduling Verification in High-Level Synthesis.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Hong Lu, A. Forin	Automatic Processor Customization for Zero-Overhead Online Software Verification.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Roel Wuyts, Holger M. Kienle, Kim Mens, Mark van den Brand, Adrian Kuhn	Academic Software Development Tools and Techniques.	ECOOP Workshops	2008	DBLP DOI BibTeX RDF
1	Iulian Ober, Bernard Coulette, Younes Lakhrissi	Behavioral Modelling and Composition of Object Slices Using Event Observation.	MoDELS	2008	DBLP DOI BibTeX RDF
1	Yoram Atir, David Harel	Using LSCs for scenario authoring in tactical simulators.	SCSC	2007	DBLP DOI BibTeX RDF	live sequence charts (LSCs), scenario authoring, tactical simulators, end-user programming, behavioral specification
1	David Lo, Siau-Cheng Khoo, Chao Liu 0001	Efficient mining of iterative patterns for software specification discovery.	KDD	2007	DBLP DOI BibTeX RDF	closed iterative patterns, software specification discovery
1	Gregory Kulczycki, Heather Keown, Murali Sitaraman, Bruce W. Weide	Abstracting Pointers for a Verifying Compiler.	SEW	2007	DBLP DOI BibTeX RDF
1	Ingo Weisemöller, Andy Schürr	A Comparison of Standard Compliant Ways to Define Domain Specific Languages.	MoDELS Workshops	2007	DBLP DOI BibTeX RDF
1	Masaki Nakamura, Masahiro Watanabe, Kokichi Futatsugi	A Behavioral Specification of Imperative Programming Languages.	IEICE Transactions	2006	DBLP DOI BibTeX RDF
1	Shin Nakajima	Model-Checking Behavioral Specification of BPEL Applications.	Electr. Notes Theor. Comput. Sci.	2006	DBLP DOI BibTeX RDF
1	Kiyoshi Yamada, Takuo Watanabe	An Aspect-Oriented Approach to Modular Behavioral Specification.	Electr. Notes Theor. Comput. Sci.	2006	DBLP DOI BibTeX RDF
1	Jörg Ackermann, Klaus Turowski	A Library of OCL Specification Patterns for Behavioral Specification of Software Components.	CAiSE	2006	DBLP DOI BibTeX RDF	Component-Based Information Systems, Software Component Specification, OCL Specification Patterns
1	Avik Sinha, Amit M. Paradkar	Model-based functional conformance testing of web services operating on persistent data.	TAV-WEB	2006	DBLP DOI BibTeX RDF
1	Gary T. Leavens, Albert L. Baker, Clyde Ruby	Preliminary design of JML: a behavioral interface specification language for java.	ACM SIGSOFT Software Engineering Notes	2006	DBLP DOI BibTeX RDF
1	Somsubhra Mondal, Seda Ogrenci Memik, Nikolaos Bellas	Pre-synthesis Queue Size Estimation of Streaming Data Flow Graphs.	FCCM	2006	DBLP DOI BibTeX RDF
1	Claude Marché, Nicolas Rousset	Verification of JAVA CARD Applets Behavior with Respect to Transactions and Card Tears.	SEFM	2006	DBLP DOI BibTeX RDF	JAVA CARD applets, Card Tears, non-atomic methods, Formal verification, Transactions, JML
1	Robby, Edwin Rodríguez, Matthew B. Dwyer, John Hatcliff	Checking JML specifications using an extensible software model checking framework.	STTT	2006	DBLP DOI BibTeX RDF
1	Kiyoshi Yamada, Takuo Watanabe	An Aspect-oriented Approach to Modular Behavioral Specification of Java Components.	IASTED Conf. on Software Engineering	2005	DBLP BibTeX RDF
1	Jérôme Lemaitre, Sylvain Alliot, Ed F. Deprettere	Behavioral specification of control interface for signal processing applications.	ASAP	2005	DBLP DOI BibTeX RDF
1	Jörg Ackermann	Frequently Occurring Patterns in Behavioral Specification of Software Components.	COEA	2005	DBLP BibTeX RDF
1	Rehab F. Abdel-Kader	Resource-constrained loop scheduling in high-level synthesis.	ACM Southeast Regional Conference	2005	DBLP DOI BibTeX RDF	scheduling, high-level synthesis, force-directed scheduling
1	William B. Gardner	Converging CSP specifications and C++ programming via selective formalism.	ACM Trans. Embedded Comput. Syst.	2005	DBLP DOI BibTeX RDF	hardware/software codesign, Executable specifications, object-oriented application frameworks
1	Nikolai Starodoubtsev, Sergei Bystrov	Behavior and Synthesis of Two-Input Gate Asynchronous Circuits.	ASYNC	2005	DBLP DOI BibTeX RDF
1	Ryan Mannion, Harry Hsieh, Susan Cotterell, Frank Vahid	System Synthesis for Networks of Programmable Blocks.	DATE	2005	DBLP DOI BibTeX RDF
1	Phan C. Vinh, Jonathan P. Bowen	Semantics of RTL and Validation of Synthesized RTL Designs Using Formal Verification in Reconfigurable Computing Systems.	ECBS	2005	DBLP DOI BibTeX RDF
1	Stephen S. Yau, Supratik Mukhopadhyay, Ramesh Bharadwaj	Specification, Analysis and Implementation of Architectural Patterns for Dependable Software Systems.	WORDS	2005	DBLP DOI BibTeX RDF	dependable software, speci.cation languages, veri.cation, formal analysis, Architectural patterns
1	Thomas Eisenbach, Bärbel Mertsching, Nikolaus Voß, Frank Schmidtmeier	Optimization of Modules for Digital Audio Processing.	PATMOS	2005	DBLP DOI BibTeX RDF
1	Gergely Pintér, István Majzik	Impact of Statechart Implementation Techniques on the Effectiveness of Fault Detection Mechanisms.	EUROMICRO	2004	DBLP DOI BibTeX RDF
1	Ramaswamy Chandramouli, Mark R. Blackburn	Automated Testing of Security Functions Using a Combined Model and Interface-Driven Approach.	HICSS	2004	DBLP DOI BibTeX RDF
1	Youngsik Kim, Shekhar Kopuri, Nazanin Mansouri	Automated Formal Verification of Scheduling Process Using Finite State Machines with Datapath (FSMD).	ISQED	2004	DBLP DOI BibTeX RDF
1	Ravi Namballa, Nagarajan Ranganathan, Abdel Ejnioui	Control and Data Flow Graph Extraction for High-Level Synthesis. (PDF / PS)	ISVLSI	2004	DBLP DOI BibTeX RDF
1	M. Cecilia Bastarrica, Sergio F. Ochoa, Pedro O. Rossel	Integrated Notation for Software Architecture Specifications.	SCCC	2004	DBLP DOI BibTeX RDF	software architecture, Architecture definition languages
1	Robby, Edwin Rodríguez, Matthew B. Dwyer, John Hatcliff	Checking Strong Specifications Using an Extensible Software Model Checking Framework.	TACAS	2004	DBLP DOI BibTeX RDF
1	Nikolai Starodoubtsev, Sergei Bystrov, Alexandre Yakovlev	Monotonic Circuits with Complete Acknowledgement.	ASYNC	2003	DBLP DOI BibTeX RDF
1	Dominique Borrione, Menouer Boubekeur, Emil Dumitrescu, Marc Renaudin, Jean-Baptiste Rigaud, Antoine Sirianni	An Approach to the Introduction of Formal Validation in an Asynchronous Circuit Design Flow. (PDF / PS)	HICSS	2003	DBLP DOI BibTeX RDF
1	Julio A. de Oliveira Filho, Manoel Eusebio de Lima, Paulo Romero Martins Maciel, Juliana Moura, Bruno Celso	A Fast IP-Core Integration Methodology for SoC Design.	SBCCI	2003	DBLP DOI BibTeX RDF
1	Sebastián Uchitel, Jeff Kramer, Jeff Magee	Synthesis of Behavioral Models from Scenarios.	IEEE Trans. Software Eng.	2003	DBLP DOI BibTeX RDF	scenario-based specification, sequence chart combination, requirements analysis, Requirements specification, Message Sequence Charts
1	Jaewon Seo, Taewhan Kim, Preeti Ranjan Panda	Memory allocation and mapping in high-level synthesis - an integrated approach.	IEEE Trans. VLSI Syst.	2003	DBLP DOI BibTeX RDF
1	B. Arts, N. van der Eng, Marc J. M. Heijligers, H. Munk, Frans Theeuwen, Luca Benini, Enrico Macii, A. Milia, Roberto Maro, A. Bellu	Statistical Power Estimation of Behavioral Descriptions.	PATMOS	2003	DBLP DOI BibTeX RDF
1	Grigore Rosu	On implementing behavioral rewriting.	ACM SIGPLAN Workshop on Rule-Based Programming	2002	DBLP DOI BibTeX RDF	behavioral rewriting, hidden equational logic, term rewriting, meta-programming
1	Ali Habibi, Sofiène Tahar, Adel Ghazel	Formal Verification of a DSP Chip Using an Iterative Approach.	DSD	2002	DBLP DOI BibTeX RDF
1	Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto	Test Generation and Testability Alternatives Exploration of Critical Algorithms for Embedded Applications.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	Testing of embedded systems, VHDL, ATPG, fault modeling, testability analysis
1	Klaus Harbich, Erich Barke	PuMA++: From Behavioral Specification to Multi-FPGA-Prototype.	FPL	2001	DBLP DOI BibTeX RDF
1	Ing-Jer Huang	Co-synthesis of pipelined structures and instruction reordering constraints for instruction set processors.	ACM Trans. Design Autom. Electr. Syst.	2001	DBLP DOI BibTeX RDF	compiler instruction optimization, instruction set processor, pipeline hazards, pipeline taxonomy, synthesis
1	Carlos Puchol, Subramanian K. Iyer	The MacBeth Specification, Modeling and Programming Language. (PDF / PS)	IEEE Real Time Technology and Applications Symposium	2001	DBLP DOI BibTeX RDF
1	Farinaz Koushanfar, Darko Kirovski, Inki Hong, Miodrag Potkonjak, Marios C. Papaefthymiou	Symbolic debugging of embedded hardware and software.	IEEE Trans. on CAD of Integrated Circuits and Systems	2001	DBLP DOI BibTeX RDF
1	Sriram K. Rajamani, Jakob Rehof	A Behavioral Module System for the Pi-Calculus.	SAS	2001	DBLP DOI BibTeX RDF
1	Charles André, Marie-Agnès Peraldi-Frati	Behavioral Specification of a Circuit Using SyncCharts: A Case Study.	EUROMICRO	2000	DBLP DOI BibTeX RDF
1	Rémi Bastide, Philippe A. Palanque, Ousmane Sy, David Navarre	Formal specification of CORBA services: experience and lessons learned.	OOPSLA	2000	DBLP DOI BibTeX RDF	distributed systems, CORBA, CORBA, high-level Petri nets, behavioral specification
1	Carl A. Gunter, Elsa L. Gunter, Michael Jackson, Pamela Zave	A Reference Model for Requirements and Specifications-Extended Abstract. (PDF / PS)	ICRE	2000	DBLP DOI BibTeX RDF	formal methods, specifications, refinement, requirements, software engineering methodology
1	Joseph A. Goguen, Kai Lin, Grigore Rosu	Circular Coinductive Rewriting. (PDF / PS)	ASE	2000	DBLP DOI BibTeX RDF
1	Sriram Govindarajan, Vinoo Srinivasan, Preetham Lakshmikanthan, Ranga Vemuri	A Technique for Dynamic High-Level Exploration During Behavioral-Partitioning for Multi-Device Architectures.	VLSI Design	2000	DBLP DOI BibTeX RDF	Partitioning, High-Level Synthesis (HLS), Exploration
1	Fabrizio Ferrandi, G. Fornara, Donatella Sciuto, G. Ferrara, Franco Fummi	Testability Alternatives Exploration through Functional Testing.	VTS	2000	DBLP DOI BibTeX RDF	High-level Testability Analysis, Behavioral Test Generation, VHDL, ATPG
1	Carl A. Gunter, Elsa L. Gunter, Michael Jackson, Pamela Zave	A Reference Model for Requirements and Specifications.	IEEE Software	2000	DBLP DOI BibTeX RDF
1	Gerd Ritter	Sequential Equivalence Checking by Symbolic Simulation.	FMCAD	2000	DBLP DOI BibTeX RDF
1	Boumediene Belkhouche, Joel Wu	Behavioral Specification and Analysis of Object-Oriented Designs.	JOOP	1999	DBLP BibTeX RDF
1	Cynthia Della Torre Cicalese, Shmuel Rotenstreich	Behavioral Specification of Distributed Software Component Interfaces.	IEEE Computer	1999	DBLP DOI BibTeX RDF
1	Paul McKee, Ian W. Marshall	Behavioral Specification Using XML.	FTDCS	1999	DBLP DOI BibTeX RDF
1	Paolo A. G. Sivilotti, Charles P. Giles	The specification of distributed objects: liveness and locality.	CASCON	1999	DBLP DOI BibTeX RDF	CORBA
1	Rémi Bastide, Ousmane Sy, Philippe A. Palanque	Formal Support for the Engineering of CORBA-based Distributed Object Systems. (PDF / PS)	DOA	1999	DBLP DOI BibTeX RDF
1	Sofiène Tahar, Xiaoyu Song, Eduard Cerny, Zijian Zhou, Michel Langevin, Otmane Aït Mohamed	Modeling and formal verification of the Fairisle ATM switch fabricusing MDGs.	IEEE Trans. on CAD of Integrated Circuits and Systems	1999	DBLP DOI BibTeX RDF
1	Cordula Hansen, Arno Kunzmann, Wolfgang Rosenstiel	Verification by Simulation Comparison using Interface Synthesis.	DATE	1998	DBLP DOI BibTeX RDF	Simulation Comparison, Verification, High-Level Synthesis, Interface Synthesis
1	A. Jemai, Polen Kission, Ahmed Amine Jerraya	Architectural Simulation in the Context of Behavioral Synthesis.	DATE	1998	DBLP DOI BibTeX RDF
1	E. Lago, Carlos J. Jiménez, Diego R. Lopez, Santiago Sánchez-Solano, Angel Barriga Barros	XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers.	DATE	1998	DBLP DOI BibTeX RDF
1	Laurence Tianruo Yang, Zebo Peng	An Efficient Algorithm to Integrate Scheduling and Allocation in High-Level Test Synthesis.	DATE	1998	DBLP DOI BibTeX RDF
1	Youngsoo Shin, Kiyoung Choi	Rate Assignment for Embedded Reactive Real-Time Systems.	EUROMICRO	1998	DBLP DOI BibTeX RDF
1	Valery Sklyarov, Nuno Lau, Ricardo Sal Monteiro, Andreia Melo, Arnaldo Oliveira, Konstantin Kondratjuk	Design of Virtual Digital Controllers Based on Dynamically Reconfigurable FPGAs.	EUROMICRO	1998	DBLP DOI BibTeX RDF
1	Ling Liu	EVOLVE: Adaptive Specification Techniques for Object-Oriented Software Evolution. (PDF / PS)	HICSS	1998	DBLP DOI BibTeX RDF
1	Fabrizio Ferrandi, Franco Fummi, Donatella Sciuto	Implicit test generation for behavioral VHDL models.	ITC	1998	DBLP DOI BibTeX RDF
1	Suhrid A. Wadekar, Alice C. Parker, C. P. Ravikumar	Freedom: Statistical Behavioral Estimation of System Energy and Power.	VLSI Design	1998	DBLP DOI BibTeX RDF
1	Sandeep Bhatia, Niraj K. Jha	Integration of hierarchical test generation with behavioral synthesis of controller and data path circuits.	IEEE Trans. VLSI Syst.	1998	DBLP DOI BibTeX RDF
1	Grigore Rosu, Joseph A. Goguen	Hidden Congruent Deduction.	FTP (LNCS Selection)	1998	DBLP DOI BibTeX RDF
1	Min Xu, Fadi J. Kurdahi	RTL synthesis with physical and controller information.	ED&TC	1997	DBLP DOI BibTeX RDF
1	Reinaldo A. Bergamaschi, Salil Raje	Observable Time Windows: Verifying High-Level Synthesis Results.	IEEE Design & Test of Computers	1997	DBLP DOI BibTeX RDF
1	Marie-Lise Flottes, D. Hammad, Bruno Rouzeyre	Improving Testability of Non-Scan Designs during Behavioral Synthesis.	J. Electronic Testing	1997	DBLP DOI BibTeX RDF	behavioral level, high level synthesis, design for testability
1	Peter F. A. Middelhoek, Sreeranga P. Rajan	From VHDL to efficient and first-time-right designs: a formal approach.	ACM Trans. Design Autom. Electr. Syst.	1996	DBLP DOI BibTeX RDF	CDFG, SFG, rapid system prototyping, VHDL, VHDL, design methodology, correctness by construction, transformational design
1	Ayaz Isazadeh, David Alex Lamb, Glenn H. MacEwen	Behavioral Views for Software Requirements Engineering.	ECBS	1996	DBLP DOI BibTeX RDF	Formal Methods, Statecharts, Requirements Specifications
1	Michel Langevin, Sofiène Tahar, Zijian Zhou, Xiaoyu Song, Eduard Cerny	Behavioral Verification of an ATM Switch Fabric using Implicit Abstract State Enumeration. (PDF / PS)	ICCD	1996	DBLP DOI BibTeX RDF
1	Tibor Bartos, Norbert Fristacky	Verifying Timing Consistency in Formal Specifications.	IEEE Design & Test of Computers	1996	DBLP DOI BibTeX RDF
1	Jonathan Lee, Lein F. Lai, Wei T. Huang	Task-Based Specifications Through Conceptual Graphs.	IEEE Expert	1996	DBLP DOI BibTeX RDF
1	Ti-Yen Yen, Wayne Wolf	An efficient graph algorithm for FSM scheduling.	IEEE Trans. VLSI Syst.	1996	DBLP DOI BibTeX RDF