Search results for "biasing"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
4	Pradip Mandal, V. Visvanathan	Design of high performance two stage CMOS cascode op-amps with stable biasing.	VLSI Design	1996	DBLP DOI BibTeX RDF	two stage CMOS cascode op-amps, stable biasing, mirror biasing, output voltage, bias variations, low frequency common mode rejection ratios, power supply rejection ratios, systematic offset, circuit analysis computing, performance metrics, integrated circuit design, circuit simulations, operational amplifiers, CMOS analogue integrated circuits, slew rate, circuit stability
4	Marvin K. Nakayama	A Characterization of the Simple Failure-Biasing Method for Simulations of Highly Reliable Markovian Systems.	ACM Trans. Model. Comput. Simul.	1994	DBLP DOI BibTeX RDF	balanced failure biasing, highly reliable systems, simple failure biasing, importance sampling, likelihood ratios, gradient estimation
3	Alyssa Bonnoit, Lawrence T. Pileggi	Reducing variability in chip-multiprocessors with adaptive body biasing.	ISLPED	2010	DBLP DOI BibTeX RDF	dynamic voltage/frequency scaling, body biasing
3	Sumanth Amarchinta, Dhireesha Kudithipudi	Performance enhancement of subthreshold circuits using substrate biasing and charge-boosting buffers.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	charge-boosters, subthreshold design, biasing
3	Po-Yuan Chen, Chiao-Chen Fang, TingTing Hwang, Hsi-Pin Ma	Leakage reduction, delay compensation using partition-based tunable body-biasing techniques.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	low-power design, process variations, leakage current, Body biasing
3	Alyssa Bonnoit, Sebastian Herbert, Diana Marculescu, Lawrence T. Pileggi	Integrating dynamic voltage/frequency scaling and adaptive body biasing using test-time voltage selection.	ISLPED	2009	DBLP DOI BibTeX RDF	dynamic voltage / frequency scaling, body biasing
3	Zhenhua Wang	Adaptive analog biasing: a robustness-enhanced low-power technique for analog baseband design.	ISLPED	2007	DBLP DOI BibTeX RDF	robustness enhancement, sensitivity reduction, low-power, low-energy, analog integrated circuits, biasing
3	Sergio Gagliolo, Giacomo Pruzzo, Daniele D. Caviglia	Phase noise performances of a cross-coupled CMOS VCO with resistor tail biasing.	SBCCI	2005	DBLP DOI BibTeX RDF	resistor biasing, low power, wireless, CMOS, low voltage, voltage controlled oscillator (VCO), phase noise
3	Vishal Khandelwal, Ankur Srivastava	Active mode leakage reduction using fine-grained forward body biasing strategy.	ISLPED	2004	DBLP DOI BibTeX RDF	forward body biasing, leakage power optimization
3	Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz	Automatic Vector Generation Using Constraints and Biasing.	J. Electronic Testing	2000	DBLP DOI BibTeX RDF	constraint, probability, partitioning, BDD, biasing, vector generation
2	Xin He, Syed Al-Kadry, Afshin Abdollahi	Adaptive leakage control on body biasing for reducing power consumption in CMOS VLSI circuit.	ISQED	2009	DBLP DOI BibTeX RDF
2	Amlan Ghosh, Rahul M. Rao, Richard B. Brown	A centralized supply voltage and local body bias-based compensation approach to mitigate within-die process variation.	ISLPED	2009	DBLP DOI BibTeX RDF	fine-grain body-biasing, process variation compensation, slewrate
2	Koichi Hamamoto, Hiroshi Fuketa, Masanori Hashimoto, Yukio Mitsuyama, Takao Onoye	Experimental study on body-biasing layout style-- negligible area overhead enables sufficient speed controllability --.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	layout, body bias
2	Zhenyu Qi, Mircea R. Stan	NBTI resilient circuits using adaptive body biasing.	ACM Great Lakes Symposium on VLSI	2008	DBLP DOI BibTeX RDF	reliability, body bias, nbti
2	Reza Hashemian	Use of local biasing in designing analog integrated circuits.	EIT	2008	DBLP DOI BibTeX RDF
2	Matthew Zucker, James Kuffner, James A. Bagnell	Adaptive workspace biasing for sampling-based planners.	ICRA	2008	DBLP DOI BibTeX RDF
2	Justin Gregg, Tom W. Chen	Post Silicon Power/Performance Optimization in the Presence of Process Variations Using Individual Well-Adaptive Body Biasing.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
2	Byunghee Choi, Youngsoo Shin	Lookup Table-Based Adaptive Body Biasing of Multiple Macros.	ISQED	2007	DBLP DOI BibTeX RDF
2	Yan Zhang, Mircea R. Stan	Temperature-aware circuit design using adaptive body biasing.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	adaptive body biasing, temperature-aware design
2	Radu Teodorescu, Jun Nakano, Abhishek Tiwari, Josep Torrellas	Mitigating Parameter Variation with Dynamic Fine-Grain Body Biasing.	MICRO	2007	DBLP DOI BibTeX RDF
2	Chun-Kit Au, Ho-Fung Leung	Biasing mutations in cooperative coevolution.	IEEE Congress on Evolutionary Computation	2007	DBLP DOI BibTeX RDF
2	Shawna L. Thomas, Marco Morales, Xinyu Tang, Nancy M. Amato	Biasing Samplers to Improve Motion Planning Performance.	ICRA	2007	DBLP DOI BibTeX RDF
2	Rajiv V. Joshi, Keunwoo Kim, Richard Q. Williams, Edward J. Nowak, Ching-Te Chuang	A High-Performance, Low Leakage, and Stable SRAM Row-Based Back-Gate Biasing Scheme in FinFET Technology.	VLSI Design	2007	DBLP DOI BibTeX RDF
2	Afshin Nourivand, Chunyan Wang, M. Omair Ahmad	An Adaptive Sleep Transistor Biasing Scheme for Low Leakage SRAM.	ISCAS	2007	DBLP DOI BibTeX RDF
2	Kyung Ki Kim, Yong-Bin Kim	Optimal Body Biasing for Minimum Leakage Power in Standby Mode.	ISCAS	2007	DBLP DOI BibTeX RDF
2	Alexander Fish, Tomer Rothschild, Avichay Hodes, Yonatan Shoshan, Orly Yadid-Pecht	Low Power CMOS Image Sensors Employing Adaptive Bulk Biasing Control (AB2C) Approach.	ISCAS	2007	DBLP DOI BibTeX RDF
2	Domenik Helms, Olaf Meyer, Marko Hoyer, Wolfgang Nebel	Voltage- and ABB-island optimization in high level synthesis.	ISLPED	2007	DBLP DOI BibTeX RDF	adaptive body biasing, process variation, leakage, voltage islands
2	Yuan Cai, Marcus T. Schmitz, Bashir M. Al-Hashimi, Sudhakar M. Reddy	Workload-ahead-driven online energy minimization techniques for battery-powered embedded systems with time-constraints.	ACM Trans. Design Autom. Electr. Syst.	2007	DBLP DOI BibTeX RDF	adaptive body biasing, embedded systems, Dynamic voltage scaling, battery
2	Liviu Panait, Sean Luke, R. Paul Wiegand	Biasing Coevolutionary Search for Optimal Multiagent Behaviors.	IEEE Trans. Evolutionary Computation	2006	DBLP DOI BibTeX RDF
2	Puneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester	Gate-length biasing for runtime-leakage control.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
2	Andrew B. Kahng, Swamy Muddu, Puneet Sharma	Impact of Gate-Length Biasing on Threshold-Voltage Selection.	ISQED	2006	DBLP DOI BibTeX RDF
2	Po-Kuan Huang, Soheil Ghiasi	Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities.	DATE	2006	DBLP DOI BibTeX RDF
2	Dongkyu Park, Byunghoo Jung	Low power LC-VCO design using direct cross-coupled cell biasing.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Sunwoo Kwon, Hoi Lee	A 1.2V, 3.5µW, 20MS/s, 8-bit comparator with dynamic-biasing preamplifier.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Byungsub Kim, Soumyajit Mandal, Rahul Sarpeshkar	Power-adaptive operational amplifier with positive-feedback self biasing.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Swaroop Ghosh, Saibal Mukhopadhyay, Keejong Kim, Kaushik Roy	Self-calibration technique for reduction of hold failures in low-power nano-scaled SRAM.	DAC	2006	DBLP DOI BibTeX RDF	adaptive source biasing, hold failures, low power SRAM
2	Saumil Shah, Puneet Gupta, Andrew B. Kahng	Standard cell library optimization for leakage reduction.	DAC	2006	DBLP DOI BibTeX RDF	gate-length biasing, library optimization, leakage reduction
2	Jabulani Nyathi, Brent Bero	Logic circuits operating in subthreshold voltages.	ISLPED	2006	DBLP DOI BibTeX RDF	logic styles, medium-to-high speed, off current, ultra-low power, noise margins, subthreshold, body biasing
2	Le Yan, Jiong Luo, Niraj K. Jha	Joint dynamic voltage scaling and adaptive body biasing for heterogeneous distributed real-time embedded systems.	IEEE Trans. on CAD of Integrated Circuits and Systems	2005	DBLP DOI BibTeX RDF
2	Louie Pylarinos, Khoman Phang	Low-voltage programmable gm-C filter for hearing aids using dynamic gate biasing.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Kiyotaka Imai, Yasushi Yamagata, Sadaaki Masuoka, Naohiko Kimuzuka, Yuri Yasuda, Mitsuhiro Togo, Masahiro Ikeda, Yasutaka Nakashiba	Device technology for body biasing scheme.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Maurice Meijer, Francesco Pessolano, José Pineda de Gyvez	Limits to performance spread tuning using adaptive voltage and body biasing.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Keng Hoong Wee, Ji-Jon Sit, Rahul Sarpeshkar	Biasing techniques for subthreshold MOS resistive grids.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Walid Elgharbawy, Pradeep Golconda, Ashok Kumar, Magdy Bayoumi	A new gate-level body biasing technique for PMOS transistors in subthreshold CMOS circuits.	ISCAS	2005	DBLP DOI BibTeX RDF
2	Giridhar Kumaran, Rosie Jones, Omid Madani	Biasing web search results for topic familiarity.	CIKM	2005	DBLP DOI BibTeX RDF	personalization, web search, familiarity
2	Nikhil Jayakumar, Sandeep Dhar, Sunil P. Khatri	A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents.	DAC	2005	DBLP DOI BibTeX RDF	leakage power, self-adjusting, body-biasing
2	Le Yan, Lin Zhong, Niraj K. Jha	User-perceived latency driven voltage scaling for interactive applications.	DAC	2005	DBLP DOI BibTeX RDF	adaptive body biasing, computer responsiveness, dynamic voltage scaling, power consumption
2	Puneet Gupta, Andrew B. Kahng, Puneet Sharma, Dennis Sylvester	Selective gate-length biasing for cost-effective runtime leakage control.	DAC	2004	DBLP DOI BibTeX RDF	power, layout, manufacturability, leakage, OPC, lithography
2	Sean Nicolson, Khoman Phang	Improvements in biasing and compensation of CMOS opamps.	ISCAS	2004	DBLP DOI BibTeX RDF
2	Aleksandar Tasic, Wouter A. Serdijn, John R. Long	Low-noise biasing of voltage-controlled oscillators by means of resonant inductive degeneration.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Le Yan, Jiong Luo, Niraj K. Jha	Combined Dynamic Voltage Scaling and Adaptive Body Biasing for Heterogeneous Distributed Real-time Embedded Systems.	ICCAD	2003	DBLP DOI BibTeX RDF
2	Chris H. Kim, Jae-Joon Kim, Saibal Mukhopadhyay, Kaushik Roy	A forward body-biased low-leakage SRAM cache: device and architecture considerations.	ISLPED	2003	DBLP DOI BibTeX RDF	forward body-biasing, super high VT, SRAM, leakage power
2	L. A. Sarmiento-Reyes, E. Yildiz, Chris J. M. Verhoeven, Arie van Staveren	A CAD-oriented method for optimal biasing of amplifiers.	ISCAS	2002	DBLP DOI BibTeX RDF
2	Esteban Tlelo-Cuautle	An efficient biasing technique suitable for any kind of the four basic amplifiers designed at or level.	ISCAS	2002	DBLP DOI BibTeX RDF
2	Steven M. Martin, Krisztián Flautner, Trevor N. Mudge, David Blaauw	Combined dynamic voltage scaling and adaptive body biasing for lower power microprocessors under dynamic workloads.	ICCAD	2002	DBLP DOI BibTeX RDF
2	Claude R. Gauthier, Jayakumaran Sivagnaname, Richard B. Brown	Dynamic Receiver Biasing For Inter-Chip Communication.	ARVLSI	2001	DBLP DOI BibTeX RDF
2	Martin Butz	Biasing Exploration in an Anticipatory Learning Classifier System.	IWLCS	2001	DBLP DOI BibTeX RDF
2	Giovanni Palmisano, Salvatore Pennisi	Low-voltage continuous-time CMOS current amplifier with dynamic biasing.	ISCAS	2001	DBLP DOI BibTeX RDF
2	Rino Micheloni, Matteo Zammattio, Giovanni Campardo, Osama Khouri, Guido Torelli	Hierarchical Sector Biasing Organization for Flash Memories.	MTDT	2000	DBLP DOI BibTeX RDF
2	Chris J. M. Verhoeven, Arie van Staveren	Systematic Biasing of Negative Feedback Amplifiers.	DATE	1999	DBLP DOI BibTeX RDF
2	L. A. MacEachern, Eyad Abou-Allam, L. Wang, Tajinder Manku	Low voltage mixer biasing using monolithic integrated transformer dc-coupling.	ISCAS	1999	DBLP DOI BibTeX RDF
2	Jun Yuan, Kurt Shultz, Carl Pixley, Hillel Miller, Adnan Aziz	Modeling design constraints and biasing in simulation using BDDs.	ICCAD	1999	DBLP BibTeX RDF
2	Tsung-Chu Huang, Min-Cheng Huang, Kuen-Jong Lee	Built-in current sensor designs based on the bulk-driven technique.	Asian Test Symposium	1997	DBLP DOI BibTeX RDF	bulk-driven current mirror, biasing schemes, low power dissipation, power supply voltage drop, circuit speed degradation, external power supply, 0.3 V, 0.3 ns, accuracy, flexibility, simplicity, built-in current sensor, area overhead, I/sub DDQ/ testing, electric current measurement
2	A. B. Bhattacharyya, R. S. Rana, S. K. Guha, Rajendar Bahl, R. Anand, M. J. Zarabi, P. A. Govindacharyulu, U. Gupta, V. Mohan, Jatin Roy, Amul Atri	A micropower analog hearing aid on low voltage CMOS digital process.	VLSI Design	1996	DBLP DOI BibTeX RDF	differential amplifiers, automatic gain control, micropower analog hearing aid, low voltage CMOS digital process, adaptive biasing, MOS translinear loop circuit, degenerating linearising resistor, input differential stage, AGC block, conversion efficiency, 3 micron, 1.0 V, power consumption, CMOS analogue integrated circuits, hearing aids
2	Guido Rovetta, Patrizia Monteforte, Gerolamo Bianchi, Stefano Rovetta, Rodolfo Zunino	Validation of a Large Medical Database.	CBMS	1995	DBLP DOI BibTeX RDF	large medical database, database validation, clinical problems, experimental evidence, observed data validation, incorrect sampling, sample distribution, data-inherent regularities, unsupervised models, clinical records analysis, osteoporosis, data distribution uniformity, unbiased sampling, neural networks, data integrity, probability, unsupervised learning, neural nets, medical information systems, very large databases, biasing
1	I. Bilionis, Phaedon-Stelios Koutsourelakis	Free energy computations by minimization of Kullback-Leibler divergence: An efficient adaptive biasing potential method for sparse representations.	J. Comput. Physics	2012	DBLP DOI BibTeX RDF
1	Graeme Smecher, François Aubin, Eric Bissonnette, Matt Dobbs, Peter Hyland, Kevin MacDermid	A Biasing and Demodulation System for Kilopixel TES Bolometer Arrays.	IEEE T. Instrumentation and Measurement	2012	DBLP DOI BibTeX RDF
1	Sumit Singh, Upamanyu Madhow, Elizabeth M. Belding	Shaping Throughput Profiles in Multihop Wireless Networks: A Resource-Biasing Approach.	IEEE Trans. Mob. Comput.	2012	DBLP DOI BibTeX RDF
1	Satyajit Desai, Sanghamitra Roy, Koushik Chakraborty	Process variation aware DRAM design using block based adaptive body biasing algorithm.	ISQED	2012	DBLP DOI BibTeX RDF
1	Jing Yang, Yong-bin Kim	Self adaptive body biasing scheme for leakage power reduction in nanoscale CMOS circuit.	ACM Great Lakes Symposium on VLSI	2012	DBLP DOI BibTeX RDF
1	Jeroen van den Boom	A 50μW biasing feedback loop with 6ms settling time for a MEMS microphone with digital output.	ISSCC	2012	DBLP DOI BibTeX RDF
1	Aya Mabrouki, Thierry Taris, Yann Deval, Jean-Baptiste Begueret	An Optimum Body Biasing for Gain and Linearity Control in CMOS Low-Noise Amplifiers.	J. Low Power Electronics	2011	DBLP DOI BibTeX RDF
1	Srikanth Padmala, Luiz Pessoa	Reward Reduces Conflict by Enhancing Attentional Control and Biasing Visual Cortical Processing.	J. Cognitive Neuroscience	2011	DBLP DOI BibTeX RDF
1	Christophe Chipot, Tony Lelièvre	Enhanced Sampling of Multidimensional Free-Energy Landscapes Using Adaptive Biasing Forces.	SIAM Journal of Applied Mathematics	2011	DBLP DOI BibTeX RDF
1	Y. Chen, S. Mani	Active Learning for Unbalanced Data in the Challenge with Multiple Models and Biasing.	Journal of Machine Learning Research - Proceedings Track	2011	DBLP BibTeX RDF
1	Jason E. Fulman, Larry Goldstein	Zero Biasing and Jack Measures.	Combinatorics, Probability & Computing	2011	DBLP DOI BibTeX RDF
1	Davide Provasi, Marta Camacho-Artacho, Ana Negri, Juan Carlos Mobarec, Marta Filizola	Ligand-Induced Modulation of the Free-Energy Landscape of G Protein-Coupled Receptors Explored by Adaptive Biasing Techniques.	PLoS Computational Biology	2011	DBLP DOI BibTeX RDF
1	Yan-Yu Huang, Wangmyong Woo, Youngchang Yoon, Chang-Ho Lee	Highly Linear RF CMOS Variable Attenuators With Adaptive Body Biasing.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Dong-Su Lee, Young-Hyun Jun, Bai-Sun Kong	Simultaneous Reverse Body and Negative Word-Line Biasing Control Scheme for Leakage Reduction of DRAM.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Marjan Kaedi, Nasser Ghasem-Aghaee	Biasing Bayesian Optimization Algorithm using Case Based Reasoning.	Knowl.-Based Syst.	2011	DBLP DOI BibTeX RDF
1	Ilona Henseler, Sebastian Krüger, Peter Dechent, Oliver Gruber	A gateway system in rostral PFC? Evidence from biasing attention to perceptual information and internal representations.	NeuroImage	2011	DBLP DOI BibTeX RDF
1	Marcus H. Mendenhall, Robert A. Weller	A probability-conserving cross-section biasing mechanism for variance reduction in Monte Carlo particle transport calculations	CoRR	2011	DBLP BibTeX RDF
1	Gary Parker, Jim O'Connor	Fitness biasing for the box pushing task.	SMC	2011	DBLP DOI BibTeX RDF
1	Vazgen Melikyan, Armen Durgaryan	Programmable current biasing for low noise voltage controlled oscillators.	EWDTS	2011	DBLP DOI BibTeX RDF
1	Sankaranarayanan Ananthakrishnan, Rohit Prasad, Prem Natarajan	On-line Language Model Biasing for Statistical Machine Translation.	ACL (Short Papers)	2011	DBLP BibTeX RDF
1	Farshad Firouzi, Amir Yazdanbakhsh, Hamed Dorosti, Sied Mehdi Fakhraie	Dynamic Soft Error Hardening via Joint Body Biasing and Dynamic Voltage Scaling.	DSD	2011	DBLP DOI BibTeX RDF
1	Victor M. Landassuri-Moreno, John A. Bullinaria	Biasing the evolution of modular neural networks.	IEEE Congress on Evolutionary Computation	2011	DBLP DOI BibTeX RDF
1	Gary Parker, Phil Fritzsche	Fitness Biasing for evolving an Xpilot combat agent.	IEEE Congress on Evolutionary Computation	2011	DBLP DOI BibTeX RDF
1	Yongho Lee, Taewhan Kim	A fine-grained technique of NBTI-aware voltage scaling and body biasing for standard cell based designs.	ASP-DAC	2011	DBLP DOI BibTeX RDF
1	Xiaocheng Shi, Yushi Wei, Jipeng Ning, Mingyu Fu, Dawei Zhao	Optimizing adaptive thrust allocation based on group biasing method for ship dynamic positioning.	ICAL	2011	DBLP DOI BibTeX RDF
1	Zhi Li, Kun Hu, Zengrong Liu, Xueli Yu	Principled Methods for Biasing Reinforcement Learning Agents.	AICI	2011	DBLP DOI BibTeX RDF
1	Davide Baccarin, David Esseni, Massimo Alioto	A novel back-biasing low-leakage technique for FinFET forced stacks.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Dominik Dahlem, Jim Dowling, William Harrison	Cognitive policy learner: biasing winning or losing strategies.	AAMAS	2011	DBLP BibTeX RDF
1	Ali Reza Dehqan, Khalil Mafinezhad, Ehsan Kargaran, Hooman Nabovati	Design of low voltage low power dual-band LNA with forward body biasing technique.	ICECS	2011	DBLP DOI BibTeX RDF
1	Sankaranarayanan Ananthakrishnan, Stavros Tsakalidis, Rohit Prasad, Premkumar Natarajan	On-Line Language Model Biasing for Multi-Pass Automatic Speech Recognition.	INTERSPEECH	2011	DBLP BibTeX RDF
1	Shrikanth Ganapathy, Ramon Canal, Antonio González, Antonio Rubio	Dynamic fine-grain body biasing of caches with latency and leakage 3T1D-based monitors.	ICCD	2011	DBLP DOI BibTeX RDF
1	Maurice Meijer, José Pineda de Gyvez, Ajay Kapoor	Ultra-Low-Power Digital Design with Body Biasing for Low Area and Performance-Efficient Operation.	J. Low Power Electronics	2010	DBLP DOI BibTeX RDF
1	Reza Hashemian	Local Biasing and the Use of Nullator-Norator Pairs in Analog Circuits Designs.	VLSI Design	2010	DBLP DOI BibTeX RDF
1	Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi	Highly Efficient Multi-Band Power Amplifier Employing Reconfigurable Matching and Biasing Networks.	IEICE Transactions	2010	DBLP BibTeX RDF
1	Koubao Ding, Kunming Cai, Yan Han	Design of a high-speed sample-and-hold circuit using a substrate-biasing-effect attenuated T switch.	Microelectronics Journal	2010	DBLP DOI BibTeX RDF