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Venues (Conferences, Journals, ...)
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GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 72 occurrences of 44 keywords
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Results
Found 23 publication records. Showing 23 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 3 | Colin Atkinson |
Component-Oriented Verification of Software Architectures through Built-in Tests.  |
ECSA  |
2008 |
DBLP DOI BibTeX RDF |
Verification, built-in tests, system services |
| 3 | Yingxu Wang, Graham King |
A European COTS Architecture with Built-in Tests.  |
OOIS  |
2002 |
DBLP DOI BibTeX RDF |
test reuse, run-time testing, Software engineering, architecture, component, COTS, built-in tests, real-time software, industrial practices, OO |
| 1 | Ming Gao, Hsiu-Ming Chang, Peter Lisherness, Kwang-Ting (Tim) Cheng |
Time-Multiplexed Online Checking.  |
IEEE Trans. Computers  |
2011 |
DBLP DOI BibTeX RDF |
fault tolerance, Availability, built-in tests, error-checking |
| 1 | Deepa Mannath, Dallas Webster, Victor Montaño-Martinez, David Cohen, Shai Kush, Thiagarajan Ganesan, Adesh Sontakke |
Structural approach for built-in tests in RF devices.  |
ITC  |
2010 |
DBLP DOI BibTeX RDF |
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| 1 | Mehrdad Nourani, Mohammad Tehranipoor, Nisar Ahmed |
Low-Transition Test Pattern Generation for BIST-Based Applications.  |
IEEE Trans. Computers  |
2008 |
DBLP DOI BibTeX RDF |
Low power pattern generation, Test generation, Built-in tests, Testing strategies, Random generation |
| 1 | Ioannis Voyiatzis |
An ALU-Based BIST Scheme for Word-Organized RAMs.  |
IEEE Trans. Computers  |
2008 |
DBLP DOI BibTeX RDF |
Memory control and access, Reliability, Test generation, Built-In Tests, Testing and Fault-Tolerance, Semiconductor Memories |
| 1 | Egas Henes Neto, Gilson I. Wirth, Fernanda Lima Kastensmidt |
Mitigating Soft Errors in SRAM Address Decoders Using Built-in Current Sensors.  |
J. Electronic Testing  |
2008 |
DBLP DOI BibTeX RDF |
Fault-tolerance, Reliability, Testing, Built-in tests, Error-checking |
| 1 | Colin Atkinson, Daniel Brenner, Giovanni Falcone, Monika Juhasz |
Specifying High-Assurance Services.  |
IEEE Computer  |
2008 |
DBLP DOI BibTeX RDF |
|
| 1 | Salem Abdennadher, Saghir A. Shaikh |
Practices in Mixed-Signal and RF IC Testing.  |
IEEE Design & Test of Computers  |
2007 |
DBLP DOI BibTeX RDF |
I/O testing, SiP testing, wireless transceiver testing, DFT, built-in tests, ATE |
| 1 | Daniel Brenner, Colin Atkinson, Rainer Malaka, Matthias Merdes, Barbara Paech, Dima Suliman |
Reducing verification effort in component-based software engineering through built-in testing.  |
Information Systems Frontiers  |
2007 |
DBLP DOI BibTeX RDF |
Run-time testing, MORABIT, Built-in test, Integration test |
| 1 | Soumendu Bhattacharya, Abhijit Chatterjee |
A DFT Approach for Testing Embedded Systems Using DC Sensors.  |
IEEE Design & Test of Computers  |
2006 |
DBLP DOI BibTeX RDF |
computer-aided design, test generation, built-in tests, reliability and testing |
| 1 | Egas Henes Neto, Ivandro Ribeiro, Michele G. Vieira, Gilson I. Wirth, Fernanda Lima Kastensmidt |
Using Bulk Built-in Current Sensors to Detect Soft Errors.  |
IEEE Micro  |
2006 |
DBLP DOI BibTeX RDF |
Reliability, Built-in tests, Error-checking, Testing and Fault-Tolerance |
| 1 | Daniel Brenner, Colin Atkinson, Barbara Paech, Rainer Malaka, Matthias Merdes, Dima Suliman |
Reducing Verification Effort in Component-Based Software Engineering through Built-In Testing.  |
EDOC  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Daniel Brenner |
Enabling Run-Time System Verification through Built-In Testing.  |
TAIC PART  |
2006 |
DBLP DOI BibTeX RDF |
|
| 1 | Hans-Gerhard Groß, Ina Schieferdecker, George Din |
Model-Based Built-In Tests.  |
Electr. Notes Theor. Comput. Sci.  |
2005 |
DBLP DOI BibTeX RDF |
|
| 1 | André DeHon, Helia Naeimi |
Seven Strategies for Tolerating Highly Defective Fabrication.  |
IEEE Design & Test of Computers  |
2005 |
DBLP DOI BibTeX RDF |
Reliability, integrated circuits, Reconfigurable hardware, Built-in tests, Testing strategies, Logic Arrays, Testing and Fault-Tolerance, Redundant design, Advanced Technologies |
| 1 | Taewoong Jeon, Hyonwoo Seung, Sungyoung Lee |
Embedding built-in tests in hot spots of an object-oriented framework.  |
SIGPLAN Notices  |
2002 |
DBLP DOI BibTeX RDF |
hook classes, testability, object-oriented framework, built-in test (BIT) |
| 1 | Taewoong Jeon, Sungyoung Lee, Hyonwoo Seung |
Increasing the Testability of Object-Oriented Frameworks with Built-in Tests.  |
AISA  |
2002 |
DBLP DOI BibTeX RDF |
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| 1 | Yingxu Wang, Graham King, Dilip Patel, Shushma Patel, Alec Dorling |
On Coping with Real-Time Software Dynamic Inconsistency by Built-in Tests.  |
Ann. Software Eng.  |
1999 |
DBLP DOI BibTeX RDF |
|
| 1 | Yingxu Wang, Graham King, Hakan Wickburg |
A Method for Built-in Tests in Component-based Software Maintenance.  |
CSMR  |
1999 |
DBLP DOI BibTeX RDF |
maintenance mode, normal mode, test component reuse, reengineering maintenance, Software engineering, software maintenance, software components, built-in test |
| 1 | Jian Shen, Jacob A. Abraham |
Synthesis of Native Mode Self-Test Programs.  |
J. Electronic Testing  |
1998 |
DBLP DOI BibTeX RDF |
native mode self-test, test synthesis, functional test generation |
| 1 | Bernhard Eschermann |
State Assignment for Hardwired VLSI Control Units.  |
ACM Comput. Surv.  |
1993 |
DBLP DOI BibTeX RDF |
coding constraints, VLSI, computer-aided design, synthesis, finite-state machines, logic design, sequential circuits, testability, integrated circuits, built-in tests, state assignment, control design |
| 1 | Paul H. Bardell, William H. McAnney |
Pseudorandom Arrays for Built-In Tests.  |
IEEE Trans. Computers  |
1986 |
DBLP DOI BibTeX RDF |
two-dimensional window property, Built-in self-test stimuli, linear dependencies in m- sequences, parallel LFSR sequences, pseudorandom binary sequences, pseudorandom sequences |
Displaying result #1 - #23 of 23 (100 per page; Change: )
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