Search results for "circuit clustering"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Cliff C. N. Sze, Ting-Chi Wang, Li-C. Wang	Multilevel circuit clustering for delay minimization.	IEEE Trans. on CAD of Integrated Circuits and Systems	2004	DBLP DOI BibTeX RDF
2	Deming Chen, Jason Cong	Delay optimal low-power circuit clustering for FPGAs with dual supply voltages.	ISLPED	2004	DBLP DOI BibTeX RDF	circuit clustering, low-power FPGA, dual supply voltage
2	Mehrdad Eslami Dehkordi, Stephen Dean Brown	Recursive circuit clustering for minimum delay and area.	FPGA	2003	DBLP DOI BibTeX RDF
2	Cliff C. N. Sze, Ting-Chi Wang	Optimal circuit clustering with variable interconnect delay.	ISCAS	2002	DBLP DOI BibTeX RDF
2	Juinn-Dar Huang, Jing-Yang Jou, Wen-Zen Shen, Hsien-Ho Chuang	On circuit clustering for area/delay tradeoff under capacity and pin constraints.	IEEE Trans. VLSI Syst.	1998	DBLP DOI BibTeX RDF
2	Hannah Honghua Yang, Martin D. F. Wong	Circuit clustering for delay minimization under area and pin constraints.	IEEE Trans. on CAD of Integrated Circuits and Systems	1997	DBLP DOI BibTeX RDF
1	Logan M. Rakai, Laleh Behjat, Sebastian Martin, Jose Aguado	An algebraic multigrid-based algorithm for circuit clustering.	Applied Mathematics and Computation	2012	DBLP DOI BibTeX RDF
1	Josep Torras Flaquer, Jean-Marc Daveau, Lirida A. B. Naviner, Philippe Roche	An approach to reduce computational cost in combinatorial logic netlist reliability analysis using circuit clustering and conditional probabilities.	IOLTS	2011	DBLP DOI BibTeX RDF
1	Tanuj Jindal, Charles J. Alpert, Jiang Hu, Zhuo Li, Gi-Joon Nam, Charles B. Winn	Detecting tangled logic structures in VLSI netlists.	DAC	2010	DBLP DOI BibTeX RDF	congestion prediction, rent rule, tangled logic, clustering
1	Joey Y. Lin, Deming Chen, Jason Cong	Optimal simultaneous mapping and clustering for FPGA delay optimization.	DAC	2006	DBLP DOI BibTeX RDF	clustering, FPGA, dynamic programming, technology mapping
1	Qinghua Liu, Malgorzata Marek-Sadowska	Pre-layout Physical Connectivity Prediction with Application in Clustering-Based Placement.	ICCD	2005	DBLP DOI BibTeX RDF
1	Jason Cong, Sung Kyu Lim	Edge separability-based circuit clustering with application to multilevel circuit partitioning.	IEEE Trans. on CAD of Integrated Circuits and Systems	2004	DBLP DOI BibTeX RDF
1	Cliff C. N. Sze, Ting-Chi Wang	Optimal circuit clustering for delay minimization under a more general delay model.	IEEE Trans. on CAD of Integrated Circuits and Systems	2003	DBLP DOI BibTeX RDF
1	Amit Singh, Ganapathy Parthasarathy, Malgorzata Marek-Sadowska	Efficient circuit clustering for area and power reduction in FPGAs.	ACM Trans. Design Autom. Electr. Syst.	2002	DBLP DOI BibTeX RDF	clustering, FPGA, interconnect, power, placement, congestion, Rent
1	Amit Singh, Malgorzata Marek-Sadowska	Efficient circuit clustering for area and power reduction in FPGAs.	FPGA	2002	DBLP DOI BibTeX RDF
1	Cliff C. N. Sze, Ting-Chi Wang	Multi-Level Circuit Clustering for Delay Minimization.	IWLS	2002	DBLP BibTeX RDF
1	Ling Wang, Henry Selvaraj	Performance Driven Circuit Clustering and Partitioning.	ITCC	2002	DBLP DOI BibTeX RDF	Cutsize, Clustering, Delay, Partitioning
1	Jason Cong, Sung Kyu Lim	Edge separability based circuit clustering with application to circuit partitioning.	ASP-DAC	2000	DBLP DOI BibTeX RDF
1	Avaneendra Gupta, John P. Hayes	CLIP: integer-programming-based optimal layout synthesis of 2D CMOS cells.	ACM Trans. Design Autom. Electr. Syst.	2000	DBLP DOI BibTeX RDF	CMOS networks, circuit clustering, diffusion sharing, leaf cell synthesis, transistor chains, two-dimensional layout, integer programming, integer linear programming, layout optimization, module generation
1	Amit Singh, Malgorzata Marek-Sadowska	Circuit clustering using graph coloring.	ISPD	1999	DBLP DOI BibTeX RDF
1	Charles J. Alpert, Andrew B. Kahng	A general framework for vertex orderings with applications to circuit clustering.	IEEE Trans. VLSI Syst.	1996	DBLP DOI BibTeX RDF
1	Ching-Wei Yeh	On the acceleration of flow-oriented circuit clustering.	IEEE Trans. on CAD of Integrated Circuits and Systems	1995	DBLP DOI BibTeX RDF
1	Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin	Circuit clustering using a stochastic flow injection method.	IEEE Trans. on CAD of Integrated Circuits and Systems	1995	DBLP DOI BibTeX RDF
1	Rajmohan Rajaraman, Martin D. F. Wong	Optimum clustering for delay minimization.	IEEE Trans. on CAD of Integrated Circuits and Systems	1995	DBLP DOI BibTeX RDF
1	Ching-Wei Yeh, Chung-Kuan Cheng, Ting-Ting Y. Lin	A probabilistic multicommodity-flow solution to circuit clustering problems.	ICCAD	1992	DBLP DOI BibTeX RDF
1	Lars W. Hagen, Andrew B. Kahng	A new approach to effective circuit clustering.	ICCAD	1992	DBLP DOI BibTeX RDF