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Results
Found 5 publication records. Showing 5 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 1 | James Tuck, Wonsun Ahn, Josep Torrellas, Luis Ceze |
SoftSig: Software-Exposed Hardware Signatures for Code Analysis and Optimization.  |
IEEE Micro  |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Mahmut T. Kandemir, Yuanrui Zhang, Sai Prashanth Muralidhara, Ozcan Ozturk, Sri Hari Krishna Narayanan |
Slicing based code parallelization for minimizing inter-processor communication.  |
CASES  |
2009 |
DBLP DOI BibTeX RDF |
automatic code parallelization, code analysis and optimization, iteration space slicing, parallelizing compilers |
| 1 | James Tuck, Wonsun Ahn, Luis Ceze, Josep Torrellas |
SoftSig: software-exposed hardware signatures for code analysis and optimization.  |
ASPLOS  |
2008 |
DBLP DOI BibTeX RDF |
multi-core architectures, memory disambiguation, runtime optimization |
| 1 | Ozcan Ozturk, Guangyu Chen, Mahmut T. Kandemir |
Multi-compilation: capturing interactions among concurrently-executing applications.  |
Conf. Computing Frontiers  |
2006 |
DBLP DOI BibTeX RDF |
multi-compilation, compiler, chip multiprocessor |
| 1 | Heiko Falk, Jens Wagner, André Schaefer |
Use of a Bit-true Data Flow Analysis for Processor-Specific Source Code Optimization.  |
ESTImedia  |
2006 |
DBLP DOI BibTeX RDF |
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