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GrowBag graphs for keyword ? (Num. hits/coverage)
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The graphs summarize 2778 occurrences of 1231 keywords
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Results
Found 2118 publication records. Showing 2118 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 4 | Sam Kamin, Lars Clausen, Ava Jarvis |
Jumbo: Run-Time Code Generation for Java and Its Applications.  |
CGO  |
2003 |
DBLP DOI BibTeX RDF |
Java, run-time code generation |
| 3 | Tobias J. K. Edler von Koch, Igor Böhm, Björn Franke |
Integrated instruction selection and register allocation for compact code generation exploiting freeform mixing of 16- and 32-bit instructions.  |
CGO  |
2010 |
DBLP DOI BibTeX RDF |
ARCompact, dual instruction set architecture, variable-length instructions, register allocation, code size, instruction selection |
| 3 | Tyler Sondag, Kian L. Pokorny, Hridesh Rajan |
Frances: a tool for understanding code generation.  |
SIGCSE  |
2010 |
DBLP DOI BibTeX RDF |
frances, visualization, compilers, code generation |
| 3 | Muthu Manikandan Baskaran, Albert Hartono, Sanket Tavarageri, Thomas Henretty, J. Ramanujam, P. Sadayappan |
Parameterized tiling revisited.  |
CGO  |
2010 |
DBLP DOI BibTeX RDF |
compile-time optimization, code generation, tiling |
| 3 | Chris C. J. Newburn |
There are at least two sides to every heterogeneous system.  |
CGO  |
2010 |
DBLP DOI BibTeX RDF |
code generation |
| 3 | Benjamin G. Zorn |
Performance is dead, long live performance!  |
CGO  |
2010 |
DBLP DOI BibTeX RDF |
code generation |
| 3 | Okan Topçu, Mehmet Adak, Halit Oguztüzün |
Metamodeling live sequence charts for code generation.  |
Software and System Modeling  |
2009 |
DBLP DOI BibTeX RDF |
Code generation, Metamodeling, Message sequence charts, Live sequence charts |
| 3 | Minwook Ahn, Yunheung Paek |
Fast Code Generation for Embedded Processors with Aliased Heterogeneous Registers.  |
T. HiPEAC  |
2009 |
DBLP DOI BibTeX RDF |
heterogeneous register architecture, register aliasing, compiler, code generation, register allocation, register coalescing |
| 3 | Roberto Lublinerman, Christian Szegedy, Stavros Tripakis |
Modular code generation from synchronous block diagrams: modularity vs. code size.  |
POPL  |
2009 |
DBLP DOI BibTeX RDF |
clustering, code generation, np-complete, embedded software, synchronous languages, block diagrams |
| 3 | Thomas Weigert, Frank Weil, Aswin van den Berg, Paul Dietz, Kevin Marth |
Automated Code Generation for Industrial-Strength Systems.  |
COMPSAC  |
2008 |
DBLP DOI BibTeX RDF |
program transformation, code generation, Model-driven engineering |
| 3 | Dominik Gessenharter |
Mapping the UML2 Semantics of Associations to a Java Code Generation Model.  |
MoDELS  |
2008 |
DBLP DOI BibTeX RDF |
Java, UML, Code Generation, Associations |
| 3 | Roberto Lublinerman, Stavros Tripakis |
Modular Code Generation from Triggered and Timed Block Diagrams.  |
IEEE Real-Time and Embedded Technology and Applications Symposium  |
2008 |
DBLP DOI BibTeX RDF |
Modularity, Code generation, Block diagrams |
| 3 | Yi-Hsuan Lee, Cheng Chen |
An Efficient Code Generation Algorithm for Non-orthogonal DSP Architecture.  |
VLSI Signal Processing  |
2007 |
DBLP DOI BibTeX RDF |
non-orthogonal architecture, code generation, DSP |
| 3 | Matteo Bordin, Tullio Vardanega |
Real-time Java from an automated code generation perspective.  |
JTRES  |
2007 |
DBLP DOI BibTeX RDF |
model-driven engineering, real-time Java, automated code generation |
| 3 | Martin Grabmüller, Dirk Kleeblatt |
Harpy: run-time code generation in haskell.  |
Haskell  |
2007 |
DBLP DOI BibTeX RDF |
haskell, dynamic code generation |
| 3 | Madhusudhan Govindaraju |
XML Schemas Based Flexible Distributed Code Generation Framework.  |
ICWS  |
2007 |
DBLP DOI BibTeX RDF |
Distributed Systems, Code Generation, XML Schemas |
| 3 | Michele Banci, Alessandro Fantechi, Stefania Gnesi, Giovanni Lombardi |
Model Driven Development and Code Generation: An Automotive Case Study.  |
SDL Forum  |
2007 |
DBLP DOI BibTeX RDF |
formal verification, formal modeling, automatic code generation, Service-Oriented applications, formal validation |
| 3 | Ralf Gitzel, Michael Schwind |
Experiences with hierarchy-based code generation in the J2EE context.  |
PPPJ  |
2006 |
DBLP DOI BibTeX RDF |
code generation, MDD, model-driven development, executable UML |
| 3 | Guilin Chen, Mahmut T. Kandemir |
Optimizing Address Code Generation for Array-Intensive DSP Applications.  |
CGO  |
2005 |
DBLP DOI BibTeX RDF |
|
| 3 | Cristina Vicente-Chicote, Ana Toledo Moreo, Pedro Sánchez-Palma |
Image Processing Application Development: From Rapid Prototyping to SW/HW Co-simulation and Automated Code Generation.  |
IbPRIA  |
2005 |
DBLP DOI BibTeX RDF |
prototyping, component-based development, co-simulation, automated code generation, image processing applications |
| 3 | Hongbo Rong, Alban Douillet, Ramaswamy Govindarajan, Guang R. Gao |
Code Generation for Single-Dimension Software Pipelining of Multi-Dimensional Loops.  |
CGO  |
2004 |
DBLP DOI BibTeX RDF |
|
| 3 | Georgios I. Goumas, Maria Athanasaki, Nectarios Koziris |
An Efficient Code Generation Technique for Tiled Iteration Spaces.  |
IEEE Trans. Parallel Distrib. Syst.  |
2003 |
DBLP DOI BibTeX RDF |
nonunimodular transformations, code generation, Loop tiling, Fourier-Motzkin elimination, supernodes |
| 3 | Samuel N. Kamin |
Routine run-time code generation.  |
OOPSLA Companion  |
2003 |
DBLP DOI BibTeX RDF |
Java, run-time code generation |
| 3 | Georgios I. Goumas, Maria Athanasaki, Nectarios Koziris |
Automatic code generation for executing tiled nested loops onto parallel architectures.  |
SAC  |
2002 |
DBLP DOI BibTeX RDF |
non-unimodular transformations, code generation, loop tiling, Fourier-Motzkin elimination, hermite normal forms |
| 3 | Yoonseo Choi, Taewhan Kim |
Address assignment combined with scheduling in DSP code generation.  |
DAC  |
2002 |
DBLP DOI BibTeX RDF |
offset assignment, scheduling, code generation |
| 3 | Christoph W. Keßler, Andrzej Bednarski |
Optimal integrated code generation for clustered VLIW architectures.  |
LCTES-SCOPES  |
2002 |
DBLP DOI BibTeX RDF |
integrated code generation, space profile, dynamic programming, register allocation, instruction scheduling, instruction selection |
| 3 | Christoph W. Keßler, Andrzej Bednarski |
A Dynamic Programming Approach to Optimal Integrated Code Generation.  |
LCTES/OM  |
2001 |
DBLP DOI BibTeX RDF |
integrated code generation, time profile, dynamic programming, register allocation, instruction scheduling, instruction selection |
| 3 | Yunjian Jiang, Robert K. Brayton |
Logic optimization and code generation for embedded control applications.  |
CODES  |
2001 |
DBLP DOI BibTeX RDF |
code generation, MDD, Esterel, logic optimization, multiple-valued |
| 3 | Ashok Sudarsanam, Sharad Malik |
Simultaneous reference allocation in code generation for dual data memory bank ASIPs.  |
ACM Trans. Design Autom. Electr. Syst.  |
2000 |
DBLP DOI BibTeX RDF |
memory bank assignment, code generation, register allocation, code optimization, graph labelling |
| 3 | Annette Muth, Thomas Kolloch, Thomas Maier-Komor, Georg Färber |
An Evaluation of Code Generation Strategies Targeting Hardware for the Rapid Prototyping of SDL-Specifications. (PDF / PS)  |
IEEE International Workshop on Rapid System Prototyping  |
2000 |
DBLP DOI BibTeX RDF |
asynchronous modeling language, decomposition strategies, level of concurrency, code generation, VHDL, rapid prototyping, SDL, implementation model, application specific hardware |
| 3 | Vangalur S. Alagar, L. Zhang |
Automatic code generation for real-time reactive systems in TROMLAB environment.  |
RTCSA  |
2000 |
DBLP DOI BibTeX RDF |
TROMLAB environment, rigorous framework, railroad crossing problem, benchmark example, generic real time Java libraries, Java code, Java, real-time systems, program compilers, automatic programming, software libraries, automatic code generation, real time reactive systems, implementation model |
| 3 | Wei-Kai Cheng, Youn-Long Lin |
Code generation of nested loops for DSP processors with heterogeneous registers and structural pipelining.  |
ACM Trans. Design Autom. Electr. Syst.  |
1999 |
DBLP DOI BibTeX RDF |
code generation, DSP |
| 3 | Massimiliano Poletto, Wilson C. Hsieh, Dawson R. Engler, M. Frans Kaashoek |
'C and tcc: A Language and Compiler for Dynamic Code Generation.  |
ACM Trans. Program. Lang. Syst.  |
1999 |
DBLP DOI BibTeX RDF |
ANSI C, dynamic code optimization, compilers, dynamic code generation |
| 3 | Michael W. Whalen, Mats Per Erik Heimdahl |
On the Requirements of High-Integrity Code Generation. (PDF / PS)  |
HASE  |
1999 |
DBLP DOI BibTeX RDF |
formal methods, code generation, critical systems |
| 3 | Guido Araujo, Sharad Malik |
Code generation for fixed-point DSPs.  |
ACM Trans. Design Autom. Electr. Syst.  |
1998 |
DBLP DOI BibTeX RDF |
scheduling, code generation, register allocation |
| 3 | Stan Y. Liao, Kurt Keutzer, Steven W. K. Tjiang, Srinivas Devadas |
A new viewpoint on code generation for directed acyclic graphs.  |
ACM Trans. Design Autom. Electr. Syst.  |
1998 |
DBLP DOI BibTeX RDF |
binate covering, code generation, directed acyclic graphs |
| 3 | Albert Benveniste, Paul Le Guernic, Pascal Aubry |
Compositionality in Dataflow Synchronous Languages: Specification and Code Generation.  |
COMPOS  |
1997 |
DBLP DOI BibTeX RDF |
desynchronisation, modularity, code generation, synchronous languages, separate compilation |
| 3 | Chris W. Loftus, A. Olsen, Euricio Inocêncio, Paula Viana |
A Code Generation Strategy for CORBA-Based Internet Applications. (PDF / PS)  |
EDOC  |
1997 |
DBLP DOI BibTeX RDF |
Internet, CORBA, Code generation, service creation, TINA |
| 3 | David J. Kolson, Alexandru Nicolau, Nikil D. Dutt, Ken Kennedy |
Optimal register assignment to loops for embedded code generation.  |
ACM Trans. Design Autom. Electr. Syst.  |
1996 |
DBLP DOI BibTeX RDF |
embedded systems, code generation, system design |
| 3 | Eero Lassila |
A Macro Expansion Approach to Embedded Processor Code Generation.  |
EUROMICRO  |
1996 |
DBLP DOI BibTeX RDF |
macro expansion approach, embedded processor code generation, embedded special-purpose processors, retargetable assembly-code-level macro expander, program flow analysis, hierarchical macro libraries, compiler writer, assembly language programmer, computer architecture |
| 3 | Dominique De Vito, Olivier Michel |
Effective SIMD Code Generation for the High-Level Declarative Data-Parallel Language 8 1/2.  |
EUROMICRO  |
1996 |
DBLP DOI BibTeX RDF |
SIMD code generation, high-level declarative data-parallel language 8 1/2, common control expressions, delay copies, execution scheme, parallel architectures, data-parallelism, SIMD architectures |
| 3 | Clifford Liem, Pierre G. Paulin, Marco Cornero, Ahmed Amine Jerraya |
Industrial experience using rule-driven retargetable code generation for multimedia applications.  |
ISSS  |
1995 |
DBLP DOI BibTeX RDF |
VideoPhone codec controller, audio telecommunications, dedicated compiler availability, high-fidelity audio, optimization abilities, rule-driven retargetable code generation, video telecommunications, knowledge based systems, computer architecture, multiprocessing systems, multimedia systems, application specific integrated circuits, multimedia applications, application-specific instruction set processors, instruction sets, telecommunication computing, codecs, VLIW processor, VLIW architecture, transformation rules, controller architecture, optimising compilers, industrial experience, videotelephony, target architecture, MPEG audio |
| 3 | Guido Araujo, Sharad Malik |
Optimal code generation for embedded memory non-homogeneous register architectures.  |
ISSS  |
1995 |
DBLP DOI BibTeX RDF |
TMS320C25 processor, [1, /spl infin/] model, embedded memory nonhomogeneous register architectures, expression trees, optimal code generation, register transfer graph, scheduling, computational complexity, graph theory, optimisation, computer architecture, register allocation, processor scheduling, storage allocation, microprocessor chips, instruction sets, instruction set architecture, sufficient conditions, instruction selection, structural representation |
| 3 | David J. Kolson, Alexandru Nicolau, Nikil Dutt, Ken Kennedy |
Optimal register assignment to loops for embedded code generation.  |
ISSS  |
1995 |
DBLP DOI BibTeX RDF |
data memory access, embedded code generation, heuristic modification, live variables, minimal spill code, optimal register assignment, scientific code, real-time systems, optimisation, storage allocation, loops, program control structures, exponential algorithm |
| 3 | Jingling Xue |
Constructing DO loops for non-convex iteration spaces in compiling for parallel machines. (PDF / PS)  |
IPPS  |
1995 |
DBLP DOI BibTeX RDF |
DO loops, nonconvex iteration spaces, parallel machines compiling, index points, communication code, code generation problems, code generation, program compilers, shared memory systems, distributed memory systems, data transfer, nested loops, lexicographical order, convex polyhedron |
| 3 | Dirk Lanneer, Johan Van Praet, Augusli Kifli, Koen Schoofs, Werner Geurts, Filip Thoen, Gert Goossens |
Chess: retargetable code generation for embedded DSP processors.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 85-102, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Guido Araujo, Srinivas Devadas, Kurt Keutzer, Stan Y. Liao, Sharad Malik, Ashok Sudarsanam, Steven W. K. Tjiang, Albert Wang |
Challenges in code generation for embedded processors.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 48-64, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Henk Corporaal, Jan Hoogerbrugge |
Code generation for transport triggered architectures.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 240-259, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Peter Marwedel |
Code generation for embedded processors: an introduction.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 14-31, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Steven Novack, Alexandru Nicolau, Nikil D. Dutt |
A Unified code generation approach using mutation scheduling.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 203-218, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Thomas Charles Wilson, Gary William Grewal, Shawn Henshall, Dilip K. Banerji |
An ILP-based approach to code generation.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 103-118, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Bernhard Wess |
Code generation based on trellis diagrams.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 188-202, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Farhad Mavaddat |
On transforming code generation to a parsing problem.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 153-170, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Wolfgang Schenk |
Retargetable code generation for parallel, pipelined processor structures.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 119-135, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 3 | Paul Vanoostende, Etienne Vanzieleghem, Emmanuel Rousseau, Christian Massy, François Gérard |
Retargetable code generation: key issues for successful introduction.  |
Code Generation for Embedded Processors ![In: Code Generation for Embedded Processors [Dagstuhl Workshop, August 31 - September 2, 1994], pp. 32-47, 1994, Kluwer. The full citation details ...](Pics/full.jpeg) |
1994 |
DBLP BibTeX RDF |
|
| 2 | Oscar R. Polo, Kristof Konings, Pablo Parra, Martin Knoblauch, Ignacio García, Sebastian Sanchez |
Preliminary feasibility analysis of component based modelling and automatic Java code generation for nanosatellite on-board software: short paper.  |
JTRES  |
2010 |
DBLP DOI BibTeX RDF |
software engineering, real-time systems |
| 2 | Antonio Gavilanes, Pedro J. Martín, Roberto Torres |
A Tool for Automatic Code Generation from Schemas.  |
ICCS  |
2009 |
DBLP DOI BibTeX RDF |
schemas, Automatic code generation, recurrence relations |
| 2 | Gilles Lasnier, Bechir Zalila, Laurent Pautet, Jérôme Hugues |
Ocarina : An Environment for AADL Models Analysis and Automatic Code Generation for High Integrity Applications.  |
Ada-Europe  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Jay L. T. Cornwall, Lee W. Howes, Paul H. J. Kelly, Phil Parsonage, Bruno Nicoletti |
High-performance SIMT code generation in an active visual effects library.  |
Conf. Computing Frontiers  |
2009 |
DBLP DOI BibTeX RDF |
SIMT, gpu, visual effects |
| 2 | Huayong Wang, Henrique Andrade, Bugra Gedik, Kun-Lung Wu |
Auto-vectorization through code generation for stream processing applications.  |
ICS  |
2009 |
DBLP DOI BibTeX RDF |
auto-vectorization, spade, stream processing, system s |
| 2 | Keisuke Watanabe, Makoto Imamura, Katsushi Asami, Toshiyuki Amanuma |
A Web Application Development Framework Using Code Generation from MVC-Based UI Model.  |
IWANN  |
2009 |
DBLP DOI BibTeX RDF |
User Interface, Code Generation, User Interface Model, Web Application Development, RIA |
| 2 | Ling Ding, Éric Schost |
Code Generation for Polynomial Multiplication.  |
CASC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Bugra Gedik, Henrique Andrade, Kun-Lung Wu |
A code generation approach to optimizing high-performance distributed data stream processing.  |
CIKM  |
2009 |
DBLP DOI BibTeX RDF |
profile driven optimization, streaming systems |
| 2 | Thomas Heinz, Reinhard Wilhelm |
Towards device emulation code generation.  |
LCTES  |
2009 |
DBLP DOI BibTeX RDF |
bit vector arithmetic, device emulation, code generation, binary translation, satisfiability modulo theories |
| 2 | Mikael Collin, Mats Brorsson |
Two-Level Dictionary Code Compression: A New Scheme to Improve Instruction Code Density of Embedded Applications.  |
CGO  |
2009 |
DBLP DOI BibTeX RDF |
Dictionary code compression, code density optimization, code generation |
| 2 | Emil Vassev, Serguei A. Mokhov |
An ASSL-generated architecture for autonomic systems.  |
C3S2E  |
2009 |
DBLP DOI BibTeX RDF |
ASSL, architecture, code generation, autonomic computing |
| 2 | Patricia Miravet, Ignacio Marín, Francisco Ortin, Abel Rionda |
DIMAG: a framework for automatic generation of mobile applications for multiple platforms.  |
Mobility Conference  |
2009 |
DBLP DOI BibTeX RDF |
data and state synchronization, device fragmentation, partially connected architectures, mobile applications, dynamic code generation |
| 2 | Stéphane Garredu, Evelyne Vittori, Jean François Santucci |
A DEVS-oriented intuitive modeling language.  |
SpringSim  |
2009 |
DBLP DOI BibTeX RDF |
methodology, code generation, MDA, specification languages, DEVS |
| 2 | Arquimedes Canedo, Ben A. Abderazek, Masahiro Sowa |
Compiler Support for Code Size Reduction Using a Queue-Based Processor.  |
T. HiPEAC  |
2009 |
DBLP DOI BibTeX RDF |
Reduced bit-width Instruction Set, Queue Computation Model, Code Generation, Code Size Reduction |
| 2 | Zhi Guo, Walid A. Najjar, Betul Buyukkurt |
Efficient hardware code generation for FPGAs.  |
TACO  |
2008 |
DBLP DOI BibTeX RDF |
FPGA, high-level synthesis, VHDL, Reconfigurable computing, data reuse |
| 2 | Yung-Chia Lin, Chia-Han Lu, Chung-Ju Wu, Chung-Lin Tang, Yi-Ping You, Ya-Chiao Moo, Jenq Kuen Lee |
Effective Code Generation for Distributed and Ping-Pong Register Files: A Case Study on PAC VLIW DSP Cores.  |
Signal Processing Systems  |
2008 |
DBLP DOI BibTeX RDF |
ping-pong register files, clustering, parallel processing, compiler, DSP, VLIW |
| 2 | Hyunuk Jung, Hoeseok Yang, Soonhoi Ha |
Optimized RTL Code Generation from Coarse-Grain Dataflow Specification for Fast HW/SW Cosynthesis.  |
Signal Processing Systems  |
2008 |
DBLP DOI BibTeX RDF |
VHDL, system level design, RTL, dataflow graph (DFG), HW/SW codesign |
| 2 | Jens Dietrich, Bastian Schenke, Gerd Wagner |
On Code Generation for Derived Associations.  |
Australian Software Engineering Conference  |
2008 |
DBLP DOI BibTeX RDF |
UML, code generation, MDA, reflection, model transformations, rule-based systems, MDE, derivation rules |
| 2 | Mohammad Mostafizur Rahman Mozumdar, Francesco Gregoretti, Luciano Lavagno, Laura Vanzago, Stefano Olivieri |
A Framework for Modeling, Simulation and Automatic Code Generation of Sensor Network Application.  |
SECON  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Mattias V. Eriksson, Oskar Skoog, Christoph W. Kessler |
Optimal vs. heuristic integrated code generation for clustered VLIW architectures.  |
SCOPES  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Xiaoyan Jia, Jie Guo, Gerhard Fettweis |
Integrated code generation by using fuzzy control system.  |
SCOPES  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Marko Rosenmüller, Norbert Siegmund, Gunter Saake, Sven Apel |
Code generation to support static and dynamic composition of software product lines.  |
GPCE  |
2008 |
DBLP DOI BibTeX RDF |
dynamic feature binding, static feature binding, software product lines, feature-oriented programming |
| 2 | Zef Hemel, Lennart C. L. Kats, Eelco Visser |
Code Generation by Model Transformation.  |
ICMT  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Marco A. Wehrmeister, Edison Pignaton de Freitas, Carlos Eduardo Pereira, Franz-Josef Rammig |
GenERTiCA: A Tool for Code Generation and Aspects Weaving.  |
ISORC  |
2008 |
DBLP DOI BibTeX RDF |
Code Generation, Aspect-Orientation, UML modeling, Distributed Real-Time Embedded Systems |
| 2 | Ronaldo Rodrigues Ferreira |
Automatic code generation and solution estimate for object-oriented embedded software.  |
OOPSLA Companion  |
2008 |
DBLP DOI BibTeX RDF |
java, embedded systems, code generation, design space exploration, modeling languages, alloy, software automation |
| 2 | Matthias Brun, Jérôme Delatour, Yvon Trinquet |
Code Generation from AADL to a Real-Time Operating System: An Experimentation Feedback on the Use of Model Transformation.  |
ICECCS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Seongnam Kwon, Soonhoi Ha |
Serialized multitasking code generation from dataflow specification.  |
ESTImedia  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Dariusz Biernacki, Jean-Louis Colaço, Grégoire Hamon, Marc Pouzet |
Clock-directed modular code generation for synchronous data-flow languages.  |
LCTES  |
2008 |
DBLP DOI BibTeX RDF |
real-time systems, compilation, semantics, type systems, synchronous languages |
| 2 | Mark Hampton, Krste Asanovic |
Compiling for vector-thread architectures.  |
CGO  |
2008 |
DBLP DOI BibTeX RDF |
compilers, code generation, vector processors |
| 2 | Sebastian Winkel, Rakesh Krishnaiyer, Robyn Sampson |
Latency-tolerant software pipelining in a production compiler.  |
CGO  |
2008 |
DBLP DOI BibTeX RDF |
latency-tolerant scheduling, load clustering, compiler, code generation, prefetching, software pipelining, modulo scheduling, memory latency, memory-level parallelism, itanium, epic |
| 2 | Benoit Boissinot, Sebastian Hack, Daniel Grund, Benoît Dupont de Dinechin, Fabrice Rastello |
Fast liveness checking for ssa-form programs.  |
CGO  |
2008 |
DBLP DOI BibTeX RDF |
compilers, dominance, jit-compilation, ssa form, liveness analysis |
| 2 | Vivek Sarkar |
Code optimization of parallel programs: evolutionary vs. revolutionary approaches.  |
CGO  |
2008 |
DBLP DOI BibTeX RDF |
parallel programs, multicore processors, code optimization |
| 2 | David Ryan Koes, Seth Copen Goldstein |
Near-optimal instruction selection on dags.  |
CGO  |
2008 |
DBLP DOI BibTeX RDF |
instruction selection |
| 2 | Ulrich Freund |
Mulit-level system integration based on AUTOSAR.  |
ICSE  |
2008 |
DBLP DOI BibTeX RDF |
rapid prototyping, embedded software, automotive, automatic code-generation |
| 2 | John C. Grundy, John G. Hosking, Jun Huh, Karen Na-Liu Li |
Marama: an eclipse meta-toolset for generating multi-view environments.  |
ICSE  |
2008 |
DBLP DOI BibTeX RDF |
domain-specific visual languages, meta-tools, code generation, model-driven engineering |
| 2 | Vinay Kulkarni, Sreedhar Reddy |
A model-driven approach for developing business applications: experience, lessons learnt and a way forward.  |
ISEC  |
2008 |
DBLP DOI BibTeX RDF |
modeling, code generation, meta model, business application |
| 2 | Jennifer Gillenwater, Gregory Malecha, Cherif Salama, Angela Yun Zhu, Walid Taha, Jim Grundy, John O'Leary |
Synthesizable high level hardware descriptions: using statically typed two-level languages to guarantee verilog synthesizability.  |
PEPM  |
2008 |
DBLP DOI BibTeX RDF |
statically typed two-level languages, synthesizability, verilog elaboration, code generation, hardware description languages |
| 2 | Marco Di Natale, Valerio Pappalardo |
Buffer optimization in multitask implementations of Simulink models.  |
ACM Trans. Embedded Comput. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
schedulability, code generation, Software models, real-time programming |
| 2 | Okan Topçu, Mehmet Adak, Halit Oguztüzün |
A metamodel for federation architectures.  |
ACM Trans. Model. Comput. Simul.  |
2008 |
DBLP DOI BibTeX RDF |
generic modeling environment, Simulation, architecture, code generation, metamodel, high-level architecture, message sequence charts, live sequence charts |
| 2 | Fabio Perez Marzullo, Rodrigo Novo Porto, Divany Gomes Lima, Jano Moreira de Souza, José Roberto Blaschek |
A Practical MDA Approach for Autonomic Profiling and Performance Assessment.  |
ECMDA-FA  |
2008 |
DBLP DOI BibTeX RDF |
Database, benchmarking, code generation, MDA, Profiling, performance testing |
| 2 | Aart J. C. Bik, David L. Kreitzer, Xinmin Tian |
A Case Study on Compiler Optimizations for the Intel® CoreTM 2 Duo Processor.  |
International Journal of Parallel Programming  |
2008 |
DBLP DOI BibTeX RDF |
Optimization, Parallelization, Compilers, Code generation, Vectorization |
| 2 | Irfan Hamid, Bechir Zalila, Elie Najm, Jérôme Hugues |
Automatic framework generation for hard real-time applications.  |
ISSE  |
2008 |
DBLP DOI BibTeX RDF |
Ravenscar, Real-time, Ada, Code generation, Model transformation, AADL |
| 2 | Matthias Regensburger, Christian Buckl, Alois Knoll, Gerhard Schrott |
Model Based Development of Safety-Critical Systems Using Template Based Code Generation.  |
PRDC  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Jiancheng Wan, Xudong Lu, Lei Lu |
A Model of User Interface Design and Its Code Generation.  |
IRI  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Cheng Wang, Wei-Yu Chen, Youfeng Wu, Bratin Saha, Ali-Reza Adl-Tabatabai |
Code Generation and Optimization for Transactional Memory Constructs in an Unmanaged Language.  |
CGO  |
2007 |
DBLP DOI BibTeX RDF |
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