Search results for "compiler-architecture interaction"

Found 5 publication records. Showing 5 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
1	Praveen Raghavan, Murali Jayapala, Andy Lambrechts, Javed Absar, Francky Catthoor	Playing the trade-off game: Architecture exploration using Coffeee.	ACM Trans. Design Autom. Electr. Syst.	2009	DBLP DOI BibTeX RDF	design, embedded systems, Energy, VLIW, processors, power estimation, loop transformations, architecture exploration, area, power-performance trade-off, compiler-architecture interaction
1	Saurabh Chheda, Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz	Combining compiler and runtime IPC predictions to reduce energy in next generation architectures.	Conf. Computing Frontiers	2004	DBLP DOI BibTeX RDF	fetch throttling, low power design, instruction level parallelism, compiler architecture interaction, adaptive voltage scaling
1	Osman S. Unsal, Raksit Ashok, Israel Koren, C. Mani Krishna, Csaba Andras Moritz	Cool-Cache: A compiler-enabled energy efficient data caching framework for embedded/multimedia processors.	ACM Trans. Embedded Comput. Syst.	2003	DBLP DOI BibTeX RDF	tagless caching, Low-power design, cache partitioning, compiler-architecture interaction
1	Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz	The Minimax Cache: An Energy-Efficient Framework for Media Processors.	HPCA	2002	DBLP DOI BibTeX RDF	media-sensitive caching, compiler- architecture interaction, energy-efficient architectures
1	Osman S. Unsal, Israel Koren, C. Mani Krishna, Csaba Andras Moritz	Cool-Fetch: Compiler-Enabled Power-Aware Fetch Throttling.	Computer Architecture Letters	2002	DBLP DOI BibTeX RDF	instruction Ievel parallelism, fetch-throttling, Low power design, compiler architecture interaction

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