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Results
Found 12 publication records. Showing 12 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 2 | Jean Paul Calvez, Olivier Pasquier |
Performance assessment of embedded Hw/Sw systems. (PDF / PS)  |
ICCD  |
1995 |
DBLP DOI BibTeX RDF |
embedded Hw/Sw systems, VLSI components, heterogeneous multiprocessor architectures, complex real-time applications, performance indexes, real-time event occurrences, software tasks, hardware functions, real-time performance analyzer, MCSE methodology, performance evaluation, real-time systems, VLSI, systems analysis, application specific integrated circuits, ASIC, performance assessment, event trace |
| 1 | Xin Li, Zhiping Jia, Xinjie Lu, Haiyang Wang |
Rule-Based Publish-Subscribe Mechanism for Real-time Applications.  |
ACIS-ICIS  |
2009 |
DBLP DOI BibTeX RDF |
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| 1 | Wei Dong, Chun Chen, Xue Liu, Kougen Zheng, Rui Chu, Jiajun Bu |
FIT: A Flexible, LIght-Weight, and Real-Time Scheduling System for Wireless Sensor Platforms.  |
DCOSS  |
2008 |
DBLP DOI BibTeX RDF |
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| 1 | Roman Gumzej, Wolfgang A. Halang |
QoS-oriented design of embedded systems with specification PEARL.  |
ISSE  |
2007 |
DBLP DOI BibTeX RDF |
Specification PEARL, UML profiles and patterns, Security, Quality-of-Service, Real-time systems, Reliability, Embedded systems, Dependability, Safety, Flexibility, Portability, Determinism, Co-design, Timeliness, Co-simulation, Readiness |
| 1 | Pablo Garcia Del Valle, David Atienza, Ivan Magan, Javier Garcia Flores, Esther Andres Perez, Jose Manuel Mendias, Luca Benini, Giovanni De Micheli |
A Complete Multi-Processor System-on-Chip FPGA-Based Emulation Framework.  |
VLSI-SoC  |
2006 |
DBLP DOI BibTeX RDF |
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| 1 | Basheer Al-Duwairi, Govindarasu Manimaran |
Combined Scheduling of Hard and Soft Real-Time Tasks in Multiprocessor Systems.  |
HiPC  |
2003 |
DBLP DOI BibTeX RDF |
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| 1 | Richard West, Jason Gloudon |
'QoS Safe' Kernel Extensions for Real-Time Resource Management.  |
ECRTS  |
2002 |
DBLP DOI BibTeX RDF |
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| 1 | S. Swaminathan, G. Manimaran |
A Reliability-Aware Value-Based Scheduler for Dynamic Multiprocessor Real-Time Systems. (PDF / PS)  |
IPDPS  |
2002 |
DBLP DOI BibTeX RDF |
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| 1 | Daniela Rosu, Karsten Schwan, Sudhakar Yalamanchili, Rakesh Jha |
On adaptive resource allocation for complex real-time application. (PDF / PS)  |
IEEE Real-Time Systems Symposium  |
1997 |
DBLP DOI BibTeX RDF |
complex real-time applications, high-performance real-time applications, limited resource availability, embedded system platforms, resource needs, over-sizing, worst-case application needs, time-critical applications, C31 systems, resource allocation, satisfiability, timing constraints, data-dependent, performance metrics, adaptive resource allocation |
| 1 | Kwei-Jay Lin, Ching-Sang Peng, Tony P. Ng |
An Active Real-Time Database Model for Air Traffic Control Systems.  |
ARTDB  |
1997 |
DBLP DOI BibTeX RDF |
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| 1 | R. Gerndt |
A Case Study in Co-Design of Communication Controllers.  |
CODES  |
1996 |
DBLP DOI BibTeX RDF |
codesign case study, embedded system, communication controller |
| 1 | Carlton Bickford, Marie S. Teo, Gary Wallace, John A. Stankovic, Krithi Ramamritham |
A robotic assembly application on the Spring real-time system. (PDF / PS)  |
IEEE Real Time Technology and Applications Symposium  |
1996 |
DBLP DOI BibTeX RDF |
printed circuit manufacture, printed circuit layout, robotic assembly application, Spring real-time system, run-time system support, predictability demands, robotic work-cell, circuit board assembly, user understanding, target hardware properties, process layout, resource layout, shared resource usage, process suspension, efficient run-time representation, real-time systems, robots, timing, completeness, flexibility, reengineering, timing analysis, circuit layout CAD, assembling, systems re-engineering, interprocess communication, program representation, porting, ease of use, industrial robots, software development tools |
Displaying result #1 - #12 of 12 (100 per page; Change: )
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