Search results for "composite fields"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Chiou-Yng Lee, Pramod Kumar Meher	Efficient Bit-Parallel Multipliers in Composite Fields.	APSCC	2008	DBLP DOI BibTeX RDF
2	Monjur Alam, Santosh Ghosh, Dipanwita Roy Chowdhury, Indranil Sengupta	Single Chip Encryptor/Decryptor Core Implementation of AES Algorithm.	VLSI Design	2008	DBLP DOI BibTeX RDF	AES, Reconfigurable Architecture, S- box, Rijndael, Composite fields
2	Berk Sunar	An Efficient Basis Conversion Algorithm for Composite Fields with Given Representations.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	change of basis, Finite fields, polynomial factorization, composite fields
2	Nele Mentens, Lejla Batina, Bart Preneel, Ingrid Verbauwhede	A Systematic Evaluation of Compact Hardware Implementations for the Rijndael S-Box.	CT-RSA	2005	DBLP DOI BibTeX RDF	inversion in GF(2n), smart card implementation, AES, S-box, composite fields
2	Arash Reyhani-Masoleh, M. Anwarul Hasan	Fast Normal Basis Multiplication Using General Purpose Processors.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	software algorithms, normal basis, ECDSA, Finite field multiplication, composite fields
2	Arash Reyhani-Masoleh, M. Anwarul Hasan	Fast Normal Basis Multiplication Using General Purpose Processors.	Selected Areas in Cryptography	2001	DBLP DOI BibTeX RDF	software algo- rithms, normal basis, ECDSA, Finite field multiplication, composite fields
2	Sangho Oh, Chang Han Kim, Jongin Lim, Dong Hyeon Cheon	Efficient Normal Basis Multipliers in Composite Fields.	IEEE Trans. Computers	2000	DBLP DOI BibTeX RDF	Finite field, composite field, optimal normal basis, bit-parallel multiplier
1	Mehran Mozaffari Kermani, Arash Reyhani-Masoleh	A Lightweight High-Performance Fault Detection Scheme for the Advanced Encryption Standard Using Composite Fields.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Mehran Mozaffari Kermani, Arash Reyhani-Masoleh	A Low-Power High-Performance Concurrent Fault Detection Approach for the Composite Field S-Box and Inverse S-Box.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF	inverse S-box, fault detection, Advanced encryption standard, S-box, composite fields
1	Yi Lin, Xiaoya He	Ring-shaped composite fields.	Kybernetes	2010	DBLP DOI BibTeX RDF
1	Mike Hamburg	Accelerating AES with Vector Permute Instructions.	CHES	2009	DBLP DOI BibTeX RDF	SSSE3, vector permute, cache-timing attacks, AES, fast implementations, composite fields, AltiVec
1	Chang Shu, Soonhak Kwon, Kris Gaj	FPGA accelerated multipliers over binary composite fields constructed via low hamming weight irreducible polynomials.	IET Computers & Digital Techniques	2008	DBLP DOI BibTeX RDF
1	Mehran Mozaffari Kermani, Arash Reyhani-Masoleh	A Lightweight Concurrent Fault Detection Scheme for the AES S-Boxes Using Normal Basis.	CHES	2008	DBLP DOI BibTeX RDF	fault detection, Advanced encryption standard, S-box, normal basis
1	Mehran Mozaffari Kermani, Arash Reyhani-Masoleh	A Structure-independent Approach for Fault Detection Hardware Implementations of the Advanced Encryption Standard.	FDTC	2007	DBLP DOI BibTeX RDF
1	Mehran Mozaffari Kermani, Arash Reyhani-Masoleh	Parity Prediction of S-Box for AES.	CCECE	2006	DBLP DOI BibTeX RDF
1	Arash Reyhani-Masoleh, M. Anwar Hasan	Low Complexity Word-Level Sequential Normal Basis Multipliers.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	Finite field, optimal normal basis, Massey-Omura multiplier
1	Arash Reyhani-Masoleh, M. Anwarul Hasan	Efficient Multiplication Beyond Optimal Normal Bases.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	normal bases, optimal bases, Finite fields, multiplication, composite fields
1	Berk Sunar, Erkay Savas, Çetin Kaya Koç	Constructing Composite Field Representations for Efficient Conversion.	IEEE Trans. Computers	2003	DBLP DOI BibTeX RDF	Composite and binary fields, change of basis, AES, primitive element
1	Sumio Morioka, Akashi Satoh	An Optimized S-Box Circuit Architecture for Low Power AES Design.	CHES	2002	DBLP DOI BibTeX RDF
1	Christof Paar, Peter Fleischmann, Peter Roelse	Efficient Multiplier Architectures for Galois Fields GF(2 4n).	IEEE Trans. Computers	1998	DBLP DOI BibTeX RDF	Karatsuba Ofman, modulo reduction, multiplication, VLSI architecture, Galois fields, bit parallel, composite fields
1	Christof Paar, Martin Rosner	Comparison of arithmetic architectures for Reed-Solomon decoders in reconfigurable hardware.	FCCM	1997	DBLP DOI BibTeX RDF
1	Christof Paar	A New Architecture for a Parallel Finite Field Multiplier with Low Complexity Based on Composite Fields.	IEEE Trans. Computers	1996	DBLP DOI BibTeX RDF