Search results for "computer architectures"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	John-Thones Amenyo	Engineering computer architectures for cognitive robotics - the CR/SARAMA model.	IEEE ICCI	2009	DBLP DOI BibTeX RDF
2	Philippe Chatelain, Alessandro Curioni, Michael Bergdorf, Diego Rossinelli, Wanda Andreoni, Petros Koumoutsakos	Vortex Methods for Massively Parallel Computer Architectures.	VECPAR	2008	DBLP DOI BibTeX RDF
2	Claudio Lucchese, Salvatore Orlando, Raffaele Perego	Parallel Mining of Frequent Closed Patterns: Harnessing Modern Computer Architectures.	ICDM	2007	DBLP DOI BibTeX RDF
2	Ph. Philipov, Vladimir Lazarov, Z. Zlatev, M. Ivanova	A Parallel Architecture for Radix-2 Fast Fourier Transform.	John Vincent Atanasoff Symposium	2006	DBLP DOI BibTeX RDF	Highperformance computer architectures, Parallel Fast Fourier Transform
2	Francisco de Assis Zampirolli, Roberto de Alencar Lotufo	Classification of the Distance Transformation Algorithms under the Mathematical Morphology Approach.	SIBGRAPI	2000	DBLP DOI BibTeX RDF	distance transformation algorithm classification, sequential raster algorithms, parallel algorithms, image processing, image processing, computer architectures, mathematical morphology, binary image, distance metric, propagation algorithms
2	Carl Ebeling, Darren C. Cronquist, Paul Franklin	Configurable computing: the catalyst for high-performance architectures.	ASAP	1997	DBLP DOI BibTeX RDF	high-performance architectures, cost-performance, application-specific computation pipelines, static configuration, FPGAs, computational complexity, computer architectures, configurable computing, dynamic control, RaPiD, application-specific hardware
2	A. Lodeczi	Model-integrated parallel application synthesis.	ECBS	1997	DBLP DOI BibTeX RDF	model-integrated parallel application synthesis, Texas Instruments TMS320C40, Analog Devices ADSP21060, flexible topology, embedded parallel signal processing, hardware topology, model-integrated programming environment, Multigraph Architecture, high-level system models, network of processors, software engineering, software engineering, complexity, parallel computer architectures, I/O bandwidth
2	Gary S. H. Tan, Yong Meng Teo	Experiences in simulating a declarative multiprocessor.	Annual Simulation Symposium	1995	DBLP DOI BibTeX RDF	declarative multiprocessor simulation, declarative programming languages, Flagship parallel reduction machine, packet-based graph reduction model, executional units, timing characteristics, event-driven timing scheme, tightly-coupled processor-store pairs, performance evaluation, performance evaluation, parallel architectures, virtual machines, timing, parallel machines, synchronisation, synchronisation, parallel languages, functional languages, functional languages, functional simulator, parallel computer architectures, MIMD architecture, delta network
2	William F. Richardson, Erik Brunvand	Precise exception handling for a self-timed processor. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	precise exception handling, self-timed processor, multiple concurrent processes, self-timed queues, decoupled computer architectures, micropipelined processor, Fred, pipelined computer architecture, out-of-order instruction completion, parallel architectures, exception handling, instruction level parallelism, self-adjusting systems, self-timed systems
2	Giovanni Chiola, Giuliana Franceschinis, Rossano Gaeta	Modeling Symmetric Computer Architectures by SWNs.	Application and Theory of Petri Nets	1994	DBLP DOI BibTeX RDF
2	Daniel H. Linder, James C. Harden	Access Graphs: A Model for Investigating Memory Consistency.	IEEE Trans. Parallel Distrib. Syst.	1994	DBLP DOI BibTeX RDF	access pipelining, synchronization, caches, computer architecture, computer architectures, synchronisation, shared memory systems, memory consistency, massively parallel systems
2	Arndt Bode, Mario Dal Cin (eds.)	Parallel Computer Architectures: Theory, Hardware, Software, Applications	Parallel Computer Architectures	1993	DBLP BibTeX RDF
2	Frank Dederichs, Claus Dendorfer, Rainer Weber	FOCUS: A Formal Design Method for Distributed Systems.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	M. Peric, M. Schäfer, E. Schreck	Numerical Simulation of Complex Fluid Flows on MIMD Computers.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Johannes Schwider, Norbert Streibl, Konrad Zürl	Optoelectronic Interconnections.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Fridolin Hofmann, Mario Dal Cin, A. Crygier, H. Hessenauer, U. Hildebrand, Claus-Uwe Linster, Thomas Thiel, Stefan Turowski	MEMSY - A Modular Expandable Multiprocessor System.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Markus Pawlowski, Rudolf Bayer	Parallel Sorting of Large Data Volumes on Distributed Memory Multiprocessors.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Michael Fäustle	An Orthogonal Distribution Language for Uniform Object-Oriented Languages.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Eike Jessen, Wolfgang Ertel, Christian B. Suttner	Optimal Multiprogramming Control for Parallel Computations.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Michael Griebel, W. Huber, T. Störtkuhl, Christoph Zenger	On the Parallel Solution of 3D PDEs on a Network of Workstations and on Vector Computers.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Volker Fischer, Heinrich Niemann	Parallelism in a Semantic Network for Image Understanding.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Peter A. Krauss, Kurt Antreich	Application of Fault Parallelism to the Automatic Test Pattern Generation for Sequential Circuits.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Hermann Hellwagner	Randomized Shared Memory - Concept and Efficiency of a Scalable Shared Memory Scheme.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Richard Hofmann	The Distributed Hardware Monitor ZM4 and its Interface to MEMSY.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Jürgen Kleinöder	Object- and Memory-Management Architecture - A Concept for Open, Object-Oriented Operating Systems.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Thomas Ludwig 0002	Load Management on Multiprocessor Systems.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Herbert A. Früchtl, Peter Otto	Quantum Mechanical Programs for Distributed Systems: Strategies and Results.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Henning Spruth, Frank M. Johannes	Architectures for Parallel Slicing Enumeration in VLSI Layout.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Dominik Gomm, Ekkart Kindler	Causality Based Proof of a Distributed Shared Memory System.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Franz J. Hauck	Towards the Implementation of a Uniform Object Model.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Mario Dal Cin, A. Crygier, H. Hessenauer, U. Hildebrand, Joachim Hönig, Wolfgang Hohl, Edgar Michel, András Pataricza	Fault Tolerance in Distributed Shared Memory Multiprocessors.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Günter Böckle, Christof Störmann, Isolde Wildgruber	Methods for Exploitation of Fine-Grained Parallelism.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Franz Hartleb	Graph Models for Performance Evaluation of Parallel Programs.	Parallel Computer Architectures	1993	DBLP DOI BibTeX RDF
2	Goetz Graefe, Diane L. Davison	Encapsulation of Parallelism and Architecture-Independence in Extensible Database Query Execution.	IEEE Trans. Software Eng.	1993	DBLP DOI BibTeX RDF	extensible database query execution, database application domains, high functionality, Volcano query execution engine, query processing operators, arbitrarily complex query evaluation plans, data manipulation operators, exchange operator, generalized exchange operator, database query processing software, bit vector filtering, parallel programming, parallelism, query processing, debugging, distributed databases, computer architectures, high performance, hierarchical architectures
2	Philip A. Wilsey, Subrata Dasgupta	A formal model of computer architectures for digital system design environments.	IEEE Trans. on CAD of Integrated Circuits and Systems	1990	DBLP DOI BibTeX RDF
2	Andreas Geyer-Schulz, Johann Mitlöhner, Alfred Taudes	An APL-Simulator of Non-Von Neumann Computer Architectures.	APL	1990	DBLP DOI BibTeX RDF	APL
2	Edward H. Bensley, Thomas J. Brando, J. C. Fohlin, Myra Jean Prelle, Ann Wollrath	MITRE's future generation computer architectures program.	SIGPLAN Notices	1989	DBLP DOI BibTeX RDF
2	Werner Damm	A Microprogramming Logic.	IEEE Trans. Software Eng.	1988	DBLP DOI BibTeX RDF	microprogramming logic, syntax-directed proof system, horizontal computer architectures, clocked microarchitectures, axiomatic definition, microoperations, low-level parallelism, dynamic conflicts, specification, computer architecture, theorem proving, specification languages, architecture description language, formal logic, microprogramming, AADL, timing behavior
2	Laxmi N. Bhuyan	Introduction to session R2 (session overiew): advanced computer architectures.	ACM Conference on Computer Science	1985	DBLP DOI BibTeX RDF
2	Samuel H. Fuller, Paul Shaman, David Lamb, William E. Burr	Evaluation of computer architectures via test programs.	AFIPS National Computer Conference	1977	DBLP DOI BibTeX RDF
2	Samuel H. Fuller, Harold S. Stone, William E. Burr	Initial selection and screening of the CFA candidate computer architectures.	AFIPS National Computer Conference	1977	DBLP DOI BibTeX RDF
2	Tomlinson Gene Rauscher, Ashok K. Agrawala	Developing application oriented computer architectures on general purpose microprogrammable machines.	AFIPS National Computer Conference	1976	DBLP DOI BibTeX RDF
1	Alexis De Vos, Michiel Boes, Stijn De Baerdemacker	Reversible Computation, Quantum Computation, and Computer Architectures in Between.	Multiple-Valued Logic and Soft Computing	2012	DBLP BibTeX RDF
1	Avinash Srinivasa, Masha Sosonkina, Pieter Maris, James P. Vary	Dynamic Adaptations in ab-initio Nuclear Physics Calculations on Multicore Computer Architectures.	IPDPS Workshops	2011	DBLP DOI BibTeX RDF
1	Robert Law	Using student blogs for documentation in software development projects.	ITiCSE	2011	DBLP DOI BibTeX RDF
1	Pieter Maris, Masha Sosonkina, James P. Vary, Esmond G. Ng, Chao Yang	Scaling of ab-initio nuclear physics calculations on multicore computer architectures.	Procedia CS	2010	DBLP DOI BibTeX RDF
1	Nick Soveiko, Michel S. Nakhla, Ramachandra Achar	Comparison Study of Performance of Parallel Steady State Solver on Different Computer Architectures.	IEEE Trans. on CAD of Integrated Circuits and Systems	2010	DBLP DOI BibTeX RDF
1	Curtis L. Janssen, Helgi Adalsteinsson, Scott Cranford, Joseph P. Kenny, Ali Pinar, David A. Evensky, Jackson Mayo	A Simulator for Large-Scale Parallel Computer Architectures.	IJDST	2010	DBLP DOI BibTeX RDF
1	Peter Jamieson, Darrel Davis, Brooke Spangler	The Mythical Creature Approach - A Simulation Alternative to Building Computer Architectures.	FECS	2010	DBLP BibTeX RDF
1	Konstantin Kalgin	Comparative Study of Parallel Algorithms for Asynchronous Cellular Automata Simulation on Different Computer Architectures.	ACRI	2010	DBLP DOI BibTeX RDF
1	Philipp Ciechanowicz, Herbert Kuchen	Enhancing Muesli's Data Parallel Skeletons for Multi-core Computer Architectures.	HPCC	2010	DBLP DOI BibTeX RDF
1	Moshe Bach, Mark Charney, Robert Cohn, Elena Demikhovsky, Tevi Devor, Kim M. Hazelwood, Aamer Jaleel, Chi-Keung Luk, Gail Lyons, Harish Patil, Ady Tal	Analyzing Parallel Programs with Pin.	IEEE Computer	2010	DBLP DOI BibTeX RDF	Software engineering, Operating systems, Computer architectures, Processor architectures, Computer systems organization, Multiple processor systems
1	Andrew Nere, Mikko H. Lipasti	Cortical architectures on a GPGPU.	GPGPU	2010	DBLP DOI BibTeX RDF	cortical architecture, hypercolumn, minicolumn, GPGPU, CUDA
1	Anastasia Ailamaki	Database systems in the multicore era.	SPAA	2010	DBLP DOI BibTeX RDF	deep memory hierarchies, multithreaded storage management, multicore systems
1	Albert Meixner, Daniel J. Sorin	Dynamic Verification of Memory Consistency in Cache-Coherent Multithreaded Computer Architectures.	IEEE Trans. Dependable Sec. Comput.	2009	DBLP DOI BibTeX RDF
1	Jari-Matti Mäkelä, Jani Paakkulainen, Ville Leppänen	MVTsim: software simulator for multicore on chip parallel computer architectures.	CompSysTech	2009	DBLP DOI BibTeX RDF
1	Fiona A. C. Polack	Self-organisation for Survival in Complex Computer Architectures.	SOAR	2009	DBLP DOI BibTeX RDF
1	John-Thones Amenyo	Programmable Cellular Automata as Intermediate Computational Formalisms in End-User Parallel Programming of Massively Multi-Core Computer Architectures.	CSC	2009	DBLP BibTeX RDF
1	Frank Eichinger, Klemens Böhm	Selecting Computer Architectures by Means of Control-Flow-Graph Mining.	IDA	2009	DBLP DOI BibTeX RDF
1	Bertil Schmidt, Douglas L. Maskell	Workshop on Using Emerging Parallel Architectures for Computational Science.	ICCS	2009	DBLP DOI BibTeX RDF	High Performance Computing, Reconfigurable Computing, Computational Science, GPGPU, Parallel Computer Architectures, Heterogeneous Multi-cores
1	Dileep George	How to make computers that work like the brain.	DAC	2009	DBLP DOI BibTeX RDF	spatio-temporal learning, brain, hierarchical learning, neocortex
1	Danilo Ravotto, Edgar E. Sánchez, Matteo Sonza Reorda, Giovanni Squillero	Design validation of multithreaded architectures using concurrent threads evolution.	SBCCI	2009	DBLP DOI BibTeX RDF	simulation based techniques, functional validation
1	Timothy Daryl Stanley	Using digital logic simulation as a teaching aid in discrete mathematics, hardware and operating systems, networking, computer organization and computer architecture: a workshop outline.	SIGITE Conference	2009	DBLP DOI BibTeX RDF	visualization, learning environment, logic simulation
1	Johnny Yeung, Vincent Tam, Edmund Y. Lam, C. H. Leung	Developing an Innovative and Pen-Based Simulator to Enhance Education and Research in Computer Systems.	ICALT	2009	DBLP DOI BibTeX RDF
1	Yan Li, Li Zhao, Haibo Lin, Alex C. Chow, Jeffery R. Diamond	A performance model for Fast Fourier Transform.	IPDPS	2009	DBLP DOI BibTeX RDF
1	Yupeng Chen, Bertil Schmidt, Douglas L. Maskell	A Reconfigurable Bloom Filter Architecture for BLASTN.	ARCS	2009	DBLP DOI BibTeX RDF	genomic sequence analysis, bioinformatics, reconfigurable computing, Bloom filter
1	Werner Backes, Susanne Wetzel	Parallel Lattice Basis Reduction Using a Multi-threaded Schnorr-Euchner LLL Algorithm.	Euro-Par	2009	DBLP DOI BibTeX RDF
1	Maraike Schellmann, Sergei Gorlatch, Dominik Meiländer, Thomas Kösters, Klaus P. Schäfers, Frank Wübbeling, Martin Burger	Parallel Medical Image Reconstruction: From Graphics Processors to Grids.	PaCT	2009	DBLP DOI BibTeX RDF
1	Luigi Carro, Stephan Wong	Introduction to the Future of Reconfigurable Computing and Processor Architectures.	SAMOS	2009	DBLP DOI BibTeX RDF
1	Matthew D. T. Lewis, Paolo Marin, Tobias Schubert, Massimo Narizzano, Bernd Becker, Enrico Giunchiglia	PaQuBE: Distributed QBF Solving with Advanced Knowledge Sharing.	SAT	2009	DBLP DOI BibTeX RDF	Parallel QBF Solving, Master/Slave Architecture, MPI, Message Passing
1	Mile K. Stojcev	Sajjan G. Shiva, Advanced Computer Architectures , CRC Press, Francis & Taylor Group, Boca Raton (2006) ISBN 0-8493-3758-5 Hardcover. pp 335, plus XIV.	Microelectronics Reliability	2008	DBLP DOI BibTeX RDF
1	Alberto Nuñez, Javier Fernández, José Daniel García, Laura Prada, Jesús Carretero	SIMCAN: a SIMulator framework for computer architectures and storage networks.	SimuTools	2008	DBLP DOI BibTeX RDF	I/O simulation, distributed systems simulation, network storage simulation
1	Hala A. Farouk	A Proposal for Taxonomy of Non-Classical Computer Architectures.	HPCNCS	2008	DBLP BibTeX RDF
1	Vivek Sarkar	Code optimization of parallel programs: evolutionary vs. revolutionary approaches.	CGO	2008	DBLP DOI BibTeX RDF	parallel programs, multicore processors, code optimization
1	Quang Dinh, Deming Chen, Martin D. F. Wong	Efficient ASIP design for configurable processors with fine-grained resource sharing.	FPGA	2008	DBLP DOI BibTeX RDF	multi-cycle IO, compilation, ASIP, resource sharing, configurable processor
1	K. Sándor, M. Kozlovszky, V. Kamarás, L. Ficsór, S. V. Varga, B. Molnár	Porting a 3D image registration application to multi-core environment.	SpringSim	2008	DBLP DOI BibTeX RDF	3D image registration, application porting, digital microscopy, virtual microscopy, parallel programming
1	Paul Biggar, Nicholas Nash, Kevin Williams, David Gregg	An experimental study of sorting and branch prediction.	ACM Journal of Experimental Algorithmics	2008	DBLP DOI BibTeX RDF	caching, Sorting, branch prediction, pipeline architectures
1	Gary W. Howell, James Demmel, Charles T. Fulton, Sven Hammarling, Karen Marmol	Cache efficient bidiagonalization using BLAS 2.5 operators.	ACM Trans. Math. Softw.	2008	DBLP DOI BibTeX RDF	BLAS 2.5, Householder reflections, bidiagonalization, SVD, matrix factorization, singular values, cache-efficient
1	Yaoxue Zhang	The Challenges and Opportunities in Transparent Computing.	EUC	2008	DBLP DOI BibTeX RDF
1	O. Wohlmuth	Keynote: High performance computing based on FPGAS.	FPL	2008	DBLP DOI BibTeX RDF
1	Minghua Jiang, Ming Hu, Tao Peng, Yixiang Ding	Fuzzy Reliability Analysis of a Multi-sensor Fusion System.	FSKD	2008	DBLP DOI BibTeX RDF
1	Pingjing Lu, Yonggang Che, Zhenghua Wang	An Effective Iterative Compilation Search Algorithm for High Performance Computing Applications.	HPCC	2008	DBLP DOI BibTeX RDF
1	Jérôme Darbon, Alexandre Cunha, Tony F. Chan, Stanley Osher, Grant J. Jensen	Fast nonlocal filtering applied to electron cryomicroscopy.	ISBI	2008	DBLP DOI BibTeX RDF
1	Scott Davidson	How to make your own processor architecture.	IEEE Design & Test of Computers	2008	DBLP DOI BibTeX RDF	system-on-chip computing, FPGAs, ASICs, processor architecture, processor design
1	Michael E. Kounavis, Frank L. Berry	Novel Table Lookup-Based Algorithms for High-Performance CRC Generation.	IEEE Trans. Computers	2008	DBLP DOI BibTeX RDF
1	A. Singh, Chen Chen, Weiguo Liu, W. Mitchell, Bertil Schmidt	A Hybrid Computational Grid Architecture for Comparative Genomics.	IEEE Transactions on Information Technology in Biomedicine	2008	DBLP DOI BibTeX RDF
1	Gilles Barthe, César Kunz, Jorge Luis Sacchini	Certified Reasoning in Memory Hierarchies.	APLAS	2008	DBLP DOI BibTeX RDF
1	Abid M. Malik, Michael Chase, Tyrel Russell, Peter van Beek	An Application of Constraint Programming to Superblock Instruction Scheduling.	CP	2008	DBLP DOI BibTeX RDF
1	Pedro A. Castillo, Antonio Miguel Mora, Juan Julián Merelo Guervós, Juan Luís Jiménez Laredo, Miquel Moretó, Francisco J. Cazorla, Mateo Valero, Sally A. McKee	Architecture Performance Prediction Using Evolutionary Artificial Neural Networks.	EvoWorkshops	2008	DBLP DOI BibTeX RDF
1	Moni Naor, Gil Segev, Udi Wieder	History-Independent Cuckoo Hashing.	ICALP	2008	DBLP DOI BibTeX RDF
1	Alexandre Duchateau, Albert Sidelnik, María Jesús Garzarán, David A. Padua	P-Ray: A Software Suite for Multi-core Architecture Characterization.	LCPC	2008	DBLP DOI BibTeX RDF
1	Alexandros Stamatakis, Michael Ott	Exploiting Fine-Grained Parallelism in the Phylogenetic Likelihood Function with MPI, Pthreads, and OpenMP: A Performance Study.	PRIB	2008	DBLP DOI BibTeX RDF
1	Guenter Khyo, Peter P. Puschner, Martin Delvai	An Operating System for a Time-Predictable Computing Node.	SEUS	2008	DBLP DOI BibTeX RDF	Temporal Predictability, Determinism, Real-Time Operating Systems, Time-Triggered Architecture
1	Ahmad-Reza Sadeghi	Trusted Computing - Special Aspects and Challenges.	SOFSEM	2008	DBLP DOI BibTeX RDF
1	Fernando J. Barros	Modeling and simulation of parallel adaptive divide-and-conquer algorithms.	The Journal of Supercomputing	2008	DBLP DOI BibTeX RDF	Dynamic structure models, Simulation, Adaptive algorithms
1	David Valencia, Antonio Plaza, Pablo Martínez Cobo, Javier Plaza	Parallel Processing of High-Dimensional Remote Sensing Images Using Cluster Computer Architectures.	I. J. Comput. Appl.	2007	DBLP BibTeX RDF
1	Pranav Vaidya, Jaehwan John Lee	Simulation of hybrid computer architectures: simulators, methodologies and recommendations.	VLSI-SoC	2007	DBLP DOI BibTeX RDF
1	Avi Mendelson	Current trends in computer architectures: multi-cores, many-cores and special-cores.	ICS	2007	DBLP DOI BibTeX RDF
1	R. Iris Bahar, Dan W. Hammerstrom, Justin E. Harlow III, William H. Joyner Jr., Clifford Lau, Diana Marculescu, Alex Orailoglu, Massoud Pedram	Architectures for Silicon Nanoelectronics and Beyond.	IEEE Computer	2007	DBLP DOI BibTeX RDF	Silicon devices, Computer architectures, Nanotechnology
1	Wayne Wolf	Guest Editor's Introduction: The Embedded Systems Landscape.	IEEE Computer	2007	DBLP DOI BibTeX RDF	software architectures, computer architectures, embedded computing