Search results for "concurrent error detection"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Sobeeh Almukhaizim, Yiorgos Makris	Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	asynchronous burst-mode machines, error-detecting codes, Concurrent error detection, Berger code
3	Nikhil Joshi, Jayachandran Sundararajan, Kaijie Wu, Bo Yang, Ramesh Karri	Tamper Proofing by Design Using Generalized Involution-Based Concurrent Error Detection for Involutional Substitution Permutation and Feistel Networks.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	Subsitution Permutation Networks (SPN), ANUBIS, TwoFish, cryptography, Concurrent Error Detection (CED), tamper proofing, Feistel networks
3	Sumeet Kumar, Aneesh Aggarwal	Self-checking instructions: reducing instruction redundancy for concurrent error detection.	PACT	2006	DBLP DOI BibTeX RDF	RISC/CISC, reducing instruction redundancy, redundant multi-threading, self-checking instructions, concurrent error detection, VLIW architectures
3	Nikhil Joshi, Kaijie Wu, Ramesh Karri	Concurrent Error Detection Schemes for Involution Ciphers.	CHES	2004	DBLP DOI BibTeX RDF	Involutional ciphers, KHAZAD, Fault Tolerance, Concurrent Error Detection (CED)
3	Jien-Chung Lo	Analysis of a BICS-Only Concurrent Error Detection Method.	IEEE Trans. Computers	2002	DBLP DOI BibTeX RDF	unsafe probability, reliability, fault coverage, testability, concurrent error detection, built-in current sensors, operating speed
3	Debaleena Das, Nur A. Touba, Markus Seuring, Michael Gössel	Low Cost Concurrent Error Detection Based on Modulo Weight-Based Codes.	IOLTW	2000	DBLP DOI BibTeX RDF	error detecting codes, Concurrent error detection, self-checking checkers
3	Debaleena Das, Nur A. Touba	Synthesis of Circuits with Low-Cost Concurrent Error Detection Based on Bose-Lin Codes.	J. Electronic Testing	1999	DBLP DOI BibTeX RDF	Bose-Lin codes, sequential circuits, logic synthesis, concurrent error detection, self-checking circuits
3	Rubin A. Parekhji, G. Venkatesh, Sunil D. Sherlekar	Monitoring machine based synthesis technique for concurrent error detection in finite state machines.	J. Electronic Testing	1996	DBLP DOI BibTeX RDF	monitoring machines, finite state machine synthesis, concurrent error detection
3	Douglas M. Blough, Andrzej Pelc	Almost Certain Fault Diagnosis Through Algorithm-Based Fault Tolerance.	IEEE Trans. Parallel Distrib. Syst.	1994	DBLP DOI BibTeX RDF	failureanalysis, almost certain fault diagnosis, multiprocessorsystems, incorrect computations, concurrent error detection mechanisms, erroneous dataelements, reliability, fault tolerant computing, multiprocessing systems, error detection, probabilistic analysis, concurrent error detection, algorithm-based fault tolerance
3	D. L. Tao, Carlos R. P. Hartmann	A Novel Concurrent Error Detection Scheme for FFT Networks.	IEEE Trans. Parallel Distrib. Syst.	1993	DBLP DOI BibTeX RDF	concurrent error detection scheme, FFT networks, algorithm-based fault tolerancetechniques, digital signalprocessing chips, fault tolerant computing, fast Fourier transforms, error detection, fault coverage, system performance, roundoff errors, round-off errors
2	Naghmeh Karimi, Michail Maniatakos, Abhijit Jas, Chandra Tirumurti, Yiorgos Makris	Workload-Cognizant Concurrent Error Detection in the Scheduler of a Modern Microprocessor.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF	scheduler, microprocessor, invariance, Concurrent error detection
2	Arash Hariri, Arash Reyhani-Masoleh	Concurrent Error Detection in Montgomery Multiplication over Binary Extension Fields.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF	finite fields, elliptic curve cryptography, concurrent error detection, Montgomery multiplication
2	Chiou-Yng Lee, Yu-Hsin Chiu, Jung-Hui Chiu	Concurrent Error Detection in Shifted Dual Basis Multiplier over GF(2m) Using Cyclic Code Approach.	AINA Workshops	2010	DBLP DOI BibTeX RDF	finite field, concurrent error detection, dual basis
2	Flavius Opritoiu, Mircea Vladutiu, Mihai Udrescu, Lucian Prodan	Concurrent Error Detection for Multiplicative Inversion of Advanced Encryption Standard.	CIT	2010	DBLP DOI BibTeX RDF	Galois Field Inversion, Built-In Self Test, Advanced Encryption Standard, Concurrent Error Detection
2	Lucia Costas-Perez, Juan J. Rodríguez-Andina	Algorithmic Concurrent Error Detection in Complex Digital-Processing Systems.	IEEE Design & Test of Computers	2009	DBLP DOI BibTeX RDF
2	Akashi Satoh, Takeshi Sugawara, Naofumi Homma, Takafumi Aoki	High-Performance Concurrent Error Detection Scheme for AES Hardware.	CHES	2008	DBLP DOI BibTeX RDF
2	Ramtilak Vemu, Abhijit Jas, Jacob A. Abraham, Srinivas Patil, Rajesh Galivanche	A low-cost concurrent error detection technique for processor control logic.	DATE	2008	DBLP DOI BibTeX RDF
2	Mihir R. Choudhury, Kartik Mohanram	Approximate logic circuits for low overhead, non-intrusive concurrent error detection.	DATE	2008	DBLP DOI BibTeX RDF
2	Huiju Cheng, Howard M. Heys	Compact ASIC implementation of the ICEBERG block cipher with concurrent error detection.	ISCAS	2008	DBLP DOI BibTeX RDF
2	Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris, Abhijit Jas, Chandra Tirumurti	Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller.	DFT	2008	DBLP DOI BibTeX RDF
2	Andrzej Krasniewski	Concurrent Error Detection for Combinational Logic Blocks Implemented with Embedded Memory Blocks of FPGAs.	DDECS	2008	DBLP DOI BibTeX RDF
2	Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano	Concurrent Error Detection in Reed-Solomon Encoders and Decoders.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
2	Andrzej Krasniewski	Concurrent Error Detection for FSMs Designed for Implementation with Embedded Memory Blocks of FPGAs.	DSD	2007	DBLP DOI BibTeX RDF
2	Richard Stern, Nikhil Joshi, Kaijie Wu, Ramesh Karri	Register Transfer Level Concurrent Error Detection in Elliptic Curve Crypto Implementations.	FDTC	2007	DBLP DOI BibTeX RDF
2	Han Liang, Piyush Mishra, Kaijie Wu	Error Correction On-Demand: A Low Power Register Transfer Level Concurrent Error Correction Technique.	IEEE Trans. Computers	2007	DBLP DOI BibTeX RDF	Concurrent error detection, register-transfer level, single-event upsets, hardware redundancy
2	Kaijie Wu, Ramesh Karri	Algorithm-level recomputing with shifted operands-a register transfer level concurrent error detection technique.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
2	Nikhil Joshi, Kaijie Wu, Jayachandran Sundararajan, Ramesh Karri	Concurrent error detection for involutional functions with applications in fault-tolerant cryptographic hardware design.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
2	Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris	Entropy-driven parity-tree selection for low-overhead concurrent error detection in finite state machines.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
2	Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin	Concurrent Error Detection in a Polynomial Basis Multiplier over GF(2m).	J. Electronic Testing	2006	DBLP DOI BibTeX RDF	cryptography, fault-tolerant computing, fault detection, multiplier, finite fields arithmetic
2	Rui Zhang, Niraj K. Jha	Threshold/majority logic synthesis and concurrent error detection targeting nanoelectronic implementations.	ACM Great Lakes Symposium on VLSI	2006	DBLP DOI BibTeX RDF
2	Sobeeh Almukhaizim, Yiorgos Makris	Berger code-based concurrent error detection in asynchronous burst-mode machines.	DATE	2006	DBLP DOI BibTeX RDF
2	Gian-Carlo Cardarilli, Salvatore Pontarelli, Marco Re, Adelio Salsano	Concurrent error detection in Reed Solomon decoders.	ISCAS	2006	DBLP DOI BibTeX RDF
2	Sumeet Kumar, Aneesh Aggarwal	Reducing resource redundancy for concurrent error detection techniques in high performance microprocessors.	HPCA	2006	DBLP DOI BibTeX RDF
2	Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin	Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m).	J. Electronic Testing	2005	DBLP DOI BibTeX RDF	cryptography, fault-tolerant computing, fault detection, finite fields, multiplier, single stuck-at fault
2	Sobeeh Almukhaizim, Yiorgos Makris	Concurrent Error Detection in Asynchronous Burst-Mode Controllers.	DATE	2005	DBLP DOI BibTeX RDF
2	Andrzej Krasniewski	A Pragmatic Approach to Concurrent Error Detection in Sequential Circuits Implemented Using FPGAs with Embedded Memory.	IOLTS	2005	DBLP DOI BibTeX RDF
2	Yung-Yuan Chen	Concurrent Detection of Control Flow Errors by Hybrid Signature Monitoring.	IEEE Trans. Computers	2005	DBLP DOI BibTeX RDF	error-detection latency, Concurrent error detection, signature scheme, watchdog processor, error-detection coverage
2	Cung Nguyen, G. Robert Redinbo	Fault Tolerance Design in JPEG 2000 Image Compression System.	IEEE Trans. Dependable Sec. Comput.	2005	DBLP DOI BibTeX RDF	Fault-tolerant source coding, JPEG 2000 standard, hardware reliability, weighted sum parity, data compression, Discrete Wavelet Transform (DWT), Soft errors, concurrent error detection, Huffman coding, error control codes, algorithm-based fault tolerance, error-checking
2	Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris	Concurrent Error Detection for Combinational and Sequential Logic via Output Compaction.	ISQED	2004	DBLP DOI BibTeX RDF
2	Sobeeh Almukhaizim, Petros Drineas, Yiorgos Makris	On Concurrent Error Detection with Bounded Latency in FSMs.	DATE	2004	DBLP DOI BibTeX RDF
2	Andrzej Krasniewski	Concurrent Error Detection in Sequential Circuits Implemented Using Embedded Memory of LUT-Based FPGAs.	DFT	2004	DBLP DOI BibTeX RDF
2	Andrzej Krasniewski	Concurrent Error Detection in Sequential Circuits Implemented Using FPGAs with Embedded Memory Blocks.	IOLTS	2004	DBLP DOI BibTeX RDF
2	Ramesh Karri, Grigori Kuznetsov, Michael Gössel	Parity-Based Concurrent Error Detection in Symmetric Block Ciphers.	ITC	2003	DBLP DOI BibTeX RDF
2	Haralampos-G. D. Stratigopoulos, Yiorgos Makris	Concurrent Error Detection in Linear Analog Circuits Using State Estimation.	ITC	2003	DBLP DOI BibTeX RDF
2	Ramesh Karri, Grigori Kuznetsov, Michael Gössel	Parity-Based Concurrent Error Detection of Substitution-Permutation Network Block Ciphers.	CHES	2003	DBLP DOI BibTeX RDF
2	Petros Drineas, Yiorgos Makris	Non-Intrusive Concurrent Error Detection in FSMs through State/Output Compaction and Monitoring via Parity Trees.	DATE	2003	DBLP DOI BibTeX RDF
2	Christoforos N. Hadjicostis	Encoded finite-state machines for non-concurrent error detection and identification.	ISCAS	2003	DBLP DOI BibTeX RDF
2	Konstantinos Rokas, Yiorgos Makris, Dimitris Gizopoulos	Low Cost Convolutional Code Based Concurrent Error Detection in FSMs.	DFT	2003	DBLP DOI BibTeX RDF
2	Ramesh Karri, Kaijie Wu, Piyush Mishra, Yongkook Kim	Concurrent error detection schemes for fault-based side-channel cryptanalysis of symmetric block ciphers.	IEEE Trans. on CAD of Integrated Circuits and Systems	2002	DBLP DOI BibTeX RDF
2	Ramesh Karri, Kaijie Wu	Algorithm level re-computing using implementation diversity: a register transfer level concurrent error detection technique.	IEEE Trans. VLSI Syst.	2002	DBLP DOI BibTeX RDF
2	Kartik Mohanram, C. V. Krishna, Nur A. Touba	A methodology for automated insertion of concurrent error detection hardware in synthesizable Verilog RTL.	ISCAS	2002	DBLP DOI BibTeX RDF
2	Thomas Verdel, Yiorgos Makris	Duplication-Based Concurrent Error Detection in Asynchronous Circuits: Shortcomings and Remedies. (PDF / PS)	DFT	2002	DBLP DOI BibTeX RDF
2	Subhasish Mitra, Edward J. McCluskey	Design Diversity for Concurrent Error Detection in Sequential Logic Circuts.	VTS	2001	DBLP DOI BibTeX RDF
2	Kaijie Wu, Ramesh Karri	Idle Cycles Based Concurrent Error Detection of RC6 Encryption. (PDF / PS)	DFT	2001	DBLP DOI BibTeX RDF
2	Ramesh Karri, Balakrishnan Iyer	Introspection: A register transfer level technique for cocurrent error detection and diagnosis in data dominated designs.	ACM Trans. Design Autom. Electr. Syst.	2001	DBLP DOI BibTeX RDF	Concurrent error detection, register transfer level, on line testing
2	Wei-Je Huang, Subhasish Mitra, Edward J. McCluskey	Fast Run-Time Fault Location in Dependable FPGA-Based Applications. (PDF / PS)	DFT	2001	DBLP DOI BibTeX RDF	Run-time fault location, Field-Programmable Gate Array (FPGA), concurrent error detection, on-line testing
2	Bina Ramamurthy, Shambhu J. Upadhyaya, Bharat K. Bhargava	Design and Analysis of an Integrated Checkpointing Recovery Scheme for Distributed Applications.	IEEE Trans. Knowl. Data Eng.	2000	DBLP DOI BibTeX RDF	distributed systems, Checkpointing, concurrent error detection, rollback recovery, message logging
2	Vincenzo Piuri, Earl E. Swartzlander Jr.	Time-Shared Modular Redundancy for Fault-Tolerant FFT Processors. (PDF / PS)	DFT	1999	DBLP DOI BibTeX RDF	Time-Shared Modular Redundancy, FFT, Concurrent Error Detection, On-Line Testing, Concurrent Error Correction
2	Anna Antola, Vincenzo Piuri, Mariagiovanna Sami	A Low-Redundancy Approach to Semi-Concurrent Error Detection in Data Paths.	DATE	1998	DBLP DOI BibTeX RDF	Semi-concurrent error detection, Fault tolerance, High-level synthesis, Data Flow Graphs, Self-checking circuits
2	Anna Antola, Vincenzo Piuri, Mariagiovanna Sami	High-level Synthesis of Data Paths with Concurrent Error Detection. (PDF / PS)	DFT	1998	DBLP DOI BibTeX RDF	self-checking systems, high-level synthesis, concurrent error detection, data path
2	A. Maamar, G. Russell	A 32-Bit Risc Processor with Concurrent Error Detection.	EUROMICRO	1998	DBLP DOI BibTeX RDF
2	Abhijit Chatterjee, Rabindra K. Roy	Concurrent Error Detection in Nonlinear Digital Circuits Using Time-Freeze Linearization.	IEEE Trans. Computers	1997	DBLP DOI BibTeX RDF	checksum codes, nonlinear digital filters, state variable systems, Concurrent error detection, self-healing systems
2	Nur A. Touba, Edward J. McCluskey	Logic synthesis of multilevel circuits with concurrent error detection.	IEEE Trans. on CAD of Integrated Circuits and Systems	1997	DBLP DOI BibTeX RDF
2	Shalini Yajnik, Niraj K. Jha	Graceful Degradation in Algorithm-Based Fault Tolerant Multiprocessor Systems.	IEEE Trans. Parallel Distrib. Syst.	1997	DBLP DOI BibTeX RDF	concurrent fault location, fault diagnosis, concurrent error detection, transient faults, graceful degradation, Algorithm-based fault tolerance
2	Yoon-Hwa Choi, Pong-Gyou Lee	Concurrent Error Detection and Fault Location in a Fast ATM Switch.	Asian Test Symposium	1996	DBLP DOI BibTeX RDF
2	João Carlos Cunha, João Gabriel Silva	DELFIM: Error Detection by Thin Memory Protection.	EUROMICRO	1996	DBLP DOI BibTeX RDF	thin memory protection, VME standard board, detection capability, DELFIM, error detection, error detection, concurrent error detection, error recovery, fault tolerant system
2	Choong Gun Oh, Hee Yong Youn, Vijay K. Raj	An Efficient Algorithm-Based Concurrent Error Detection for FFT Networks.	IEEE Trans. Computers	1995	DBLP DOI BibTeX RDF	checksum scheme, multidimensional FFT network, VLSI, fast Fourier transform, fault coverage, concurrent error detection, Algorithm-based fault tolerance
2	Chin-Long Wey, Shoba Krishnan, Sondes Sahli	Test generation and concurrent error detection in current-mode A/D converters.	IEEE Trans. on CAD of Integrated Circuits and Systems	1995	DBLP DOI BibTeX RDF
2	Michael Ogbonna Esonu, Asim J. Al-Khalili, Salim Hariri	Area efficient computing structures for concurrent error detection in systolic arrays.	VLSI Signal Processing	1995	DBLP DOI BibTeX RDF
2	Bapiraju Vinnakota, Niraj K. Jha	Design of Algorithm-Based Fault-Tolerant Multiprocessor Systems for Concurrent Error Detection and Fault Diagnosis.	IEEE Trans. Parallel Distrib. Syst.	1994	DBLP DOI BibTeX RDF	fault-tolerant multiprocessor systems, algorithm-basedmultiprocessor systems, algorithm-based faulttolerance, low-overhead system-level error detection, fault location scheme, ABFTsystems, design procedure, data element sharing, ABFT system design, reliability, fault diagnosis, fault tolerant computing, multiprocessing systems, fault location, system recovery, concurrent error detection, parallelarchitectures
2	Jamel M. Tahir, Satnam Singh Dlay, Raouf N. Gorgui-Naguib, Oliver R. Hinton	Concurrent Error Detection in Fast FNT Networks.	EDCC	1994	DBLP DOI BibTeX RDF	Fermat number transform, fault-tolerance, VLSI, digital signal processing, Array processor
2	Nur A. Touba, Edward J. McCluskey	Logic synthesis techniques for reduced area implementation of multilevel circuits with concurrent error detection.	ICCAD	1994	DBLP DOI BibTeX RDF
2	A. Chatterjee	Concurrent error detection and fault-tolerance in linear analog circuits using continuous checksums.	IEEE Trans. VLSI Syst.	1993	DBLP DOI BibTeX RDF
2	Sy-Yen Kuo, Sheng-Chiech Liang	Concurrent Error Detection and Correction in Real-Time Systolic Sorting Arrays.	IEEE Trans. Computers	1992	DBLP DOI BibTeX RDF	online error correction, two level pipelining, real-time systolic sorting arrays, online error detection, VLSI sorting arrays, functional errors, data errors, real-time systems, parallel algorithms, VLSI, sorting, error correction codes, systolic arrays, error detection codes, concurrent error detection, high-throughput, self-checking, WSI, concurrent error correction
2	Lawrence P. Holmquist, Larry L. Kinney	Concurrent Error Detection in Sequential Circuits Using Convolutional Codes.	AAECC	1991	DBLP DOI BibTeX RDF
2	Douglas M. Blough, Gerald M. Masson	Performance Analysis of a Generalized Concurrent Error Detection Procedure.	IEEE Trans. Computers	1990	DBLP DOI BibTeX RDF	generalized concurrent error detection procedure, data block capture, analysis monitoring process, external fault sources, fault mechanisms, performance evaluation, fault tolerant computing, error detection
2	Chung-Chi Jim Li, Paul Peichuan Chen, W. Kent Fuchs	Local Concurrent Error Detection and Dorrection in Data Structures Using Virtual Backpointers.	IEEE Trans. Computers	1989	DBLP DOI BibTeX RDF	virtual backpointers, linked data structures, virtual double-linked list, B-tree with virtual backpointers, multiple error conditions, local concurrent error detection, double errors, fixed-size checking window, single errors, fault tolerance, performance, data structures, data structures, fault tolerant computing, error detection, error correction, error correction, constant time, time overhead
2	Janak H. Patel, Leona Y. Fung	Concurrent Error Detection in Multiply and Divide Arrays.	IEEE Trans. Computers	1983	DBLP DOI BibTeX RDF	RESO, multipliers, concurrent error detection, dividers, Cellular logic
1	Takeshi Sugawara, Naofumi Homma, Takafumi Aoki, Akashi Satoh	High-Performance Architecture for Concurrent Error Detection for AES Processors.	IEICE Transactions	2011	DBLP BibTeX RDF
1	Chris J. Bleakley, Pedro Reviriego, Juan Antonio Maestro	Low-complexity Concurrent Error Detection for convolution with Fast Fourier Transforms.	Microelectronics Reliability	2011	DBLP DOI BibTeX RDF
1	Himanshu Thapliyal, Nagarajan Ranganathan	Reversible Logic Based Concurrent Error Detection Methodology For Emerging Nanocircuits	CoRR	2011	DBLP BibTeX RDF
1	Michail Maniatakos, Yiorgos Makris, Prabhakar Kudva, Bruce M. Fleischer	Exponent monitoring for low-cost concurrent error detection in FPU control logic.	VTS	2011	DBLP DOI BibTeX RDF
1	Naveed Imran, Ronald F. DeMara	Heterogeneous Concurrent Error Detection (hCED) Based on Output Anticipation.	ReConFig	2011	DBLP DOI BibTeX RDF
1	Faramarz Khosravi, Hamed Farbeh, Mahdi Fazeli, Seyed Ghassem Miremadi	Low Cost Concurrent Error Detection for On-Chip Memory Based Embedded Processors.	EUC	2011	DBLP DOI BibTeX RDF
1	Yu Liu, Kaijie Wu	Runtime adaptable concurrent error detection for linear digital systems.	ICCD	2011	DBLP DOI BibTeX RDF
1	Grzegorz Borowik, Andrzej Krasniewski	A Tool for Trading-Off On-Line Error Detection Efficiency with Implementation Cost for Sequential Logic Implemented in FPGAs.	ICSEng	2011	DBLP DOI BibTeX RDF	embedded memory block, FPGA, dependability, sequential circuit, concurrent error detection, transient fault
1	Michail Maniatakos, Naghmeh Karimi, Chandra Tirumurti, Abhijit Jas, Yiorgos Makris	Instruction-Level Impact Analysis of Low-Level Faults in a Modern Microprocessor Controller.	IEEE Trans. Computers	2011	DBLP DOI BibTeX RDF	instruction-level error, microprocessor controller, Fault simulation, concurrent error detection
1	Chiou-Yng Lee, Pramod Kumar Meher, Jagdish Chandra Patra	Concurrent Error Detection in Bit-Serial Normal Basis Multiplication Over GF(2m) Using Multiple Parity Prediction Schemes.	IEEE Trans. VLSI Syst.	2010	DBLP DOI BibTeX RDF
1	Chiou-Yng Lee, Che Wun Chiou, Jim-Min Lin	Concurrent Error Detection in Multiplexer-Based Multipliers for Normal Basis of GF(2m) Using Double Parity Prediction Scheme.	Signal Processing Systems	2010	DBLP DOI BibTeX RDF
1	Osnat Keren	One-to-Many: Context-Oriented Code for Concurrent Error Detection.	J. Electronic Testing	2010	DBLP BibTeX RDF
1	Zhen Wang, Mark G. Karpovsky, Konrad J. Kulikowski	Design of Memories with Concurrent Error Detection and Correction by Nonlinear SEC-DED Codes.	J. Electronic Testing	2010	DBLP DOI BibTeX RDF
1	Chiou-Yng Lee	Concurrent error detection architectures for Gaussian normal basis multiplication over GF(2m).	Integration	2010	DBLP DOI BibTeX RDF
1	Zhen Wang, Xiaozhe Wang, Shuqin Fan	Concurrent Error Detection Architectures for Field Multiplication Using Gaussian Normal Basis.	ISPEC	2010	DBLP DOI BibTeX RDF
1	Chiou-Yng Lee	Concurrent Error Detection in Systolic Array AB^2 Multiplier Using Linear Codes.	CASoN	2010	DBLP DOI BibTeX RDF
1	Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu	Reconfigurable Concurrent Error Detection adaptive to dynamicity of power constraints.	European Test Symposium	2010	DBLP DOI BibTeX RDF
1	K. Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	Evaluation of concurrent error detection techniques on the Advanced Encryption Standard.	European Test Symposium	2010	DBLP DOI BibTeX RDF
1	Chang N. Zhang, Qian Yu, Xiao Wei Liu	An Algorithm Based Concurrent Error Detection Scheme for AES.	CANS	2010	DBLP DOI BibTeX RDF
1	Jeyavijayan Rajendran, Hetal Borad, Shyam Mantravadi, Ramesh Karri	SLICED: Slide-based Concurrent Error Detection Technique for Symmetric Block Ciphers.	HOST	2010	DBLP DOI BibTeX RDF
1	Sobeeh Almukhaizim, Sara Bunian, Ozgur Sinanoglu	Reconfigurable low-power Concurrent Error Detection in logic circuits.	IOLTS	2010	DBLP DOI BibTeX RDF
1	K. Bousselam, Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre	Evaluation of concurrent error detection techniques on the advanced encryption standard.	IOLTS	2010	DBLP DOI BibTeX RDF