Search results for "control speculation"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Haibo Chen, Liwei Yuan, Xi Wu, Binyu Zang, Bo Huang 0002, Pen-Chung Yew	Control flow obfuscation with information flow tracking.	MICRO	2009	DBLP DOI BibTeX RDF	control flow obfuscation, opaque predicate, information flow tracking, control speculation
2	Juan L. Aragón, José M. González, Antonio González	Control Speculation for Energy-Efficient Next-Generation Superscalar Processors.	IEEE Trans. Computers	2006	DBLP DOI BibTeX RDF	low-power design, processor architecture, energy-aware systems, Control speculation
2	Xianfeng Li, Tulika Mitra, Abhik Roychoudhury	Modeling Control Speculation for Timing Analysis.	Real-Time Systems	2005	DBLP DOI BibTeX RDF	micro-architectural modeling, worst case execution time, branch prediction, schedulability analysis, instruction cache
2	Hideyuki Miura, Luong Dinh Hung, Chitaka Iwama, Daisuke Tashiro, Niko Demus Barli, Shuichi Sakai, Hidehiko Tanaka	Compiler-Assisted Thread Level Control Speculation.	Euro-Par	2003	DBLP DOI BibTeX RDF
1	Jurij Silc, Theo Ungerer, Borut Robic	Dynamic branch prediction and control speculation.	IJHPSA	2007	DBLP DOI BibTeX RDF
1	Arun Kejariwal, Xinmin Tian, Milind Girkar, Wei Li 0015, Sergey Kozhukhov, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	Tight analysis of the performance potential of thread speculation using spec CPU 2006.	PPOPP	2007	DBLP DOI BibTeX RDF	conflict probability, misspeculation penalty, threading overhead, performance evaluation, speculative execution
1	Efe Yardimci, Michael Franz	Dynamic parallelization and mapping of binary executables on hierarchical platforms.	Conf. Computing Frontiers	2006	DBLP DOI BibTeX RDF	dynamic parallelization, continuous optimization
1	Arun Kejariwal, Xinmin Tian, Wei Li 0015, Milind Girkar, Sergey Kozhukhov, Hideki Saito, Utpal Banerjee, Alexandru Nicolau, Alexander V. Veidenbaum, Constantine D. Polychronopoulos	On the performance potential of different types of speculative thread-level parallelism: The DL version of this paper includes corrections that were not made available in the printed proceedings.	ICS	2006	DBLP DOI BibTeX RDF	DOALL loops, value dependence, performance evaluation, data dependence, speculative execution, control dependence
1	Zhenghong Wang, Ruby B. Lee	Covert and Side Channels Due to Processor Architecture.	ACSAC	2006	DBLP DOI BibTeX RDF
1	Resit Sendag, Ying Chen, David J. Lilja	The Impact of Incorrectly Speculated Memory Operations in a Multithreaded Architecture.	IEEE Trans. Parallel Distrib. Syst.	2005	DBLP DOI BibTeX RDF	mispredicted loads, wrong execution, wrong execution cache, prefetching, Speculation, multithreaded architecture
1	Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan	A compiler framework for speculative optimizations.	TACO	2004	DBLP DOI BibTeX RDF	speculative SSA form, speculative weak update, partial redundancy elimination, Data speculation, register promotion
1	John W. Sias, Sain-Zee Ueng, Geoff A. Kent, Ian M. Steiner, Erik M. Nystrom, Wen-mei W. Hwu	Field-testing IMPACT EPIC research results in Itanium 2.	ISCA	2004	DBLP DOI BibTeX RDF
1	Deniz Balkan, John Kalamatianos, David R. Kaeli	A Study of Errant Pipeline Flushes Caused by Value Misspeculation.	SBAC-PAD	2004	DBLP DOI BibTeX RDF
1	Juan L. Aragón, José González, Antonio González	Power-Aware Control Speculation through Selective Throttling.	HPCA	2003	DBLP DOI BibTeX RDF
1	Jin Lin, Tong Chen, Wei-Chung Hsu, Pen-Chung Yew, Roy Dz-Ching Ju, Tin-Fook Ngai, Sun Chan	A compiler framework for speculative analysis and optimizations.	PLDI	2003	DBLP DOI BibTeX RDF	speculative SSA form, speculative weak update, partial redundancy elimination, data speculation, register promotion
1	Ying Chen, Resit Sendag, David J. Lilja	Using Incorrect Speculation to Prefetch Data in a Concurrent Multithreaded Processor.	IPDPS	2003	DBLP DOI BibTeX RDF	superthreaded architecture, wrong-thread executioin, wrong-path execution, wrong execution cache (WEC), data prefetch, multithreaded processor
1	Augustus K. Uht	Disjoint Eager Execution: what it is / what it is not.	SIGARCH Computer Architecture News	2002	DBLP DOI BibTeX RDF	eager execution, high-performance computing, microarchitecture, control speculation
1	Iffat H. Kazi, David J. Lilja	Coarse-Grained Thread Pipelining: A Speculative Parallel Execution Model for Shared-Memory Multiprocessors.	IEEE Trans. Parallel Distrib. Syst.	2001	DBLP DOI BibTeX RDF	Runtime parallelization, thread pipelining, superthreaded architecture, shared-memory multiprocessors, speculative execution, coarse-grained parallelization
1	Roy Dz-Ching Ju, Kevin Nomura, Uma Mahadevan, Le-Chun Wu	A Unified Compiler Framework for Control and Data Speculation.	IEEE PACT	2000	DBLP DOI BibTeX RDF
1	Iffat H. Kazi, David J. Lilja	JavaSpMT: A Speculative Thread Pipelining Parallelization Model for Java Programs. (PDF / PS)	IPDPS	2000	DBLP DOI BibTeX RDF	run-time dependence checking, shared-memory multprocessors, Java, multithreading, speculative execution, Parallelization model
1	Venkata Krishnan, Josep Torrellas	A Chip-Multiprocessor Architecture with Speculative Multithreading.	IEEE Trans. Computers	1999	DBLP DOI BibTeX RDF	Chip-multiprocessor, speculative multithreading, data-dependence speculation, control speculation
1	Pedro Marcuello, Jordi Tubella, Antonio González	Value Prediction for Speculative Multithreaded Architectures. (PDF / PS)	MICRO	1999	DBLP DOI BibTeX RDF
1	Jordi Tubella, Antonio González	Control Speculation in Multithreaded Processors through Dynamic Loop Detection.	HPCA	1998	DBLP DOI BibTeX RDF
1	Pedro Marcuello, Antonio González, Jordi Tubella	Speculative Multithreaded Processors.	International Conference on Supercomputing	1998	DBLP DOI BibTeX RDF	multithreaded processors, data speculation, dynamically scheduled processors, data dependence speculation, control speculation
1	David I. August, Daniel A. Connors, Scott A. Mahlke, John W. Sias, Kevin M. Crozier, Ben-Chung Cheng, Patrick R. Eaton, Qudus B. Olaniran, Wen-mei W. Hwu	Integrated Predicated and Speculative Execution in the IMPACT EPIC Architecture.	ISCA	1998	DBLP DOI BibTeX RDF
1	Pedro Marcuello, Antonio González	Data Speculative Multithreaded Architecture.	EUROMICRO	1998	DBLP DOI BibTeX RDF
1	Joan-Manuel Parcerisa, Antonio González	The Latency Hiding Effectiveness of Decoupled Access/Execute Processors.	EUROMICRO	1998	DBLP DOI BibTeX RDF
1	Mikko H. Lipasti, Christopher B. Wilkerson, John Paul Shen	Value Locality and Load Value Prediction.	ASPLOS	1996	DBLP DOI BibTeX RDF