|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 14714 occurrences of 6002 keywords
|
|
|
|
|
Results
Found 14947 publication records. Showing 14947 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 5 | Hans Jochen Scholl |
Profiling the EG Research Community and Its Core.  |
EGOV  |
2009 |
DBLP DOI BibTeX RDF |
Electronic Government Research, EGR, core EGR community, core EGR journals, core EGR conferences, prolific EGR scholars, disciplinary breakdown, multi-disciplinary EGR, EGOV EndNote Reference Library, EGRL |
| 5 | Hiroyuki Yagi, Wolfgang Rosenstiel, Jakob Engblom, Jason Andrews, Kees A. Vissers, Marc Serughetti |
The wild west: conquest of complex hardware-dependent software design.  |
DAC  |
2009 |
DBLP DOI BibTeX RDF |
hardware-dependent software, heterogeneous/homogenous multi-core, symmetric/asymmetric multi-core, virtualization, multiprocessors, multi-core, MPSoC, programming model, virtual prototyping, many-core, ESL, virtual platform |
| 5 | Pawel Gepner, David L. Fraser, Michal Filip Kowalik |
Performance Evolution and Power Benefits of Cluster System Utilizing Quad-Core and Dual-Core Intel Xeon Processors.  |
PPAM  |
2007 |
DBLP DOI BibTeX RDF |
dual-core processors, quad-core processors, parallel processing, benchmarks, HPC, multi-core processors |
| 5 | Jianqi Tang, Binxing Fang, Mingzeng Hu, Hongli Zhang |
A parallel programming interface for out-of-core cluster applications.  |
Cluster Computing  |
2006 |
DBLP DOI BibTeX RDF |
Global out-of-core array, Local array file, In-core data, Cluster of workstations, Out-of-core computation |
| 4 | Aparna Mandke Dani, Keshavan Varadarajan, Bharadwaj Amrutur, Y. N. Srikant |
Accelerating multi-core simulators.  |
SAC  |
2010 |
DBLP DOI BibTeX RDF |
chip multi-core, multi-core platform, timed petri-nets, instruction set simulator, cache simulator |
| 4 | Colin J. Ihrig, Rami G. Melhem, Alex K. Jones |
Automated modeling and emulation of interconnect designs for many-core chip multiprocessors.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
simulation, interconnection network, emulation, multi-core, many-core |
| 4 | Jih-Ching Chiu, Yu-Liang Chou, Ding-Siang Su |
A hyperscalar multi-core architecture.  |
Conf. Computing Frontiers  |
2010 |
DBLP DOI BibTeX RDF |
cmps, dynamic multi-core chips, reconfigurable multi-core architectures, chip multiprocessors |
| 4 | Ping Lai, Pavan Balaji, Rajeev Thakur, Dhabaleswar K. Panda |
ProOnE: a general-purpose protocol onload engine for multi- and many-core architectures.  |
Computer Science - R&D  |
2009 |
DBLP DOI BibTeX RDF |
Protocol offload/onload, Multi-core, Many-core |
| 4 | Mercedes Marqués, Gregorio Quintana-Ortí, Enrique S. Quintana-Ortí, Robert A. van de Geijn |
Out-of-Core Computation of the QR Factorization on Multi-core Processors.  |
Euro-Par  |
2009 |
DBLP DOI BibTeX RDF |
high performance, multi-core processors, QR factorization, out-of-core computation, Dense linear algebra |
| 4 | Balasubramanian Sivan, S. Harini, C. Pandu Rangan |
Core and Conditional Core Path of Specified Length in Special Classes of Graphs.  |
WALCOM  |
2009 |
DBLP DOI BibTeX RDF |
Core path, Conditional core path, Bipartite permutation graphs, Threshold graphs, Proper Interval graphs |
| 4 | Pawel Gepner, David L. Fraser, Michal Filip Kowalik |
Second Generation Quad-Core Intel Xeon Processors Bring 45 nm Technology and a New Level of Performance to HPC Applications.  |
ICCS  |
2008 |
DBLP DOI BibTeX RDF |
quad-core processors, parallel processing, benchmarks, HPC, multi-core processors |
| 4 | Sandeep K. S. Gupta, Pradip K. Srimani |
Adaptive Core Selection and Migration Method for Multicast Routing in Mobile Ad Hoc Networks.  |
IEEE Trans. Parallel Distrib. Syst.  |
2003 |
DBLP DOI BibTeX RDF |
mobile multihop network, core selection, core migration, random graph generation, Mobile ad hoc network, online algorithm, multicast routing, adaptive protocol |
| 4 | Takashi Matsuhisa |
Core Equivalence in Economy for Modal Logic.  |
International Conference on Computational Science  |
2003 |
DBLP DOI BibTeX RDF |
Pure exchange economy under reflexive information structure, Ex-post core, Rational expectations equilibrium, Core equivalence theorem, Journal of Economic Literature Classification: D51, D84, D52, C72, Multi-modal logic |
| 4 | Erik Jan Marinissen, Rohit Kapur, Maurice Lousberg, Teresa L. McLaurin, Mike Ricchetti, Yervant Zorian |
On IEEE P1500's Standard for Embedded Core Test.  |
J. Electronic Testing  |
2002 |
DBLP DOI BibTeX RDF |
core test wrapper, core test language, compliance levels, standardization, embedded cores |
| 4 | Yuan Gao, Ye Ge, Jennifer C. Hou |
RMCM: Reliable Multicasts for Core-based Multicast Trees. (PDF / PS)  |
ICNP  |
2000 |
DBLP DOI BibTeX RDF |
core-based multicast trees, RMCM, multicast applications, on-tree router, core-based tree, retransmission request, optimal recovery, turning point approach, IP options, group membership changes, repliers, delayed ACK approach, repair-based reliable multicast, NAK implosion control, recovery latency, recovery isolation, FreeBSD 2.2.8, Internet, Internet, transport protocols, packet switching, network topology, digital simulation, trees (mathematics), telecommunication network routing, multicast communication, reliable multicasts, event-driven simulation, topology changes, local recovery, data packets, hosts |
| 4 | Frédéric Pétrot, Denis Hommais, Alain Greiner |
Cycle precise core based hardware/software system simulation with predictable event propagation.  |
EUROMICRO  |
1997 |
DBLP DOI BibTeX RDF |
hardware software system simulation, predictable event propagation, cycle precise core based system simulator, digital embedded systems, Mealy signals, combinational signals, MIPS R3000, microprocessor core, PI-Bus, Pentium 120, communication, graph, C, high level synthesis, memories, directed graph, FSM, topological sort, compile-time, communicating finite state machines |
| 4 | Michael J. Lewis, Andrew S. Grimshaw |
The Core Legion Object Model. (PDF / PS)  |
HPDC  |
1996 |
DBLP DOI BibTeX RDF |
core Legion object model, building system services, secure shared object, shared name spaces, application adjustable fault tolerance, wide area assemblies, workstation based parallel processing tools, parallel supercomputers, wide area parallel processing, single global name space, Legion object model, core objects, flexible extensible implementation, site autonomy, fault tolerance, reliability, interoperability, fault tolerant computing, virtual machines, virtual machine, parallel machines, wide area networks, workstations |
| 3 | Teng Ma, George Bosilca, Aurelien Bouteiller, Brice Goglin, Jeffrey M. Squyres, Jack J. Dongarra |
Kernel Assisted Collective Intra-node MPI Communication among Multi-Core and Many-Core CPUs.  |
ICPP  |
2011 |
DBLP DOI BibTeX RDF |
MPI, shared memory, multi-core, kernel, collective communication, many-core, NUMA |
| 3 | Mikiko Sato, Yuji Sato, Mitaro Namiki |
Proposal of a multi-core processor architecture for effective evolutionary computation.  |
GECCO  |
2010 |
DBLP DOI BibTeX RDF |
genegic algorithms, parallel computing, evolutionary computation, multi-core processor |
| 3 | Jin Zhou, Brian Demsky |
Bamboo: a data-centric, object-oriented approach to many-core software.  |
PLDI  |
2010 |
DBLP DOI BibTeX RDF |
data-centric languages, many-core programming |
| 3 | Dan Gibson, David A. Wood |
Forwardflow: a scalable core for power-constrained CMPs.  |
ISCA  |
2010 |
DBLP DOI BibTeX RDF |
scalable core, chip multiprocessor (cmp), power |
| 3 | Rico Richter, Jürgen Döllner |
Out-of-core real-time visualization of massive 3D point clouds.  |
Afrigraph  |
2010 |
DBLP DOI BibTeX RDF |
3D point clouds, LiDAR, point-based rendering, out-of-core visualization |
| 3 | Jungseob Lee, Chi-Chao Wang, Hamid Reza Ghasemi, Lloyd Bircher, Yu Cao, Nam Sung Kim |
Workload-adaptive process tuning strategy for power-efficient multi-core processors.  |
ISLPED  |
2010 |
DBLP DOI BibTeX RDF |
process parameter tuning, DVFS, multi-core processor |
| 3 | Jin Shi, Yici Cai |
Scaling power/ground solvers on multi-core with memory bandwidth awareness.  |
ACM Great Lakes Symposium on VLSI  |
2010 |
DBLP DOI BibTeX RDF |
power/ground solver, multi-core |
| 3 | António Rodrigues, Nuno Roma, Leonel Sousa |
p264: open platform for designing parallel H.264/AVC video encoders on multi-core systems.  |
NOSSDAV  |
2010 |
DBLP DOI BibTeX RDF |
h.264, parallel systems, multi-core processors, video encoder |
| 3 | Brad Nemanich, Daniel E. Cooke, J. Nelson Rushton |
SequenceL: transparency and multi-core parallelisms.  |
DAMP  |
2010 |
DBLP DOI BibTeX RDF |
computational laws, sequencel, multi-core, transparency |
| 3 | Dean Truong, Bevan M. Baas |
Circuit modeling for practical many-core architecture design exploration.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
dynamic frequency and voltage scaling, control, many-core |
| 3 | Renan Alves Fonseca, Luigi Dilillo, Alberto Bosio, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Nabil Badereddine |
A statistical simulation method for reliability analysis of SRAM core-cells.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
SRAM core-cell, Monte-Carlo, reliability analysis |
| 3 | Michael A. Kochte, Marcel Schaal, Hans-Joachim Wunderlich, Christian G. Zoellin |
Efficient fault simulation on many-core processors.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
PPSFP, parallel fault simulation, many-core processors |
| 3 | Jishen Zhao, Xiangyu Dong, Yuan Xie |
Cost-aware three-dimensional (3D) many-core multiprocessor design.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
3D IC design, many-core processor design, cost modeling |
| 3 | José L. Abellán, Juan Fernández, Manuel E. Acacio |
Efficient and scalable barrier synchronization for many-core CMPs.  |
Conf. Computing Frontiers  |
2010 |
DBLP DOI BibTeX RDF |
g-line-based barrier synchronization, global interconnection lines, many-core cmps, s-csma technique |
| 3 | Graham Schelle, Jamison D. Collins, Ethan Schuchman, Perry H. Wang, Xiang Zou, Gautham N. Chinya, Ralf Plate, Thorsten Mattner, Franz Olbrich, Per Hammarlund, Ronak Singhal, Jim Brayton, Sebastian Steibl, Hong Wang 0003 |
Intel nehalem processor core made FPGA synthesizable.  |
FPGA  |
2010 |
DBLP DOI BibTeX RDF |
intel nehalem, synthesizable core, fpga, emulator |
| 3 | JongSoo Park, William J. Dally |
Buffer-space efficient and deadlock-free scheduling of stream applications on multi-core architectures.  |
SPAA  |
2010 |
DBLP DOI BibTeX RDF |
compiler and tools for concurrent programming, green computing and power-efficient architectures, multi-core architectures, stream programming |
| 3 | Jungwoo Ha, Stephen P. Crago |
Opportunities for concurrent dynamic analysis with explicit inter-core communication.  |
PASTE  |
2010 |
DBLP DOI BibTeX RDF |
inter-core communication, concurrency, dynamic analysis, instrumentation |
| 3 | John Robert Wernsing, Greg Stitt |
Elastic computing: a framework for transparent, portable, and adaptive multi-core heterogeneous computing.  |
LCTES  |
2010 |
DBLP DOI BibTeX RDF |
elastic computing, fpga, multi-core, speedup, heterogeneous architectures |
| 3 | Joel C. Adams, Daniel J. Ernst, Thomas Murphy, Ariel Ortiz |
Multicore education: pieces of the parallel puzzle.  |
SIGCSE  |
2010 |
DBLP DOI BibTeX RDF |
parallel, concurrency, training, programming, curriculum, languages, multi-core, workshops, many-core, faculty |
| 3 | Yijian Huang, Haibo Chen, Binyu Zang |
Optimizing crash dump in virtualized environments.  |
VEE  |
2010 |
DBLP DOI BibTeX RDF |
core dump, parallel core dump, virtual machines |
| 3 | Yi-Neng Lin, Ying-Dar Lin, Kuo-Kun Tseng, Yuan-Cheng Lai |
Modeling and analysis of core-centric network processors.  |
ACM Trans. Embedded Comput. Syst.  |
2009 |
DBLP DOI BibTeX RDF |
core-centric, simulation, modeling, embedded system, Network processor |
| 3 | Hee-Kap Ahn, Sang Won Bae, Siu-Wing Cheng, Kyung-Yong Chwa |
Casting an Object with a Core.  |
Algorithmica  |
2009 |
DBLP DOI BibTeX RDF |
Manufacturing, Core, Casting, Discrete algorithms |
| 3 | Qiang Xu, Yubin Zhang, Krishnendu Chakrabarty |
SOC test-architecture optimization for the testing of embedded cores and signal-integrity faults on core-external interconnects.  |
ACM Trans. Design Autom. Electr. Syst.  |
2009 |
DBLP DOI BibTeX RDF |
Core-based system-on-chip, test scheduling, test-access mechanism (TAM), interconnect testing |
| 3 | Meikang Qiu, Meiqin Liu, Hao Li, Hung-Chung Huang, Wenyuan Li, Jiande Wu |
Energy-Aware Loop Scheduling and Assignment for Multi-Core, Multi-Functional-Unit Architecture.  |
Signal Processing Systems  |
2009 |
DBLP DOI BibTeX RDF |
Optimization, Real-time, Multi-core, Assignment, Loop scheduling |
| 3 | Wenlong Li, Xiaofeng Tong, Tao Wang, Yimin Zhang, Yen-Kuang Chen |
Parallelization Strategies and Performance Analysis of Media Mining Applications on Multi-Core Processors.  |
Signal Processing Systems  |
2009 |
DBLP DOI BibTeX RDF |
Media mining, Performance analysis, Parallelization, Multi-core processor |
| 3 | Hui Liu, Zili Shao, Meng Wang, Junzhao Du, Chun Jason Xue, Zhiping Jia |
Combining Coarse-Grained Software Pipelining with DVS for Scheduling Real-Time Periodic Dependent Tasks on Multi-Core Embedded Systems.  |
Signal Processing Systems  |
2009 |
DBLP DOI BibTeX RDF |
Periodic dependent tasks, Scheduling, Multimedia, Real-time, Dynamic voltage scaling (DVS), Multi-core, Software pipelining, Retiming |
| 3 | Kazuteru Namba, Yoshikazu Matsui, Hideo Ito |
Test Compression for IP Core Testing with Reconfigurable Network and Fixing-Flipping Coding.  |
J. Electronic Testing  |
2009 |
DBLP DOI BibTeX RDF |
IP core testing, Fixing-flipping coding, Fixing-shifting-flipping coding, Test compression, Reconfigurable network |
| 3 | Ashley M. DeFlumere, Sadaf R. Alam |
Exploring multi-core limitations through comparison of contemporary systems.  |
Richard Tapia Celebration of Diversity in Computing Conference  |
2009 |
DBLP DOI BibTeX RDF |
performance evaluation and analysis, benchmarking, multi-core processor |
| 3 | Roberto Giorgi, Zdravko Popovic, Nikola Puzovic |
Implementing Fine/Medium Grained TLP Support in a Many-Core Architecture.  |
SAMOS  |
2009 |
DBLP DOI BibTeX RDF |
DTA, many-core architectures |
| 3 | Guoping Long, Dongrui Fan, Junchao Zhang |
Characterizing and Understanding the Bandwidth Behavior of Workloads on Multi-core Processors.  |
Euro-Par  |
2009 |
DBLP DOI BibTeX RDF |
phase model, memory bandwidth, multi-core architecture |
| 3 | Carlos Madriles, Pedro López, Josep M. Codina, Enric Gibert, Fernando Latorre, Alejandro Martínez, Raúl Martínez, Antonio González |
Boosting single-thread performance in multi-core systems through fine-grain multi-threading.  |
ISCA  |
2009 |
DBLP DOI BibTeX RDF |
core-fusion, single-thread performance, multicore, automatic parallelization, thread-level parallelism, speculative multithreading |
| 3 | Michael D. Powell, Arijit Biswas, Shantanu Gupta, Shubhendu S. Mukherjee |
Architectural core salvaging in a multi-core processor for hard-error tolerance.  |
ISCA  |
2009 |
DBLP DOI BibTeX RDF |
core salvaging, hard errors, reliability, redundancy |
| 3 | Yuejian Xie, Gabriel H. Loh |
PIPP: promotion/insertion pseudo-partitioning of multi-core shared caches.  |
ISCA  |
2009 |
DBLP DOI BibTeX RDF |
cache, multi-core, sharing, contention, insertion, promotion |
| 3 | Krishna K. Rangan, Gu-Yeon Wei, David Brooks |
Thread motion: fine-grained power management for multi-core systems.  |
ISCA  |
2009 |
DBLP DOI BibTeX RDF |
multi-core power management, thread motion, dvfs |
| 3 | John C. Linford, John Michalakes, Manish Vachharajani, Adrian Sandu |
Multi-core acceleration of chemical kinetics for simulation and prediction.  |
SC  |
2009 |
DBLP DOI BibTeX RDF |
chemical kinetics, kinetic preprocessor, open-MP, multi-core, cell broadband engine, NVIDIA CUDA, atmospheric modeling |
| 3 | Meng-Huan Wu, Cheng-Yang Fu, Peng-Chih Wang, Ren-Song Tsay |
An effective synchronization approach for fast and accurate multi-core instruction-set simulation.  |
EMSOFT  |
2009 |
DBLP DOI BibTeX RDF |
synchronization, multi-core, binary translation, instruction-set simulator |
| 3 | Chang-Burm Cho, Wangyuan Zhang, Tao Li |
Thermal Design Space Exploration of 3D Die Stacked Multi-core Processors Using Geospatial-Based Predictive Models.  |
SPEC Benchmark Workshop  |
2009 |
DBLP DOI BibTeX RDF |
Thermal/power characterization, 3D die stacking, analytical modeling, multi-core architecture |
| 3 | Jungseob Lee, Nam Sung Kim |
Optimizing total power of many-core processors considering voltage scaling limit and process variations.  |
ISLPED  |
2009 |
DBLP DOI BibTeX RDF |
voltage and frequency scaling, process variations, parallel applications, many-core processor |
| 3 | Lakshminarasimhan Seshagiri, Masha Sosonkina, Zhao Zhang |
Electronic Structure Calculations and Adaptation Scheme in Multi-core Computing Environments.  |
ICCS  |
2009 |
DBLP DOI BibTeX RDF |
GAMESS, Niagara, NICAN, Adaptation, Multi-Core |
| 3 | Palanichamy Manikandan, Bjørn B. Larsen, Einar J. Aas |
Design of novel CAM core cell structures for an efficient implementation of low power BCAM system.  |
ACM Great Lakes Symposium on VLSI  |
2009 |
DBLP DOI BibTeX RDF |
binary content addressable memory (bcam), core cell, match line scheme, low power |
| 3 | Helena Keinänen |
Local Search Algorithms for Core Checking in Hedonic Coalition Games.  |
ICCCI  |
2009 |
DBLP DOI BibTeX RDF |
multi-agent systems, game theory, core |
| 3 | M. Aater Suleman, Onur Mutlu, Moinuddin K. Qureshi, Yale N. Patt |
Accelerating critical section execution with asymmetric multi-core architectures.  |
ASPLOS  |
2009 |
DBLP DOI BibTeX RDF |
heterogeneous cores, parallel programming, cmp, multi-core, locks, critical sections |
| 3 | Michel Grundstein |
A Generic Core Knowledge Management Process: Locating Crucial Knowledge.  |
WSKS  |
2009 |
DBLP DOI BibTeX RDF |
Crucial Knowledge, GAMETH®, Locating Core KM Process, Interpretative Framework, MGKME, Sensitive process, Activity analysis |
| 3 | Eiman Ebrahimi, Onur Mutlu, Chang Joo Lee, Yale N. Patt |
Coordinated control of multiple prefetchers in multi-core systems.  |
MICRO  |
2009 |
DBLP DOI BibTeX RDF |
prefetching, multi-core, feedback control, memory systems |
| 3 | Shu-Hsuan Chou, Chien-Chih Chen, Chi-Neng Wen, Yi-Chao Chan, Tien-Fu Chen, Chao-Ching Wang, Jinn-Shyan Wang |
No cache-coherence: a single-cycle ring interconnection for multi-core L1-NUCA sharing on 3D chips.  |
DAC  |
2009 |
DBLP DOI BibTeX RDF |
level-1 non-uniform cache architecture, ring interconnection, single-cycle transactions, multi-core, NOC, SOC, arbitration, memory structure |
| 3 | Vinay Hanumaiah, Ravishankar Rao, Sarma B. K. Vrudhula, Karam S. Chatha |
Throughput optimal task allocation under thermal constraints for multi-core processors.  |
DAC  |
2009 |
DBLP DOI BibTeX RDF |
optimal throughput, task allocation, thermal management, multi-core processors, thread migration |
| 3 | Chi-Neng Wen, Shu-Hsuan Chou, Tien-Fu Chen, Alan Peisheng Su |
NUDA: a non-uniform debugging architecture and non-intrusive race detection for many-core.  |
DAC  |
2009 |
DBLP DOI BibTeX RDF |
architecture, debugging, many-core, race detection |
| 3 | Elizabeth Whitaker Lynch, George F. Riley |
Hardware Supported Time Synchronization in Multi-core Architectures.  |
PADS  |
2009 |
DBLP DOI BibTeX RDF |
multi-core synchronization |
| 3 | Ronny Ronen |
Larrabee: a many-core Intel architecture for visual computing.  |
Conf. Computing Frontiers  |
2009 |
DBLP DOI BibTeX RDF |
graphics architecture, many-core computing, parrallel processing, processor arechitecture, software rendering |
| 3 | Ioannis E. Venetis, Guang R. Gao |
Mapping the LU decomposition on a many-core architecture: challenges and solutions.  |
Conf. Computing Frontiers  |
2009 |
DBLP DOI BibTeX RDF |
register tiling, load balancing, multi-core, local memory, LU decomposition |
| 3 | Alexander S. van Amesfoort, Ana Lucia Varbanescu, Henk J. Sips, Rob van Nieuwpoort |
Evaluating multi-core platforms for HPC data-intensive kernels.  |
Conf. Computing Frontiers  |
2009 |
DBLP DOI BibTeX RDF |
data-intensive kernels, memory-bound applications, the cell processor, multi-core processors, gpus |
| 3 | Carsten Trinitis, Tilman Küstner, Josef Weidendorfer, Jasmin Smajic |
Sparse Matrix Operations on Multi-core Architectures.  |
PaCT  |
2009 |
DBLP DOI BibTeX RDF |
Multi-core, performance optimization, sparse matrices, cache optimization, pinning |
| 3 | Thorsten Biermann, Arne Schwabe, Holger Karl |
Creating Butterflies in the Core - A Network Coding Extension for MPLS/RSVP-TE.  |
Networking  |
2009 |
DBLP DOI BibTeX RDF |
RSVP-TE, Network coding, MPLS, Signaling, Core |
| 3 | Giansalvatore Mecca, Paolo Papotti, Salvatore Raunich |
Core schema mappings.  |
SIGMOD Conference  |
2009 |
DBLP DOI BibTeX RDF |
core computation, data exchange, schema mappings |
| 3 | Li Xia, Zhong Cheng, Qu Zeng-Yan |
Multi-round scheduling for divisible loads on the heterogeneous cluster systems of multi-core computers.  |
Int. Conf. Interaction Sciences  |
2009 |
DBLP DOI BibTeX RDF |
heterogeneous cluster systems, multi-core computers, multilevel cache, shared L2 cache, task scheduling, divisible loads, limited memory |
| 3 | Robin Pottathuparambil, Ron Sass |
A parallel/vectorized double-precision exponential core to accelerate computational science applications.  |
FPGA  |
2009 |
DBLP DOI BibTeX RDF |
exponential core, fpga, cordic |
| 3 | Perry H. Wang, Jamison D. Collins, Christopher T. Weaver, Belliappa Kuttanna, Shahram Salamian, Gautham N. Chinya, Ethan Schuchman, Oliver Schilling, Thorsten Doil, Sebastian Steibl, Hong Wang 0003 |
Intel® atomTM processor core made FPGA-synthesizable.  |
FPGA  |
2009 |
DBLP DOI BibTeX RDF |
intel atom, synthesizable core, fpga, emulator |
| 3 | Rob van Nieuwpoort, John W. Romein |
Using many-core hardware to correlate radio astronomy signals.  |
ICS  |
2009 |
DBLP DOI BibTeX RDF |
lofar, correlator, many-core |
| 3 | Junchang Wang, Haipeng Cheng, Bei Hua, Xinan Tang |
Practice of parallelizing network applications on multi-core architectures.  |
ICS  |
2009 |
DBLP DOI BibTeX RDF |
application-level protocol processing, deep content inspection, lock-free data structures, multi-core parallelization, pipelining implementation, tcp/ip protocol processing |
| 3 | Imam Machdi, Toshiyuki Amagasa, Hiroyuki Kitagawa |
Executing parallel TwigStack algorithm on a multi-core system.  |
iiWAS  |
2009 |
DBLP DOI BibTeX RDF |
XML data partition, parallel TwigStack, multi-core system |
| 3 | Bo Wang |
Task Parallel Scheduling over Multi-core System.  |
CloudCom  |
2009 |
DBLP DOI BibTeX RDF |
multi-core, task, parallel scheduling |
| 3 | Jean-Luc Beuchat, Emmanuel López-Trejo, Luis Martínez-Ramos, Shigeo Mitsunari, Francisco Rodríguez-Henríquez |
Multi-core Implementation of the Tate Pairing over Supersingular Elliptic Curves.  |
CANS  |
2009 |
DBLP DOI BibTeX RDF |
supersingular curve, multi-core, Tate pairing, finite field arithmetic, ? T pairing |
| 3 | Xin Huang, KenLi Li, RenFa Li |
A Energy Efficient Scheduling Base on Dynamic Voltage and Frequency Scaling for Multi-core Embedded Real-Time System.  |
ICA3PP  |
2009 |
DBLP DOI BibTeX RDF |
real-time, energy-efficiency, embedded, DVS, multi-core, leakage power, EDF |
| 3 | Mahdi Dashtbozorgi, Mohammad Abdollahi Azgomi |
A scalable multi-core aware software architecture for high-performance network monitoring.  |
SIN  |
2009 |
DBLP DOI BibTeX RDF |
high-performance network monitoring, multi-core aware architecture, scalable architecture |
| 3 | Dong Su, Kewei Lv |
A New Hard-Core Predicate of Paillier's Trapdoor Function.  |
INDOCRYPT  |
2009 |
DBLP DOI BibTeX RDF |
Paillier’s trapdoor function, Hard-core Predicate, Most significant bit |
| 3 | Kun-Ming Yu, Yi-Yan Chang, Jiayi Zhou, Chun-Yuan Huang, Whei-meih Chang, Chun-Yuan Lin, Chuan Yi Tang |
Chemical Compounds with Path Frequency Using Multi-Core Technology.  |
Infoscale  |
2009 |
DBLP DOI BibTeX RDF |
Chemical compound, Multi-Core Processing, Branch-and-Bound, OpenMP, feature space |
| 3 | Yen-Jun Chen, Ching-Hsien Hsu, Kuan-Ching Li, Hsi-Ya Chang, Shuen-Tai Wang |
Power Consumption Optimization of MPI Programs on Multi-core Clusters.  |
Infoscale  |
2009 |
DBLP DOI BibTeX RDF |
MPI, cluster Computing, Power Consumption, multi-core processor |
| 3 | Yen-Lin Huang, Yun-Chung Shen, Ja-Ling Wu |
Scalable computation for spatially scalable video coding using NVIDIA CUDA and multi-core CPU.  |
ACM Multimedia  |
2009 |
DBLP DOI BibTeX RDF |
parallel computing, GPU, multi-core, CUDA, SVC |
| 3 | Tieyun Qian, Qing Li, Bing Liu 0001, Hui Xiong, Jaideep Srivastava, Phillip C.-Y. Sheu |
What's behind topic formation and development: a perspective of community core groups.  |
CIKM  |
2009 |
DBLP DOI BibTeX RDF |
community core group, topic formation and development |
| 3 | Abhik Sarkar, Frank Mueller, Harini Ramaprasad, Sibin Mohan |
Push-assisted migration of real-time tasks in multi-core processors.  |
LCTES  |
2009 |
DBLP DOI BibTeX RDF |
task migration., real-time systems, timing analysis, multi-core architectures |
| 3 | Enrico Gobbetti, Fabio Marton, José Antonio Iglesias Guitián |
A single-pass GPU ray casting framework for interactive out-of-core rendering of massive volumetric datasets.  |
The Visual Computer  |
2008 |
DBLP DOI BibTeX RDF |
Out-of-core rendering, Volume rendering, Ray casting, GPU acceleration |
| 3 | Yi-Neng Lin, Ying-Dar Lin, Yuan-Cheng Lai, Kuo-Kun Tseng |
Modeling and analysis of core-centric network processors.  |
ACM Trans. Embedded Comput. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
core-centric, simulation, modeling, embedded system, Network processor |
| 3 | Larry Seiler, Doug Carmean, Eric Sprangle, Tom Forsyth, Michael Abrash, Pradeep Dubey, Stephen Junkins, Adam Lake, Jeremy Sugerman, Robert Cavin, Roger Espasa, Ed Grochowski, Toni Juan, Pat Hanrahan |
Larrabee: a many-core x86 architecture for visual computing.  |
ACM Trans. Graph.  |
2008 |
DBLP DOI BibTeX RDF |
graphics architecture, many-core computing, realtime graphics, software rendering, throughput computing, visual computing, parallel processing, GPGPU, SIMD |
| 3 | Georg Gottlob, Alan Nash |
Efficient core computation in data exchange.  |
J. ACM  |
2008 |
DBLP DOI BibTeX RDF |
complexity, data integration, constraints, dependencies, data exchange, core, conjunctive queries, query evaluation, tractability, Chase, universal solutions |
| 3 | Justo Puerto, Francisco R. Fernández, Yolanda Hinojosa |
Partially ordered cooperative games: extended core and Shapley value.  |
Annals OR  |
2008 |
DBLP DOI BibTeX RDF |
Partial order, Core, Cooperative games, Shapley value |
| 3 | Erik Larsson, Zebo Peng |
A Reconfigurable Power Conscious Core Wrapper and its Application to System-on-Chip Test Scheduling.  |
J. Electronic Testing  |
2008 |
DBLP DOI BibTeX RDF |
Core wrapper, Test scheduling, Preemption, Power constraint |
| 3 | Fadi N. Sibai |
Evaluating the performance of single and multiple core processors with PCMARK®05 and benchmark analysis.  |
SIGMETRICS Performance Evaluation Review  |
2008 |
DBLP DOI BibTeX RDF |
performance benchmark, single and dual core processors, workload characterization |
| 3 | Roman Gershman, Maya Koifman, Ofer Strichman |
An approach for extracting a small unsatisfiable core.  |
Formal Methods in System Design  |
2008 |
DBLP DOI BibTeX RDF |
Unsatisfiable core, SAT, Resolution |
| 3 | Gregory F. Diamos, Sudhakar Yalamanchili |
Harmony: an execution model and runtime for heterogeneous many core systems.  |
HPDC  |
2008 |
DBLP DOI BibTeX RDF |
scheduling, optimization, heterogeneous, gpgpu, performance monitoring, dependency graph, many core, runtime, harmony |
| 3 | Enric Musoll |
A Thermal-Friendly Load-Balancing Technique for Multi-Core Processors.  |
ISQED  |
2008 |
DBLP DOI BibTeX RDF |
low power, hot spots, power gating, Multi-core architecture |
| 3 | Yue Fu, Jin He, Feng Liu, Jie Feng, Chenyue Ma, Lining Zhang |
Study on the Si-Ge Nanowire MOSFETs with the Core-Shell Structure.  |
ISQED  |
2008 |
DBLP DOI BibTeX RDF |
non-classical device modeling, core-shell, quantum mechanical effect, nanowire |
| 3 | Guoping Long, Dongrui Fan, Junchao Zhang, Fenglong Song, Nan Yuan, Wei Lin |
A Performance Model of Dense Matrix Operations on Many-Core Architectures.  |
Euro-Par  |
2008 |
DBLP DOI BibTeX RDF |
dense matrix, performance model, memory bandwidth, many-core architecture |
| 3 | Abbas Eslami Kiasari, Hamid Sarbazi-Azad, Shaahin Hessabi |
Caspian: A Tunable Performance Model for Multi-core Systems.  |
Euro-Par  |
2008 |
DBLP DOI BibTeX RDF |
G/G/1 queueing model, Performance evaluation, Analytical model, Multi-core systems |
Displaying result #1 - #100 of 14947 (100 per page; Change: ) Pages: [ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ >>] |
|