Search results for "data retention"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Animesh Kumar, Huifang Qin, Prakash Ishwar, Jan M. Rabaey, Kannan Ramchandran	Fundamental Data Retention Limits in SRAM Standby Experimental Results.	ISQED	2008	DBLP DOI BibTeX RDF	standby, data retention, low power, SRAM, error control code
2	Srivatsan Chellappa, Jia Ni, Xiaoyin Yao, Nathan D. Hindman, Jyothi Velamala, Min Chen, Yu Cao, Lawrence T. Clark	In-situ characterization and extraction of SRAM variability.	DAC	2010	DBLP DOI BibTeX RDF	SRAM test, data retention voltage, threshold voltage variation, write margin, extraction
2	Ki Chul Chun, Pulkit Jain, Chris H. Kim	A 0.9V, 65nm logic-compatible embedded DRAM with > 1ms data retention time and 53% less static power than a power-gated SRAM.	ISLPED	2009	DBLP DOI BibTeX RDF	3T DRAM, gain cell, retention time, cache, static power, embedded DRAM
2	Markus Hinkelmann, Andreas Jakoby	Preserving Privacy versus Data Retention.	TAMC	2009	DBLP DOI BibTeX RDF
2	Josef Haid, Bernd Zimek, Thomas Leutgeb, Thomas Kunemund	Impact of Leakage Current on Data Retention of RF-powered Devices During Amplitude-Modulation-based Communication.	DATE	2008	DBLP DOI BibTeX RDF
2	Animesh Kumar, Huifang Qin, Prakash Ishwar, Jan M. Rabaey, Kannan Ramchandran	Fundamental Bounds on Power Reduction during Data-Retention in Standby SRAM.	ISCAS	2007	DBLP DOI BibTeX RDF
2	Gregory J. Conti, Edward Sobiesk	An honest man has nothing to fear: user perceptions on web-based information disclosure.	SOUPS	2007	DBLP DOI BibTeX RDF	Yahoo!, data retention, privacy, anonymity, anonymization, web search, fingerprinting, usable security, Google, googling, information disclosure, MSN, AOL
2	Josh Yang, Baosheng Wang, Yuejian Wu, André Ivanov	Fast detection of data retention faults and other SRAM cell open defects.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
2	Victor Chao-Wei Kuo, Chih-Ming Chao, Chih-Kai Kang, Li-Wei Liu, Tzung-Bin Huang, Liang-Tai Kuo, Shi-Hsien Chen, Houng-Chi Wei, Hann-Ping Hwang, Saysamone Pittikoun	Detailed Comparisons of Program, Erase and Data Retention Characteristics between P+- and N+-Poly SONOS NAND Flash Memory.	MTDT	2006	DBLP DOI BibTeX RDF
2	Weiping Liao, Joseph M. Basile, Lei He	Microarchitecture-level leakage reduction with data retention.	IEEE Trans. VLSI Syst.	2005	DBLP DOI BibTeX RDF
2	Luigi Dilillo, Patrick Girard, Serge Pravossoudovitch, Arnaud Virazel, Magali Bastian Hage-Hassan	Data Retention Fault in SRAM Memories: Analysis and Detection Procedures.	VTS	2005	DBLP DOI BibTeX RDF
2	Baosheng Wang, Josh Yang, Yuejian Wu, André Ivanov	A retention-aware test power model for embedded SRAM.	ASP-DAC	2005	DBLP DOI BibTeX RDF	data retention fault test, multiple embedded SRAMs, test power modeling, test scheduling
2	Baosheng Wang, Yuejian Wu, Josh Yang, André Ivanov, Yervant Zorian	SRAM Retention Testing: Zero Incremental Time Integration with March Algorithms.	VTS	2005	DBLP DOI BibTeX RDF	Data Retention Faults, Zero-time DRF Testing, Opens, Embedded SRAMs
2	Baosheng Wang, Yuejian Wu, André Ivanov	Designs for Reducing Test Time of Distributed Small Embedded SRAMs.	DFT	2004	DBLP DOI BibTeX RDF	Distributed Small Embedded SRAMs, Data Retention Fault Test, Response Analysis, Test Time
2	Joohee Kim, Marios C. Papaefthymiou	Block-based multiperiod dynamic memory design for low data-retention power.	IEEE Trans. VLSI Syst.	2003	DBLP DOI BibTeX RDF
2	Amit Agarwal, Hai Li, Kaushik Roy	DRG-cache: a data retention gated-ground cache for low power.	DAC	2002	DBLP DOI BibTeX RDF	gated-ground, low leakage cache, SRAM
2	Victor V. Zyuban, Stephen V. Kosonocky	Low power integrated scan-retention mechanism.	ISLPED	2002	DBLP DOI BibTeX RDF	balloon latch, data retention, low power, scan, leakage, latch, MTCMOS, subthreshold
2	Joohee Kim, Marios C. Papaefthymiou	Dynamic Memory Design for Low Data-Retention Power.	PATMOS	2000	DBLP DOI BibTeX RDF
2	Yasunao Katayama, Yasushi Negishi, Sumio Morioka	Efficient Error Correction Code Configurations for Quasi-Nonvolatile Data Retention by DRAMs. (PDF / PS)	DFT	2000	DBLP DOI BibTeX RDF
2	Yasunao Katayama, Eric J. Stuckey, Sumio Morioka, Zhao Wu	Fault-Tolerant Refresh Power Reduction of DRAMs for Quasi-Nonvolatile Data Retention. (PDF / PS)	DFT	1999	DBLP DOI BibTeX RDF
2	Víctor H. Champac, José Castillejos, Joan Figueras	IDDQ Testing of Opens in CMOS SRAMs.	J. Electronic Testing	1999	DBLP DOI BibTeX RDF	data retention faults, memory testing, opens, IDDQ
2	Jean-François Blanchette, Deborah G. Johnson	Cryptography, data retention, and the panopticon society (abstract).	ACM Policy	1998	DBLP DOI BibTeX RDF
2	V. Kim, T. Chen	Assessing SRAM test coverage for sub-micron CMOS technologies.	VTS	1997	DBLP DOI BibTeX RDF	submicron CMOS technologies, SRAM test coverage assessment, memory fault probability model, memory array, data retention faults, memory fault coverages, memory test algorithms, functional fault class coverages, 0.5 to 1 mum, stuck-at faults, transition faults, stuck-open faults, coupling faults, physical defects, CMOS memory circuits
1	Afshin Nourivand, Asim J. Al-Khalili, Yvon Savaria	Postsilicon Tuning of Standby Supply Voltage in SRAMs to Reduce Yield Losses Due to Parametric Data-Retention Failures.	IEEE Trans. VLSI Syst.	2012	DBLP DOI BibTeX RDF
1	Ian Brown	Communications Data Retention in an Evolving Internet.	I. J. Law and Information Technology	2011	DBLP DOI BibTeX RDF
1	Teruyoshi Hatanaka, Mitsue Takahashi, Shigeki Sakai, Ken Takeuchi	Improvement of Read Disturb, Program Disturb and Data Retention by Memory Cell VTH Optimization of Ferroelectric (Fe)-NAND Flash Memories for Highly Reliable and Low Power Enterprise Solid-State Drives (SSDs).	IEICE Transactions	2011	DBLP BibTeX RDF
1	Woojun Lee, Kwangsoo Kim, Woo Young Choi	Novel 1T DRAM Cell for Low-Voltage Operation and Long Data Retention Time.	IEICE Transactions	2011	DBLP BibTeX RDF
1	Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha P. Chandrakasan	A 512kb 8T SRAM Macro Operating Down to 0.57 V With an AC-Coupled Sense Amplifier and Embedded Data-Retention-Voltage Sensor in 45 nm SOI CMOS.	J. Solid-State Circuits	2011	DBLP DOI BibTeX RDF
1	Jun Seomun, Youngsoo Shin	Design and Optimization of Power-Gated Circuits With Autonomous Data Retention.	IEEE Trans. VLSI Syst.	2011	DBLP DOI BibTeX RDF
1	Katja De Vries, Rocco Bellanova, Paul De Hert, Serge Gutwirth	The German Constitutional Court Judgment on Data Retention: Proportionality Overrides Unlimited Surveillance (Doesn't It?).	Computers, Privacy and Data Protection	2011	DBLP DOI BibTeX RDF
1	Jun Li, Sharad Singhal, Ram Swaminathan, Alan H. Karp	Managing data retention policies at scale.	Integrated Network Management	2011	DBLP DOI BibTeX RDF
1	Farah B. Yahya, Mohammad Mansour, Ali Chehab	A novel technique to measure data retention voltage of large SRAM arrays.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Elena Ioana Vatajel, Joan Figueras	Statistical analysis of 6T SRAM data retention voltage under process variation.	DDECS	2011	DBLP DOI BibTeX RDF
1	Ragib Hasan, Marianne Winslett	Efficient audit-based compliance for relational data retention.	ASIACCS	2011	DBLP DOI BibTeX RDF
1	J. Postel-Pellerin, R. Laffont, G. Micolau, F. Lalande, A. Regnier, B. Bouteille	Leakage paths identification in NVM using biased data retention.	Microelectronics Reliability	2010	DBLP DOI BibTeX RDF
1	Masood Qazi, Kevin Stawiasz, Leland Chang, Anantha Chandrakasan	A 512kb 8T SRAM macro operating down to 0.57V with an AC-coupled sense amplifier and embedded data-retention-voltage sensor in 45nm SOI CMOS.	ISSCC	2010	DBLP DOI BibTeX RDF
1	Dmitrij Lagutin, Sasu Tarkoma	Cryptographic signatures on the network layer - an alternative to the ISP data retention.	ISCC	2010	DBLP DOI BibTeX RDF
1	Adam C. Cabe, Zhenyu Qi, Mircea R. Stan	Stacking SRAM banks for ultra low power standby mode operation.	DAC	2010	DBLP DOI BibTeX RDF	stacked SRAM, low-power memory
1	J. Postel-Pellerin, F. Lalande, P. Canet, Rachid Bouchakour, F. Jeuland, L. Morancho	Modeling charge variation during data retention of MLC Flash memories.	Microelectronics Reliability	2009	DBLP DOI BibTeX RDF
1	Christoph Luetge	The Recent Decision of the German Federal Constitutional Court Concerning Data Retention.	HICSS	2009	DBLP DOI BibTeX RDF
1	Tiancheng Li, Xiaonan Ma, Ninghui Li	WORM-SEAL: Trustworthy Data Retention and Verification for Regulatory Compliance.	ESORICS	2009	DBLP DOI BibTeX RDF
1	Ludmila Cherkasova, Kave Eshghi, Charles B. Morrey III, Joseph Tucek, Alistair C. Veitch	Applying syntactic similarity algorithms for enterprise information management.	KDD	2009	DBLP DOI BibTeX RDF	performance, similarity, document management
1	Wentian Lu, Gerome Miklau	Auditing a Database under Retention Restrictions.	ICDE	2009	DBLP DOI BibTeX RDF
1	Jun Li, Bryan Stephenson, Sharad Singhal	A Policy Framework for Data Management in Services Marketplaces.	ARES	2009	DBLP DOI BibTeX RDF
1	Panayiotis Kotzanikolaou	Data Retention and Privacy in Electronic Communications.	IEEE Security & Privacy	2008	DBLP DOI BibTeX RDF
1	Peter Hannay, Andrew Woodward	Cold Boot Memory Acquisition: An Investigation into Memory Freezing and Data Retention Claims.	Security and Management	2008	DBLP BibTeX RDF
1	George Danezis	Covert Communications Despite Traffic Data Retention.	Security Protocols Workshop	2008	DBLP DOI BibTeX RDF
1	George Danezis	Covert Communications Despite Traffic Data Retention (Transcript of Discussion).	Security Protocols Workshop	2008	DBLP DOI BibTeX RDF
1	Gerald Stampfel, Wilfried N. Gansterer, Martin Ilger	Implications of the EU Data Retention Directive 2006/24/EC.	Sicherheit	2008	DBLP BibTeX RDF
1	Lara Dolecek, Masood Qazi, Devavrat Shah, Anantha Chandrakasan	Breaking the simulation barrier: SRAM evaluation through norm minimization.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Wei Dong, Peng Li, Garng M. Huang	SRAM dynamic stability: theory, variability and analysis.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Nicolas Anciaux, Mehdi Benzine, Luc Bouganim, Kévin Jacquemin, Philippe Pucheral, Shaoyi Yin	Restoring the Patient Control over Her Medical History.	CBMS	2008	DBLP DOI BibTeX RDF	Medical folder, Secure device, Privacy, Database
1	Radu Sion	Strong WORM.	ICDCS	2008	DBLP DOI BibTeX RDF
1	Po-Tsang Huang, Shu-Wei Chang, Wen-Yen Liu, Wei Hwang	"Green" micro-architecture and circuit co-design for ternary content addressable memory.	ISCAS	2008	DBLP DOI BibTeX RDF
1	Huifang Qin, Animesh Kumar, Kannan Ramchandran, Jan M. Rabaey, Prakash Ishwar	Error-Tolerant SRAM Design for Ultra-Low Power Standby Operation.	ISQED	2008	DBLP DOI BibTeX RDF	DRV, low power, ECC, leakage, SRAM, variation, low voltage, error tolerant
1	Jente B. Kuang, Keunwoo Kim, Ching-Te Chuang, Hung C. Ngo, Fadi H. Gebara, Kevin J. Nowka	Circuit Techniques Utilizing Independent Gate Control in Double-Gate Technologies.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Mohamed R. Fouad, Guy Lebanon, Elisa Bertino	ARUBA: A Risk-Utility-Based Algorithm for Data Disclosure.	Secure Data Management	2008	DBLP DOI BibTeX RDF	Data Utility, Security, Privacy, Anonymity, Risk Management, Data Sharing
1	Qiang Xu, Baosheng Wang, André Ivanov, Fung Yu Young	Test scheduling for built-in self-tested embedded SRAMs with data retention faults.	IET Computers & Digital Techniques	2007	DBLP BibTeX RDF
1	Zheng Zhang, Qiao Lian, Shiding Lin, Wei Chen 0013, Yu Chen, Chao Jin	BitVault: a highly reliable distributed data retention platform.	Operating Systems Review	2007	DBLP DOI BibTeX RDF
1	Keejong Kim, Hamid Mahmoodi, Kaushik Roy	A low-power SRAM using bit-line charge-recycling technique.	ISLPED	2007	DBLP DOI BibTeX RDF	write margin, write power, low power, process variation, SRAM, charge-recycling
1	Patrick Stahlberg, Gerome Miklau, Brian Neil Levine	Threats to privacy in the forensic analysis of database systems.	SIGMOD Conference	2007	DBLP DOI BibTeX RDF	privacy, transparency, forensics
1	Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi	Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits.	ASP-DAC	2007	DBLP DOI BibTeX RDF	gate leakage current, nanometer-scale CMOS circuits, supply switching, ground collapse, standard-cell elements, 45 nm, 65 nm, power gating, subthreshold leakage current, 90 nm
1	Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Brooks	Process Variation Tolerant 3T1D-Based Cache Architectures.	MICRO	2007	DBLP DOI BibTeX RDF
1	NagaPramod Mandagere, Jim Diehl, David Hung-Chang Du	GreenStor: Application-Aided Energy-Efficient Storage.	MSST	2007	DBLP DOI BibTeX RDF
1	Youngsoo Shin, Sewan Heo, Hyung-Ock Kim, Jung Yun Choi	Supply Switching With Ground Collapse: Simultaneous Control of Subthreshold and Gate Leakage Current in Nanometer-Scale CMOS Circuits.	IEEE Trans. VLSI Syst.	2007	DBLP DOI BibTeX RDF
1	Hyung-Ock Kim, Youngsoo Shin, Hyuk Kim, Iksoo Eo	Physical design methodology of power gating circuits for standard-cell-based design.	DAC	2006	DBLP DOI BibTeX RDF	low power, leakage current, power gating
1	Qiang Xu, Baosheng Wang, F. Y. Young	Retention-Aware Test Scheduling for BISTed Embedded SRAMs.	European Test Symposium	2006	DBLP DOI BibTeX RDF
1	Koert Vlaeminck, Filip De Turck, Bart Dhoedt, Piet Demeester	Deploying Digital Media Libraries in Multi-Service Access Networks.	ISM	2006	DBLP DOI BibTeX RDF
1	M. Thomas, J. Pathak, J. Payne, F. Leisenberger, E. Wachmann, G. Schatzberger, A. Wiesner, M. Schrems	A Non-Volatile Embedded Memory for High Temperature Automotive and High-Retention Applications.	ISQED	2006	DBLP DOI BibTeX RDF
1	Stefan Köpsell, Rolf Wendolsky, Hannes Federrath	Revocable Anonymity.	ETRICS	2006	DBLP DOI BibTeX RDF
1	Marco Casassa Mont	Towards Scalable Management of Privacy Obligations in Enterprises.	TrustBus	2006	DBLP DOI BibTeX RDF
1	J. Y. Seo, K. J. Lee, S. Y. Lee, S. J. Hwang, C. K. Yoon	Dielectric reliability of stacked Al2O3-HfO2 MIS capacitors with cylinder type for improving DRAM data retention characteristics.	Microelectronics Reliability	2005	DBLP DOI BibTeX RDF
1	Ling-Chang Hu, An-Chi Kang, Eric Chen, J. R. Shih, Yao-Feng Lin, Kenneth Wu, Ya-Chin King	Gate stress effect on low temperature data retention characteristics of split-gate flash memories.	Microelectronics Reliability	2005	DBLP DOI BibTeX RDF
1	David J. Kasik, William Buxton, David R. Ferguson	Ten CAD Challenges.	IEEE Computer Graphics and Applications	2005	DBLP DOI BibTeX RDF	large scale models, product life cycle management, long-term data retention, collaboration, computer-aided design, geometric modeling, user interaction, shape control
1	Rabiul Islam, Adam Brand, Dave Lippincott	Low power SRAM techniques for handheld products.	ISLPED	2005	DBLP DOI BibTeX RDF	back-bias, bitcell, memory, leakage
1	Vishal Kher, Yongdae Kim	Securing distributed storage: challenges, techniques, and systems.	StorageSS	2005	DBLP DOI BibTeX RDF	privacy, intrusion detection, integrity, authorization, confidentiality
1	Baosheng Wang, Yuejian Wu, André Ivanov	A Fast Diagnosis Scheme for Distributed Small Embedded SRAMs.	DATE	2005	DBLP DOI BibTeX RDF
1	Ward van Wanrooij, Aiko Pras	Data on Retention.	DSOM	2005	DBLP DOI BibTeX RDF
1	Kimish Patel, Luca Benini, Enrico Macii, Massimo Poncino	Energy-Efficient Value-Based Selective Refresh for Embedded DRAMs.	PATMOS	2005	DBLP DOI BibTeX RDF
1	Hamid Mahmoodi-Meimand, Kaushik Roy	Data-retention flip-flops for power-down applications.	ISCAS	2004	DBLP BibTeX RDF
1	Huifang Qin, Yu Cao, Dejan Markovic, Andrei Vladimirescu, Jan M. Rabaey	SRAM Leakage Suppression by Minimizing Standby Supply Voltage.	ISQED	2004	DBLP DOI BibTeX RDF
1	Josh Yang, Baosheng Wang, André Ivanov	Open Defects Detection within 6T SRAM Cells using a No Write Recovery Test Mode.	VLSI Design	2004	DBLP DOI BibTeX RDF	6T SRAM, Area Penalty, Write Recovery, Memory testing, Test Time, Open Defects
1	Baosheng Wang, Josh Yang, James Cicalo, André Ivanov, Yervant Zorian	Reducing Embedded SRAM Test Time under Redundancy Constraints.	VTS	2004	DBLP DOI BibTeX RDF	Memory Test Time, Memory Redundancy, Memory testing, March Tests, Embedded SRAMs
1	Chua-Chin Wang, Yih-Long Tseng, Hon-Yuan Leo, Ron Hu	A 4-kB 500-MHz 4-T CMOS SRAM using low-VTHN bitline drivers and high-VTHP latches.	IEEE Trans. VLSI Syst.	2004	DBLP DOI BibTeX RDF
1	Marco Casassa Mont	Dealing with Privacy Obligations: Important Aspects and Technical Approaches.	TrustBus	2004	DBLP DOI BibTeX RDF
1	Mohammad H. Tehranipour, Seid Mehdi Fakhraie, Zainalabedin Navabi, M. R. Movahedin	A Low-Cost At-Speed BIST Architecture for Embedded Processor and SRAM Cores.	J. Electronic Testing	2004	DBLP DOI BibTeX RDF	BIST architecture, DSP/microprocessor, UTS-DSP, bit/word-oriented memory, memory testing, march test
1	Hyung Gyu Lee, Naehyuck Chang	Energy-aware memory allocation in heterogeneous non-volatile memory systems.	ISLPED	2003	DBLP DOI BibTeX RDF	memory allocation, non-volatile memory, low-power memory
1	Rei-Fu Huang, Yung-Fa Chou, Cheng-Wen Wu	Defect Oriented Fault Analysis for SRAM.	Asian Test Symposium	2003	DBLP DOI BibTeX RDF
1	Baosheng Wang, Josh Yang, André Ivanov	Reducing Test Time of Embedded SRAMs.	MTDT	2003	DBLP DOI BibTeX RDF	Embedded SRAM test, Inductive Fault Analysis, Memory Redundancy, March Test, Test Time
1	S. Cservany, Jean-Marc Masgonty, Christian Piguet	Stand-by Power Reduction for Storage Circuits.	PATMOS	2003	DBLP DOI BibTeX RDF
1	Jean-François Blanchette, Deborah G. Johnson	Data Retention and the Panoptic Society: The Social Benefits of Forgetfulness.	Inf. Soc.	2002	DBLP DOI BibTeX RDF
1	Weiping Liao, Joseph M. Basile, Lei He	Leakage power modeling and reduction with data retention.	ICCAD	2002	DBLP DOI BibTeX RDF
1	Mohammad H. Tehranipour, Zainalabedin Navabi, Seid Mehdi Fakhraie	An efficient BIST method for testing of embedded SRAMs.	ISCAS	2001	DBLP DOI BibTeX RDF
1	Piotr R. Sidorowicz	Modeling and Testing Transistor Faults in Content-Addressable Memories.	MTDT	1999	DBLP DOI BibTeX RDF
1	Manuel Serrano	Wide Classes.	ECOOP	1999	DBLP DOI BibTeX RDF	dynamic inheritance, dynamic type checking, instance modification, Language implementation
1	Taku Ohsawa, Koji Kai, Kazuaki Murakami	Optimizing the DRAM refresh count for merged DRAM/logic LSIs.	ISLPED	1998	DBLP DOI BibTeX RDF
1	Piero Olivo, Marcello Dalpasso	A Bist Scheme for Non-Volatile Memories.	J. Electronic Testing	1998	DBLP DOI BibTeX RDF	off-line testing, built-in self-test, signature analysis, non-volatile memories
1	Manoj Sachdev	Reducing the CMOS RAM test complexity withIDDQ and voltage testing.	J. Electronic Testing	1995	DBLP DOI BibTeX RDF	fault model, faults, defects, March test, I DDQ testing