Search results for "design automation community"

Found 10 publication records. Showing 10 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Andrew Wolfe	A case study in low-power system-level design. (PDF / PS)	ICCD	1995	DBLP DOI BibTeX RDF	low-power system-level design, touchscreen interface device, RS232 communication lines, design automation community, real-time systems, logic design, systems analysis, personal computer, low-power embedded system
1	Tejaswi Gowda, Sarma B. K. Vrudhula, Goran Konjevod	Combinational equivalence checking for threshold logic circuits.	ACM Great Lakes Symposium on VLSI	2007	DBLP DOI BibTeX RDF	nano devices, EDA, equivalence checking, threshold logic
1		DATC Newsletter.	IEEE Design & Test of Computers	2006	DBLP DOI BibTeX RDF	information-based economy, intellectual property, design automation, DATC
1	Vivek V. Shende, Stephen S. Bullock, Igor L. Markov	Synthesis of quantum-logic circuits.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
1	JoAnn M. Paul, Donald E. Thomas, Alex Bobrek	Scenario-oriented design for single-chip heterogeneous multiprocessors.	IEEE Trans. VLSI Syst.	2006	DBLP DOI BibTeX RDF
1	Paul Villarrubia	Physical design tools for hierarchy.	ISPD	2005	DBLP DOI BibTeX RDF
1	Joel R. Phillips, Luca Daniel, Luis Miguel Silveira	Guaranteed passive balancing transformations for model order reduction.	IEEE Trans. on CAD of Integrated Circuits and Systems	2003	DBLP DOI BibTeX RDF
1	Joel R. Phillips, Luca Daniel, Luis Miguel Silveira	Guaranteed passive balancing transformations for model order reduction.	DAC	2002	DBLP DOI BibTeX RDF	passive reduced order modeling, truncated balanced realization
1	Charles J. Alpert	The ISPD98 circuit benchmark suite.	ISPD	1998	DBLP DOI BibTeX RDF
1	John Lowell	Computer aided design for analog applications (panel session): an assessment.	DAC	1985	DBLP DOI BibTeX RDF

Displaying result #1 - #10 of 10 (100 per page; Change: )