|
|
|
|
Venues (Conferences, Journals, ...)
|
|
|
GrowBag graphs for keyword ? (Num. hits/coverage)
Group by:
The graphs summarize 1042 occurrences of 531 keywords
|
|
|
|
|
Results
Found 1002 publication records. Showing 1002 according to the selection in the facets
| Hits ?▲ |
Authors |
Title |
Venue |
Year |
Link |
Author keywords |
| 4 | Helvio P. Peixoto, Margarida F. Jacome |
Algorithm and architecture-level design space exploration using hierarchical data flows.  |
ASAP  |
1997 |
DBLP DOI BibTeX RDF |
architecture-level design space exploration, algorithm-level design space exploration, hierarchical data flows, fidelity system-level metrics, systems analysis, power consumption |
| 3 | Satyanand Nalam, Mudit Bhargava, Ken Mai, Benton H. Calhoun |
Virtual prototyper (ViPro): an early design space exploration and optimization tool for SRAM designers.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
optimization, design space exploration, SRAM, virtual prototype, iterative design |
| 3 | Giovanni Mariani, Aleksandar Brankovic, Gianluca Palermo, Jovana Jovic, Vittorio Zaccaria, Cristina Silvano |
A correlation-based design space exploration methodology for multi-processor systems-on-chip.  |
DAC  |
2010 |
DBLP DOI BibTeX RDF |
design space exploration, kriging, response surface, multi-processor systems-on-chip |
| 3 | Bastian Ristau, Torsten Limberg, Gerhard Fettweis |
A Mapping Framework Based on Packing for Design Space Exploration of Heterogeneous MPSoCs.  |
Signal Processing Systems  |
2009 |
DBLP DOI BibTeX RDF |
Performance evaluation, Mapping, Design space exploration, MPSoC, Packing |
| 3 | Toktam Taghavi, Mark Thompson, Andy D. Pimentel |
Visualization of Computer Architecture Simulation Data for System-Level Design Space Exploration.  |
SAMOS  |
2009 |
DBLP DOI BibTeX RDF |
Computer architecture simulation, coordination, design space exploration, multiple views, linked views, exploratory visualization |
| 3 | Marcio F. da S. Oliveira, Ronaldo R. Ferreira, Francisco Assis M. do Nascimento, Franz J. Rammig, Flávio Rech Wagner |
Exploiting the model-driven engineering approach to improve design space exploration of embedded systems.  |
SBCCI  |
2009 |
DBLP DOI BibTeX RDF |
embedded systems, model-driven engineering, design space exploration |
| 3 | Daniel Knorreck, Ludovic Apvrille, Renaud Pacalet |
Fast Simulation Techniques for Design Space Exploration.  |
TOOLS  |
2009 |
DBLP DOI BibTeX RDF |
DIPLODOCUS, TTool, Fast Simulation Techniques, UML, System-On-Chip, Design Space Exploration, System Level Modeling |
| 3 | Vincenzo Catania, Maurizio Palesi, Davide Patti |
Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems.  |
TACO  |
2008 |
DBLP DOI BibTeX RDF |
hyperblock formation, genetic algorithms, performances, statistical analysis, power, energy, design space exploration, multiobjective optimization, ILP, VLIW architectures |
| 3 | Henry Cook, Kevin Skadron |
Predictive design space exploration using genetically programmed response surfaces.  |
DAC  |
2008 |
DBLP DOI BibTeX RDF |
genetic programming, design space exploration, predictive modeling |
| 3 | Christian Haubelt, Thomas Schlichter, Joachim Keinert, Michael Meredith |
SystemCoDesigner: automatic design space exploration and rapid prototyping from behavioral models.  |
DAC  |
2008 |
DBLP DOI BibTeX RDF |
rapid prototyping, design space exploration, ESL design |
| 3 | Seyed Hosein Attarzadeh Niaki, Alessandro Cevrero, Philip Brisk, Chrysostomos Nicopoulos, Frank K. Gürkaynak, Yusuf Leblebici, Paolo Ienne |
Design space exploration for field programmable compressor trees.  |
CASES  |
2008 |
DBLP DOI BibTeX RDF |
design space exploration (dse), field programmable compressor tree (fpct) |
| 3 | Yun Liang, Tulika Mitra |
Static analysis for fast and accurate design space exploration of caches.  |
CODES+ISSS  |
2008 |
DBLP DOI BibTeX RDF |
probabilistic cache states, cache, design space exploration |
| 3 | Marcio F. da S. Oliveira, Eduardo Wenzel Brião, Francisco Assis M. do Nascimento, Flávio Rech Wagner |
Model driven engineering for MPSOC design space exploration.  |
SBCCI  |
2007 |
DBLP DOI BibTeX RDF |
model driven engineering, design space exploration, multi-processor system-on-chip |
| 3 | Tse-Chen Yeh, Tsung-Yu Ho, Hung-Yu Chen, Ing-Jer Huang |
SystemC-Based Design Space Exploration of a 3D Graphics Acceleration SoC for Consumer Electronics.  |
EUC  |
2007 |
DBLP DOI BibTeX RDF |
SystemC modeling, 3D graphics SoC, design space exploration, transaction-level modeling |
| 3 | Jingzhao Ou, Viktor K. Prasanna |
Design space exploration using arithmetic-level hardware--software cosimulation for configurable multiprocessor platforms.  |
ACM Trans. Embedded Comput. Syst.  |
2006 |
DBLP DOI BibTeX RDF |
FPGA, design space exploration, processor, cosimulation |
| 3 | Paulo Sérgio B. do Nascimento, Manoel Eusebio de Lima, Stelita M. da Silva, Jordana L. Seixas |
Mapping of image processing systems to FPGA computer based on temporal partitioning and design space exploration.  |
SBCCI  |
2006 |
DBLP DOI BibTeX RDF |
FPGA-computers, area-time trade-offs, temporal partitioning techniques, image processing, design space exploration |
| 3 | Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner |
Design space exploration using time and resource duality with the ant colony optimization.  |
DAC  |
2006 |
DBLP DOI BibTeX RDF |
MAX-MIN ant system, instruction scheduling algorithms, ant colony optimization, design space exploration |
| 3 | Gianluca Palermo, Cristina Silvano, S. Valsecchi, Vittorio Zaccaria |
A system-level methodology for fast multi-objective design space exploration.  |
ACM Great Lakes Symposium on VLSI  |
2003 |
DBLP DOI BibTeX RDF |
system-level methodologies, embedded systems, low-power design, design space exploration |
| 3 | Byoungro So, Pedro C. Diniz, Mary W. Hall |
Using estimates from behavioral synthesis tools in compiler-directed design space exploration.  |
DAC  |
2003 |
DBLP DOI BibTeX RDF |
synthesis techniques for reconfigurable computing, field-programmable-gate-array, high-level synthesis, rapid prototyping, design space exploration |
| 3 | Wei Ming Lim, Mohammed Benaissa |
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and cryptography.  |
CODES+ISSS  |
2003 |
DBLP DOI BibTeX RDF |
GF(2m) arithmetic, forward error control coding, galois field processor, cryptography, advanced encryption standard, elliptic curve cryptography, design space exploration, Reed-Solomon code, hardware-software co-design, BCH code |
| 3 | Byoungro So, Mary W. Hall, Pedro C. Diniz |
A Compiler Approach to Fast Hardware Design Space Exploration in FPGA-based Systems.  |
PLDI  |
2002 |
DBLP DOI BibTeX RDF |
reuse analysis, design space exploration, loop transformations, data dependence analysis |
| 3 | Alexandru Nicolau, Nikil D. Dutt, Aviral Shrivastava, Partha Biswas, Ashok Halambi |
A Design Space Exploration Framework for Reduced Bit-Width Instruction Set Architecture (rISA) Design .  |
ISSS  |
2002 |
DBLP DOI BibTeX RDF |
compressed instruction set, dual Instruction set, rISA, reduced bit-width instruction set, thumb, design space exploration, register pressure |
| 3 | M. Balakrishnan, Anshul Kumar, C. P. Joshi |
A New Performance Evaluation Approach for System Level Design Space Exploration.  |
ISSS  |
2002 |
DBLP DOI BibTeX RDF |
design space exploration, system level design, statistical simulation |
| 3 | Vinoo Srinivasan, Shankar Radhakrishnan, Ranga Vemuri |
Hardware Software Partitioning with Integrated Hardware Design Space Exploration.  |
DATE  |
1998 |
DBLP DOI BibTeX RDF |
Hadware/Software Partitioning, Genetic Algorithms, Design Space Exploration, Codesign |
| 3 | Henrik Esbensen, Ernest S. Kuh |
A performance-driven IC/MCM placement algorithm featuring explicit design space exploration.  |
ACM Trans. Design Autom. Electr. Syst.  |
1997 |
DBLP DOI BibTeX RDF |
timing-driven building-block placement, design space exploration |
| 2 | Tripti Saxena, Gabor Karsai |
A Meta-Framework for Design Space Exploration.  |
ECBS  |
2011 |
DBLP DOI BibTeX RDF |
design space exploration, constraint programming, model based design |
| 2 | Hun Jung, Miao Ju, Hao Che |
A Theoretical Framework for Design Space Exploration of Manycore Processors.  |
MASCOTS  |
2011 |
DBLP DOI BibTeX RDF |
CMP, multicore, design space exploration, queuing network, manycore |
| 2 | Bernhard Buchli, Mustafa Yuecel, Roman Lim, Tonio Gsell, Jan Beutel |
Demo abstract: Feature-rich platform for WSN design space exploration.  |
IPSN  |
2011 |
DBLP BibTeX RDF |
|
| 2 | Bernhard Schätz, Florian Hölzl, Torbjörn Lundkvist |
Design-Space Exploration through Constraint-Based Model-Transformation.  |
ECBS  |
2010 |
DBLP DOI BibTeX RDF |
Model transformation, design-space exploration, rule-based, declarative, EMF |
| 2 | Tripti Saxena, Gabor Karsai |
Towards a Generic Design Space Exploration Framework.  |
CIT  |
2010 |
DBLP DOI BibTeX RDF |
design space exploration |
| 2 | Arpith C. Jacob, Jeremy D. Buhler, Roger D. Chamberlain |
Design space exploration of throughput-optimized arrays from recurrence abstractions (abstract only).  |
FPGA  |
2010 |
DBLP DOI BibTeX RDF |
fpga, dynamic programming, systolic array, throughput optimization, recurrences |
| 2 | Benedikt Huber, Wolfgang Puffitsch, Martin Schoeberl |
WCET driven design space exploration of an object cache.  |
JTRES  |
2010 |
DBLP DOI BibTeX RDF |
|
| 2 | Thorsten Jungeblut, Gregor Sievers, Mario Porrmann, Ulrich Rückert |
Design Space Exploration for Memory Subsystems of VLIW Architectures.  |
NAS  |
2010 |
DBLP DOI BibTeX RDF |
CoreVA, Cache, Design Space Exploration, VLIW, Memory Subsystem |
| 2 | Joachim Keinert, Martin Streubühr, Thomas Schlichter, Joachim Falk, Jens Gladigau, Christian Haubelt, Jürgen Teich, Michael Meredith |
SystemCoDesigner - an automatic ESL synthesis approach by design space exploration and behavioral synthesis for streaming applications.  |
ACM Trans. Design Autom. Electr. Syst.  |
2009 |
DBLP DOI BibTeX RDF |
System design, hardware/software codesign |
| 2 | Aviral Shrivastava, Ilya Issenin, Nikil Dutt, Sanghyun Park, Yunheung Paek |
Compiler-in-the-Loop Design Space Exploration Framework for Energy Reduction in Horizontally Partitioned Cache Architectures.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Sonali Chouhan, M. Balakrishnan, Ranjan Bose |
An experimental validation of system level design space exploration methodology for energy efficient sensor nodes.  |
ISLPED  |
2009 |
DBLP DOI BibTeX RDF |
computation-radio energy trade-off, wireless sensor networks, error correcting codes, low energy, energy measurement |
| 2 | Omar A. Al Rayahi, Mohammed A. S. Khalid |
UWindsor Nios II: A soft-core processor for design space exploration.  |
EIT  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Alexander Fell, Mythri Alle, Keshavan Varadarajan, Prasenjit Biswas, Saptarsi Das, Jugantor Chetia, S. K. Nandy, Ranjani Narayan |
Streaming FFT on REDEFINE-v2: an application-architecture design space exploration.  |
CASES  |
2009 |
DBLP DOI BibTeX RDF |
application synthesis, custom instruction extension, dataflow software pipeline, honeycomb, polymorphic asic, runtime reconfiguration, router, NOC |
| 2 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Variability-aware robust design space exploration of chip multiprocessor architectures.  |
ASP-DAC  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Torsten Kempf, Stefan Wallentowitz, Gerd Ascheid, Rainer Leupers, Heinrich Meyr |
A Workbench for Analytical and Simulation Based Design Space Exploration of Software Defined Radios.  |
VLSI Design  |
2009 |
DBLP DOI BibTeX RDF |
|
| 2 | Martin Lukasiewycz, Michael Glaß, Jürgen Teich |
Exploiting data-redundancy in reliability-aware networked embedded system design.  |
CODES+ISSS  |
2009 |
DBLP DOI BibTeX RDF |
reliability, design space exploration, networked embedded systems |
| 2 | David Kammler, Diandian Zhang, Peter Schwabe, Hanno Scharwächter, Markus Langenberg, Dominik Auras, Gerd Ascheid, Rudolf Mathar |
Designing an ASIP for Cryptographic Pairings over Barreto-Naehrig Curves.  |
CHES  |
2009 |
DBLP DOI BibTeX RDF |
Barreto-Naehrig curves, elliptic-curve cryptography (ECC), design-space exploration, Application-specific instruction-set processor (ASIP), arithmetic, pairing-based cryptography |
| 2 | Farhat Thabet, Philippe Coussy, Dominique Heller, Eric Martin |
Exploration and Rapid Prototyping of DSP Applications using SystemC Behavioral Simulation and High-level Synthesis.  |
Signal Processing Systems  |
2009 |
DBLP DOI BibTeX RDF |
Prototyping, Refinement, High-level synthesis, Design space exploration, System level design |
| 2 | Engin Ipek, Sally A. McKee, Karan Singh, Rich Caruana, Bronis R. de Supinski, Martin Schulz |
Efficient architectural design space exploration via predictive modeling.  |
TACO  |
2008 |
DBLP DOI BibTeX RDF |
sensitivity studies, Artificial neural networks, performance prediction, design space exploration |
| 2 | Peter Hallschmid, Resve Saleh |
Fast Design Space Exploration Using Local Regression Modeling With Application to ASIPs.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Andy D. Pimentel, Mark Thompson, Simon Polstra, Cagkan Erbas |
Calibration of Abstract Performance Models for System-Level Design Space Exploration.  |
Signal Processing Systems  |
2008 |
DBLP DOI BibTeX RDF |
system-level modeling and simulation, performance analysis, model calibration |
| 2 | Pao-Ann Hsiung, Chao-Sheng Lin, Chih-Feng Liao |
Perfecto: A systemc-based design-space exploration framework for dynamically reconfigurable architectures.  |
TRETS  |
2008 |
DBLP DOI BibTeX RDF |
scheduling, performance evaluation, partitioning, placement, design-space exploration, Reconfigurable systems |
| 2 | Kamana Sigdel, Mark Thompson, Andy D. Pimentel, Todor Stefanov, Koen Bertels |
System-Level Design Space Exploration of Dynamic Reconfigurable Architectures.  |
SAMOS  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Ahsan Shabbir, Akash Kumar, Bart Mesman, Henk Corporaal |
Enabling MPSoC Design Space Exploration on FPGAs.  |
IMTIC  |
2008 |
DBLP DOI BibTeX RDF |
FPGAs, MPSoC, FIFO, FSL |
| 2 | Gianluca Palermo, Cristina Silvano, Vittorio Zaccaria |
Discrete Particle Swarm Optimization for Multi-objective Design Space Exploration.  |
DSD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Berkin Özisikyilmaz, Gokhan Memik, Alok N. Choudhary |
Efficient system design space exploration using machine learning techniques.  |
DAC  |
2008 |
DBLP DOI BibTeX RDF |
machine learning, performance prediction, design space |
| 2 | Giovanni Beltrame, Cristiana Bolchini, Luca Fossati, Antonio Miele, Donatella Sciuto |
ReSP: A non-intrusive Transaction-Level Reflective MPSoC Simulation Platform for design space exploration.  |
ASP-DAC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Farhad Mehdipour, Hamid Noori, Morteza Saheb Zamani, Koji Inoue, Kazuaki Murakami |
Design space exploration for a coarse grain accelerator.  |
ASP-DAC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Martin Lukasiewycz, Michael Glaß, Christian Haubelt, Jürgen Teich |
Efficient symbolic multi-objective design space exploration.  |
ASP-DAC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Sukhun Kang, Rakesh Kumar |
Magellan: A Search and Machine Learning-based Framework for Fast Multi-core Design Space Exploration and Optimization.  |
DATE  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Pierluigi Nuzzo, Claudio Nani, Sergio Saponara, Luca Fanucci, Geert Van der Plas |
Mixed-Signal Design Space Exploration of Time-Interleaved A/D Converters for Ultra-Wide Band Applications.  |
DATE  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Bart D. Theelen |
Performance Model Generation for MPSoC Design-Space Exploration.  |
QEST  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Cristiana Bolchini, Antonio Miele |
Design Space Exploration for the Design of Reliable.  |
DFT  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Zai Jian Jia, Tomás Bautista, Antonio Núñez, Cayetano Guerra, Mario Hernández |
Design Space Exploration and Performance Analysis for the Modular Design of CVS in a Heterogeneous MPSoC.  |
ReConFig  |
2008 |
DBLP DOI BibTeX RDF |
Design space exploration, platform-based design, tracking algorithm, heterogeneous MPSoC |
| 2 | Volker Paelke, Karsten Nebe |
Integrating agile methods for mixed reality design space exploration.  |
Conference on Designing Interactive Systems  |
2008 |
DBLP DOI BibTeX RDF |
augmented and mixed reality, augmented paper map, prototyping, user centred design, agile development |
| 2 | Mark Hammerquist, Roman L. Lysecky |
Design space exploration for application specific FPGAS in system-on-a-chip designs.  |
SoCC  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Bin Li, Lu Peng, Balachandran Ramadass |
Efficient mart-aided modeling for microarchitecture design space exploration and performance prediction.  |
SIGMETRICS  |
2008 |
DBLP DOI BibTeX RDF |
MART-aided models, performance prediction, design space exploration |
| 2 | Ranko Sredojevic, Vladimir Stojanovic |
Optimization-based framework for simultaneous circuit-and-system design-space exploration: a high-speed link example.  |
ICCAD  |
2008 |
DBLP DOI BibTeX RDF |
|
| 2 | Hristo Nikolov, Mark Thompson, Todor Stefanov, Andy D. Pimentel, Simon Polstra, R. Bose, Claudiu Zissulescu, Ed F. Deprettere |
Daedalus: toward composable multimedia MP-SoC design.  |
DAC  |
2008 |
DBLP DOI BibTeX RDF |
system-level design and synthesis, design space exploration |
| 2 | Yongjin Ahn, Keesung Han, Ganghee Lee, Hyunjik Song, Jun-hee Yoo, Kiyoung Choi, Xingguang Feng |
SoCDAL: System-on-chip design AcceLerator.  |
ACM Trans. Design Autom. Electr. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
application-to-architecture mapping, static hardware/software estimation, simulation, scheduling, specification, design-space exploration, worst-case execution time, Codesign, transaction-level model, synchronous dataflow, multiprocessor system-on-chip, process networks |
| 2 | Seongnam Kwon, Yongjoo Kim, Woo-Chul Jeun, Soonhoi Ha, Yunheung Paek |
A retargetable parallel-programming framework for MPSoC.  |
ACM Trans. Design Autom. Electr. Syst.  |
2008 |
DBLP DOI BibTeX RDF |
parallel-programming, design-space exploration, Embedded software, multiprocessor system on chip, software generation |
| 2 | Rohit Saraswat, Brandon Eames |
On the Use of DesertFD to Generate Custom Architectures for H.264 Motion Estimation.  |
ECBS  |
2008 |
DBLP DOI BibTeX RDF |
Architecture derivation, DesertFD, Motion Estimation, Design Space Exploration, H.264, Algorithm selection |
| 2 | Aviral Shrivastava, Sanghyun Park, Eugene Earlie, Nikil D. Dutt, Alexandru Nicolau, Yunheung Paek |
Automatic Design Space Exploration of Register Bypasses in Embedded Processors.  |
IEEE Trans. on CAD of Integrated Circuits and Systems  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Ganghee Lee, Seokhyun Lee, Yongjin Ahn, Kiyoung Choi |
Automatic Bus Matrix Synthesis based on Hardware Interface Selection for Fast Communication Design Space Exploration.  |
ICSAMOS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Christoforos Kachris, Stamatis Vassiliadis |
Design Space Exploration of Configuration Manager for Network Processing Applications.  |
ICSAMOS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Alexis Vander Biest, Alienor Richard, Dragomir Milojevic, Frédéric Robert |
A Framework Introducing Model Reversibility in SoC Design Space Exploration.  |
SAMOS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Mark Thompson, Andy D. Pimentel |
Towards Multi-application Workload Modeling in Sesame for System-Level Design Space Exploration.  |
SAMOS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Sangsoo Park, Heonshik Shin |
Performance Evaluation of Memory Management Configurations in Linux for an OS-Level Design Space Exploration.  |
SAMOS  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Charles Thangaraj, Tom Chen |
Power andPerformance Analysis for Early Design Space Exploration.  |
ISVLSI  |
2007 |
DBLP DOI BibTeX RDF |
Power-performance tradeoff, What-if analysis |
| 2 | Manoj Gupta, Mayank Gupta, Neeraj Goel, M. Balaksrishnan |
Energy Based Design Space Exploration of Multiprocessor VLIW Architectures.  |
DSD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Kalle Holma, Mikko Setälä, Erno Salminen, Timo D. Hämäläinen |
Evaluating the Model Accuracy in Automated Design Space Exploration.  |
DSD  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Martin Holzer 0002, Bastian Knerr, Markus Rupp |
Design Space Exploration with Evolutionary Multi-Objective Optimisation.  |
SIES  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Anupam Chattopadhyay, W. Ahmed, Kingshuk Karuri, David Kammler, Rainer Leupers, Gerd Ascheid, Heinrich Meyr |
Design space exploration of partially re-configurable embedded processors.  |
DATE  |
2007 |
DBLP DOI BibTeX RDF |
|
| 2 | Richard Vincent Bennett, Alastair Colin Murray, Björn Franke, Nigel P. Topham |
Combining source-to-source transformations and processor instruction set extensions for the automated design-space exploration of embedded systems.  |
LCTES  |
2007 |
DBLP DOI BibTeX RDF |
source-level transformations, compilers, design space exploration, ASIPs, instruction set extension, customizable processors |
| 2 | Iyad Al Khatib, Davide Bertozzi, Axel Jantsch, Luca Benini |
Performance analysis and design space exploration for high-end biomedical applications: challenges and solutions.  |
CODES+ISSS  |
2007 |
DBLP DOI BibTeX RDF |
realtime analysis, design space exploration, multiprocessor system-on-chip, biomedical, electrocardiogram algorithms |
| 2 | Mark Thompson, Hristo Nikolov, Todor Stefanov, Andy D. Pimentel, Cagkan Erbas, Simon Polstra, Ed F. Deprettere |
A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs.  |
CODES+ISSS  |
2007 |
DBLP DOI BibTeX RDF |
system-level design and synthesis, rapid prototyping, design space exploration |
| 2 | Júlio C. B. de Mattos, Luigi Carro |
Object and method exploration for embedded systems applications.  |
SBCCI  |
2007 |
DBLP DOI BibTeX RDF |
object-oriented, design space exploration, embedded software |
| 2 | Soonhoi Ha, Sungchan Kim, Choonseung Lee, Youngmin Yi, Seongnam Kwon, Young-Pyo Joo |
PeaCE: A hardware-software codesign environment for multimedia embedded systems.  |
ACM Trans. Design Autom. Electr. Syst.  |
2007 |
DBLP DOI BibTeX RDF |
hardware-software cosimulation, embedded systems, design-space exploration, model-based design, Hardware-software codesign |
| 2 | Gang Wang, Wenrui Gong, Brian DeRenzi, Ryan Kastner |
Exploring time/resource trade-offs by solving dual scheduling problems with the ant colony optimization.  |
ACM Trans. Design Autom. Electr. Syst.  |
2007 |
DBLP DOI BibTeX RDF |
max-min ant system, ant colony optimization, Design space exploration, instruction scheduling |
| 2 | Márcio Oyamada, Flávio Rech Wagner, Marius Bonaciu, Wander O. Cesário, Ahmed Amine Jerraya |
Software Performance Estimation in MPSoC Design.  |
ASP-DAC  |
2007 |
DBLP DOI BibTeX RDF |
cycle-accurate simulation model, software performance estimation, MPSoC design, software-dominated embedded systems, integrated methodology, bus-functional model, multiprocessor platform, MPEG4 encoder, neural networks, performance analysis, design space exploration, design validation |
| 2 | Jun-hee Yoo, Dongwook Lee, Sungjoo Yoo, Kiyoung Choi |
Communication Architecture Synthesis of Cascaded Bus Matrix.  |
ASP-DAC  |
2007 |
DBLP DOI BibTeX RDF |
AMBA3 AXI, cascaded bus matrix, on-chip communication architecture, bus topology, encoding method, traffic group encoding, simulated annealing, design space exploration |
| 2 | Joshua L. Kihm, Samuel D. Strom, Daniel A. Connors |
Phase-Guided Small-Sample Simulation.  |
ISPASS  |
2007 |
DBLP DOI BibTeX RDF |
SpedOOO benchmark suite, phase-guided small-sample simulation, sampled simulation, phase-based simulation, benchmark evaluation suite, execution-aware sampling-based simulation, design space exploration, sampling method, processor design, cycle-accurate simulation |
| 2 | Erez Perelman, Jeremy Lau, Harish Patil, Aamer Jaleel, Greg Hamerly, Brad Calder |
Cross Binary Simulation Points.  |
ISPASS  |
2007 |
DBLP DOI BibTeX RDF |
cross binary simulation point, SimPoint, architectural design space exploration, compiler optimization evaluation, program execution, program evaluation |
| 2 | Rajani Pai, R. Govindarajan |
FEADS: A Framework for Exploring the Application Design Space on Network Processors.  |
International Journal of Parallel Programming  |
2007 |
DBLP DOI BibTeX RDF |
performance Evaluation, petri Nets, design space exploration, network processor, programming model, Cyclic scheduling |
| 2 | Vyas Krishnan, Srinivas Katkoori |
A genetic algorithm for the design space exploration of datapaths during high-level synthesis.  |
IEEE Trans. Evolutionary Computation  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Andy D. Pimentel, Mark Thompson, Simon Polstra, Cagkan Erbas |
On the Calibration of Abstract Performance Models for System-level Design Space Exploration.  |
ICSAMOS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Hartwig Jeschke |
Design Space Expoloration Chip Size Estimation for SOC Design Space Exploration.  |
ICSAMOS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Vyas Krishnan, Srinivas Katkoori |
Design Space Exploration of RTL Datapaths Using Rent Parameter based Stochastic Wirelength Estimation.  |
ISQED  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Thomas Schlichter, Martin Lukasiewycz, Christian Haubelt, Jürgen Teich |
Improving System Level Design Space Exploration by Incorporating SAT-Solvers into Multi-Objective Evolutionary Algorithms.  |
ISVLSI  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Marcio F. da S. Oliveira, Lisane B. de Brisolara, Luigi Carro, Flávio Rech Wagner |
Early Embedded Software Design Space Exploration Using UML-Based Estimation.  |
IEEE International Workshop on Rapid System Prototyping  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Farhat Thabet, Philippe Coussy, Dominique Heller, Eric Martin |
Design Space Exploration of DSP Applications Based on Behavioral Description Models.  |
SiPS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Muhammad Waseem, Ludovic Apvrille, Rabéa Ameur-Boulifa, Sophie Coudert, Renaud Pacalet |
Abstract Application Modeling for System Design Space Exploration.  |
DSD  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Liam Noonan, Colin Flanagan |
Utilising Evolutionary Approaches and Object Oriented Techniques for Design Space Exploration.  |
DSD  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Claudio Talarico, Esteban Rodriguez-Marek, Min-Sung Koh |
Multi-Objective Design Space Exploration Methodologies for Platform based SOCs.  |
ECBS  |
2006 |
DBLP DOI BibTeX RDF |
|
| 2 | Tamer Ragheb, Arthur Nieuwoudt, Yehia Massoud |
Efficient modeling of integrated narrow-band low noise amplifiers for design space exploration.  |
ACM Great Lakes Symposium on VLSI  |
2006 |
DBLP DOI BibTeX RDF |
narrow-band, low noise amplifier, noise figure |
Displaying result #1 - #100 of 1002 (100 per page; Change: ) Pages: [ 1][ 2][ 3][ 4][ 5][ 6][ 7][ 8][ 9][ 10][ >>] |
|