Search results for "digital logic simulation"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Sina Meraji, Wei Zhang 0034, Carl Tropper	Brief announcement: a reinforcement learning approach for dynamic load-balancing of parallel digital logic simulation.	SPAA	2010	DBLP DOI BibTeX RDF	digital logic simulation, reinforcement learning, dynamic load-balancing, time warp, verilog
3	Youngmin Hur, Stephen A. Szygenda	Special purpose array processor for digital logic simulation.	Annual Simulation Symposium	1995	DBLP DOI BibTeX RDF	special purpose array processor, digital logic simulation, large VLSI circuits, compute-intensive tasks, digital analysis, time driven array processor, massively parallel processing element, compiled event-driven technology, nominal transport delay timing analysis, delay time order, levelized circuit, massively parallel PE array, MARS accelerator, VLSI, parallel architectures, delays, timing, fault simulation, logic CAD, digital simulation, circuit analysis computing, special purpose computers, SIMD architecture, hardware cost
2	Luben Boianov, Innes Jelly	Distributed logic circuit simulation on a network of workstations.	PDP	1995	DBLP DOI BibTeX RDF	logic circuit simulation, distributed digital logic simulation, logical simulation algorithms, distributed processing, logic CAD, digital simulation, Parallel Virtual Machine, digital circuits
2	Larry Soulé, Anoop Gupta	An Evaluation of the Chandy-Misra-Bryant Algorithm for Digital Logic Simulation.	ACM Trans. Model. Comput. Simul.	1991	DBLP DOI BibTeX RDF	MIPS R6000
2	Larry Soulé, Anoop Gupta	Characterization of Parallelism and Deadlocks in Distributed Digital Logic Simulation.	DAC	1989	DBLP DOI BibTeX RDF
1	Sina Meraji, Carl Tropper	Optimizing Techniques for Parallel Digital Logic Simulation.	IEEE Trans. Parallel Distrib. Syst.	2012	DBLP DOI BibTeX RDF
1	Timothy Daryl Stanley	Using digital logic simulation as a teaching aid in discrete mathematics, hardware and operating systems, networking, computer organization and computer architecture: a workshop outline.	SIGITE Conference	2009	DBLP DOI BibTeX RDF	visualization, learning environment, logic simulation
1	Richard M. Salter, John L. Donaldson	Abstraction and extensibility in digital logic simulation software.	SIGCSE	2009	DBLP DOI BibTeX RDF	simulation, abstraction, logic design
1	David A. Poplawski, Zachary Kurmas	JLS: a pedagogically targeted logic design and simulation tool.	ITiCSE	2008	DBLP DOI BibTeX RDF	jls, simulation, digital logic
1	David A. Poplawski	A pedagogically targeted logic design and simulation tool.	WCAE	2007	DBLP DOI BibTeX RDF	logic simulation
1	Martin J. Johnson, Bob Craig	Computer Systems Pedagogy Using Digital Logic Simulation.	ICCE	2002	DBLP DOI BibTeX RDF
1	Michael A. Riepe, João P. Marques Silva, Karem A. Sakallah, Richard B. Brown	Ravel-XL: a hardware accelerator for assigned-delay compiled-code logic gate simulation.	IEEE Trans. VLSI Syst.	1996	DBLP DOI BibTeX RDF
1	S. Sundaram	Distributed Digital Logic Simulation on a Network of Workstations.	ICPP	1994	DBLP BibTeX RDF
1	Hitendra H. Desai	An Event Scheduling Technique for Digital Logic Simulation.	Int. Journal in Computer Simulation	1991	DBLP BibTeX RDF
1	Brian A. A. Antao, Jeffrey R. Cantwell, Arthur J. Brodersen, John R. Bourne	An advisory system for digital logic simulation.	IEA/AIE	1989	DBLP DOI BibTeX RDF
1	Ernst Ulrich	Table lookup techniques for fast and flexible digital logic simulation.	DAC	1980	DBLP DOI BibTeX RDF
1	Philip S. Wilcox	Digital logic simulation at the gate and functional level.	DAC	1979	DBLP BibTeX RDF
1	Ernest G. Ulrich	Non-integral event timing for digital logic simulation.	DAC	1976	DBLP DOI BibTeX RDF
1	Stephen A. Szygenda, Edward W. Thompson	Modeling and Digital Simulation for Design Verification and Diagnosis.	IEEE Trans. Computers	1976	DBLP DOI BibTeX RDF	digital logic simulation, Data structures, fault diagnosis, fault simulation, design verification, functional simulation
1	Cliff W. Hemming Jr., John M. Hemphill	Digital logic simulation models and evolving technology.	DAC	1975	DBLP BibTeX RDF
1	Stephen A. Szygenda, Anthony A. Lekkos	Integrated techniques for functional and gate-level digital logic simulation.	DAC	1973	DBLP BibTeX RDF