Search results for "dynamic voltage and frequency scaling"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Kihwan Choi, Ramakrishna Soma, Massoud Pedram	Dynamic voltage and frequency scaling based on workload decomposition.	ISLPED	2004	DBLP DOI BibTeX RDF	workload decomposition, dynamic voltage and frequency scaling
2	Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Memik, Robert P. Dick	User- and process-driven dynamic voltage and frequency scaling.	ISPASS	2009	DBLP DOI BibTeX RDF
2	Xin Huang, KenLi Li, RenFa Li	A Energy Efficient Scheduling Base on Dynamic Voltage and Frequency Scaling for Multi-core Embedded Real-Time System.	ICA3PP	2009	DBLP DOI BibTeX RDF	real-time, energy-efficiency, embedded, DVS, multi-core, leakage power, EDF
2	Edith Beigné, Fabien Clermidy, Sylvain Miermont, Pascal Vivet	Dynamic Voltage and Frequency Scaling Architecture for Units Integration within a GALS NoC.	NOCS	2008	DBLP DOI BibTeX RDF	Pausable clock, Vdd Hopping, Network-on-Chip, power, DVFS, GALS
2	Kenji Funaoka, Akira Takeda, Shinpei Kato, Nobuyuki Yamasaki	Dynamic voltage and frequency scaling for optimal real-time scheduling on multiprocessors.	SIES	2008	DBLP DOI BibTeX RDF
2	Wayne H. Cheng, Bevan M. Baas	Dynamic voltage and frequency scaling circuits with two supply voltages.	ISCAS	2008	DBLP DOI BibTeX RDF
2	Nobuaki Kobayashi, Tadayoshi Enomoto	A low power 90-nm CMOS motion estimation processor implementing dynamic voltage and frequency scaling (DVFS) and fast motion estimation algorithm.	ISCAS	2008	DBLP DOI BibTeX RDF
2	Arindam Mallik, Jack Cosgrove, Robert P. Dick, Gokhan Memik, Peter A. Dinda	PICSEL: measuring user-perceived performance to control dynamic frequency scaling.	ASPLOS	2008	DBLP DOI BibTeX RDF	thermal emergency, user-perceived performance, power management, dynamic voltage and frequency scaling
2	Kari Kolehmainen, Mika Hongisto, Teemu Kanstrén	Optimizing dynamic performance scaling for user interface performance.	Mobility Conference	2008	DBLP DOI BibTeX RDF	user interface latency, power management, performance measurement, dynamic voltage and frequency scaling
2	Min Yeol Lim, Vincent W. Freeh	Determining the Minimum Energy Consumption using Dynamic Voltage and Frequency Scaling.	IPDPS	2007	DBLP DOI BibTeX RDF
2	Karthik Baddam, Mark Zwolinski	Evaluation of Dynamic Voltage and Frequency Scaling as a Differential Power Analysis Countermeasure.	VLSI Design	2007	DBLP DOI BibTeX RDF
2	Jeabin Lee, Byeong-Gyu Nam, Seong-Jun Song, Namjun Cho, Hoi-Jun Yoo	A Power Management Unit with Continuous Co-Locking of Clock Frequency and Supply Voltage for Dynamic Voltage and Frequency Scaling.	ISCAS	2007	DBLP DOI BibTeX RDF
2	Somnath Paul, Sivasubramaniam Krishnamurthy, Hamid Mahmoodi, Swarup Bhunia	Low-overhead design technique for calibration of maximum frequency at multiple operating points.	ICCAD	2007	DBLP DOI BibTeX RDF	frequency calibration, voltage sensitivity, dynamic voltage and frequency scaling, ring oscillator
2	Takeshi Kitahara, Hiroyuki Hara, Shinichiro Shiratake, Yoshiki Tsukiboshi, Tomoyuki Yoda, Tetsuaki Utsumi, Fumihiro Minami	Low-power design methodology for module-wise dynamic voltage and frequency scaling with dynamic de-skewing systems.	ASP-DAC	2006	DBLP DOI BibTeX RDF
2	Yan Gu, Samarjit Chakraborty, Wei Tsang Ooi	Games are up for DVFS.	DAC	2006	DBLP DOI BibTeX RDF	graphics workload characterization, multimedia, animation, computer graphics, computer games, dynamic voltage and frequency scaling, power-aware design
2	Kihwan Choi, Ramakrishna Soma, Massoud Pedram	Fine-grained dynamic voltage and frequency scaling for precise energy and performance tradeoff based on the ratio of off-chip access to on-chip computation times.	IEEE Trans. on CAD of Integrated Circuits and Systems	2005	DBLP DOI BibTeX RDF
2	Christian Poellabauer, Leo Singleton, Karsten Schwan	Feedback-Based Dynamic Voltage and Frequency Scaling for Memory-Bound Real-Time Applications.	IEEE Real-Time and Embedded Technology and Applications Symposium	2005	DBLP DOI BibTeX RDF
2	Kihwan Choi, Ramakrishna Soma, Massoud Pedram	Off-chip latency-driven dynamic voltage and frequency scaling for an MPEG decoding.	DAC	2004	DBLP DOI BibTeX RDF	MPEG decoding, voltage and frequency scaling, low power
2	Kihwan Choi, Ramakrishna Soma, Massoud Pedram	Fine-Grained Dynamic Voltage and Frequency Scaling for Precise Energy and Performance Trade-Off Based on the Ratio of Off-Chip Access to On-Chip Computation Times.	DATE	2004	DBLP DOI BibTeX RDF
2	Kihwan Choi, Wonbok Lee, Ramakrishna Soma, Massoud Pedram	Dynamic voltage and frequency scaling under a precise energy model considering variable and fixed components of the system power dissipation.	ICCAD	2004	DBLP DOI BibTeX RDF
2	Greg Semeraro, Grigorios Magklis, Rajeev Balasubramonian, David H. Albonesi, Sandhya Dwarkadas, Michael L. Scott	Energy-Efficient Processor Design Using Multiple Clock Domains with Dynamic Voltage and Frequency Scaling.	HPCA	2002	DBLP DOI BibTeX RDF	Off-Line Analysis Tool, Dynamic Reconfiguration Algorithm, Low Power, Dynamic Voltage and Frequency Scaling, Multiple Clock Domain
2	Kihwan Choi, Karthik Dantu, Wei-Chung Cheng, Massoud Pedram	Frame-based dynamic voltage and frequency scaling for a MPEG decoder.	ICCAD	2002	DBLP DOI BibTeX RDF
2	Chung-Hsing Hsu, Ulrich Kremer	Dynamic Voltage and Frequency Scaling for Scientific Applications.	LCPC	2001	DBLP DOI BibTeX RDF
1	Carolina Albea, Diego Puschini, Pascal Vivet, Ivan Miro Panades, Edith Beigné, Suzanne Lesecq	Architecture and Robust Control of a Digital Frequency-Locked Loop for Fine-Grain Dynamic Voltage and Frequency Scaling in Globally Asynchronous Locally Synchronous Structures.	J. Low Power Electronics	2011	DBLP DOI BibTeX RDF
1	Pascal Vivet, Edith Beigné, Hugo Lebreton, Nacer-Eddine Zergainoh	On-line Power Optimization of Data Flow Multi-Core Architecture Based on Vdd-Hopping for Local Dynamic Voltage and Frequency Scaling.	J. Low Power Electronics	2011	DBLP DOI BibTeX RDF
1	Erik G. Larsson, Oscar Gustafsson	The Impact of Dynamic Voltage and Frequency Scaling on Multicore DSP Algorithm Design [Exploratory DSP].	IEEE Signal Process. Mag.	2011	DBLP DOI BibTeX RDF
1	Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie	An accurate model for soft error rate estimation considering dynamic voltage and frequency scaling effects.	Microelectronics Reliability	2011	DBLP DOI BibTeX RDF
1	Haiqing Nan, Kyung Ki Kim, Wei Wang 0029, Ken Choi	Dynamic Voltage and Frequency Scaling for Power- Constrained Design using Process Voltage and Temperature Sensor Circuits.	JIPS	2011	DBLP DOI BibTeX RDF
1	Yuto Hayamizu, Kazuo Goda, Miyuki Nakano, Masaru Kitsuregawa	Application-Aware Power Saving for Online Transaction Processing Using Dynamic Voltage and Frequency Scaling in a Multicore Environment.	ARCS	2011	DBLP DOI BibTeX RDF
1	Alice M. Tokarnia, Pedro C. F. Pepe, Leandro D. Pagotto	Path-Based Dynamic Voltage and Frequency Scaling Algorithms for Multiprocessor Embedded Applications with Soft Delay Deadlines.	DSD	2011	DBLP DOI BibTeX RDF
1	Florian Thoma, Michael Hübner, Diana Göhringer, Hasam Ümitcan Yilmaz, Jürgen Becker	Power and performance optimization through MPI supported dynamic voltage and frequency scaling.	MARC Symposium	2011	DBLP BibTeX RDF
1	Arun Rangasamy, Y. N. Srikant	Evaluation of dynamic voltage and frequency scaling for stream programs.	Conf. Computing Frontiers	2011	DBLP DOI BibTeX RDF
1	Kei Fujii, Hiroyuki Chishiro, Hiroki Matsutani, Nobuyuki Yamasaki	Dynamic Voltage and Frequency Scaling for Real-Time Scheduling on a Prioritized SMT Processor.	RTCSA	2011	DBLP DOI BibTeX RDF
1	Ying-Xun Lai, Yueh-Min Huang, Chin-Feng Lai, Ljiljana Trajkovic	Parallel Dynamic Voltage and Frequency Scaling for stream decoding using a multicore embedded system.	ISCAS	2011	DBLP DOI BibTeX RDF
1	Andrew B. Kahng, Vijayalakshmi Srinivasan	Big Chips.	IEEE Micro	2011	DBLP DOI BibTeX RDF	Big chips, dark silicon, network scalability, thermal design power, large-scale designs, field-programmable gate arrays, hardware accelerators, dynamic voltage and frequency scaling, 3D integration, physical synthesis, clock network synthesis
1	Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie, Saeed Safari	Reliability-Aware Dynamic Voltage and Frequency Scaling.	ISVLSI	2010	DBLP DOI BibTeX RDF
1	Kees G. W. Goossens, Dongrui She, Aleksandar Milutinovic, Anca Mariana Molnos	Composable Dynamic Voltage and Frequency Scaling and Power Management for Dataflow Applications.	DSD	2010	DBLP DOI BibTeX RDF
1	Xiaoxiao Zhang, Amine Bermak, Farid Boussaïd	Dynamic voltage and frequency scaling for low-power multi-precision reconfigurable multiplier.	ISCAS	2010	DBLP DOI BibTeX RDF
1	B. V. N. Silpa, Gummidipudi Krishnaiah, Preeti Ranjan Panda	Rank based dynamic voltage and frequency scaling fortiled graphics processors.	CODES+ISSS	2010	DBLP DOI BibTeX RDF
1	Georgios Keramidas, Vasileios Spiliopoulos, Stefanos Kaxiras	Interval-based models for run-time DVFS orchestration in superscalar processors.	Conf. Computing Frontiers	2010	DBLP DOI BibTeX RDF	performance and power modeling, superscalar out-of-order processors, dynamic voltage and frequency scaling
1	Sangyeun Cho, Rami G. Melhem	On the Interplay of Parallelization, Program Performance, and Energy Consumption.	IEEE Trans. Parallel Distrib. Syst.	2010	DBLP DOI BibTeX RDF	energy-delay product (EDP), Multicore processor, dynamic voltage and frequency scaling (DVFS), Amdahl's law
1	Rong Ge, Xizhou Feng, Shuaiwen Song, Hung-Ching Chang, Dong Li, Kirk W. Cameron	PowerPack: Energy Profiling and Analysis of High-Performance Systems and Applications.	IEEE Trans. Parallel Distrib. Syst.	2010	DBLP DOI BibTeX RDF	CMP-based cluster, system tools, Distributed system, energy efficiency, power management, dynamic voltage and frequency scaling, power measurement
1	Cristinel Ababei	Network on chip design and optimization using specialized influence models.	DAC	2010	DBLP DOI BibTeX RDF	VFI design style, optimization, network on chip, influence model
1	Ryan Cochran, Sherief Reda	Consistent runtime thermal prediction and control through workload phase detection.	DAC	2010	DBLP DOI BibTeX RDF	proactive control, thermal prediction, thermal sensing, workload phase, DVFS, multicore systems
1	Pramod Subramanyan, Virendra Singh, Kewal K. Saluja, Erik Larsson	Energy-efficient redundant execution for chip multiprocessors.	ACM Great Lakes Symposium on VLSI	2010	DBLP DOI BibTeX RDF	redundant execution, microarchitecture, transient faults, permanent faults
1	Yasuko Watanabe, John D. Davis, David A. Wood	WiDGET: Wisconsin decoupled grid execution tiles.	ISCA	2010	DBLP DOI BibTeX RDF	instruction steering, power proportional computing, performance, hardware, power efficiency
1	Jungseob Lee, Chi-Chao Wang, Hamid Reza Ghasemi, Lloyd Bircher, Yu Cao, Nam Sung Kim	Workload-adaptive process tuning strategy for power-efficient multi-core processors.	ISLPED	2010	DBLP DOI BibTeX RDF	process parameter tuning, DVFS, multi-core processor
1	Yohei Nakata, Shunsuke Okumura, Hiroshi Kawaguchi, Masahiko Yoshimoto	0.5-V operation variation-aware word-enhancing cache architecture using 7T/14T hybrid SRAM.	ISLPED	2010	DBLP DOI BibTeX RDF	fine-grain control, low power, cache memory, microarchitecture, variation, low voltage
1	Jaehyun Park, Donghwa Shin, Naehyuck Chang, Massoud Pedram	Accurate modeling and calculation of delay and energy overheads of dynamic voltage scaling in modern high-performance microprocessors.	ISLPED	2010	DBLP DOI BibTeX RDF	DVS overhead model, PLL, DVFS, DC-DC converter
1	Carlos Santana, Julius C. B. Leite, Daniel Mossé	Load forecasting applied to soft real-time web clusters.	SAC	2010	DBLP DOI BibTeX RDF	web server cluster, QoS, power management, energy consumption, dynamic configuration, load forecasting
1	Asit K. Mishra, Shekhar Srikantaiah, Mahmut T. Kandemir, Chita R. Das	Coordinated power management of voltage islands in CMPs.	SIGMETRICS	2010	DBLP DOI BibTeX RDF	chip multiprocessors (CMP), control theory, GALs, DVFs
1	Aisha Bushager, Mark Zwolinski	Modelling Smart Card Security Protocols in SystemC TLM.	EUC	2010	DBLP DOI BibTeX RDF
1	Weihuang Wang, Euncheol Kim, Kiran K. Gunnam, Gwan S. Choi	Low-Power VLSI Design of LDPC Decoder Using Dynamic Voltage and Frequency Scaling for Additive White Gaussian Noise Channels.	J. Low Power Electronics	2009	DBLP DOI BibTeX RDF
1	Dejan Raskovic, David Giessel	Dynamic Voltage and Frequency Scaling For On-Demand Performance and Availability of Biomedical Embedded Systems.	IEEE Transactions on Information Technology in Biomedicine	2009	DBLP DOI BibTeX RDF
1	Marius Gligor, Nicolas Fournel, Frédéric Pétrot	Adaptive Dynamic Voltage and Frequency Scaling Algorithm for Symmetric Multiprocessor Architecture.	DSD	2009	DBLP DOI BibTeX RDF
1	Shaobo Liu, Meikang Qiu	A Discrete Dynamic Voltage and Frequency Scaling Algorithm Based on Task Graph Unrolling for Multiprocessor System.	ScalCom-EmbeddedCom	2009	DBLP DOI BibTeX RDF
1	Xia Zhao, Yao Guo, Xiangqun Chen	Transaction-based adaptive dynamic voltage scaling for interactive applications.	ISLPED	2009	DBLP DOI BibTeX RDF	scheduling, interaction, dynamic voltage and frequency scaling
1	Omer Khan, Sandip Kundu	Predictive Thermal Management for Chip Multiprocessors Using Co-designed Virtual Machines.	HiPEAC	2009	DBLP DOI BibTeX RDF	Dynamic Thermal Management (DTM), Virtual Thermal Manager (VTM), Dynamic Voltage and Frequency Scaling (DVFS)
1	Yu-Wei Yang, Katherine Shu-Min Li	Temperature-aware dynamic frequency and voltage scaling for reliability and yield enhancement.	ASP-DAC	2009	DBLP DOI BibTeX RDF
1	Min Bao, Alexandru Andrei, Petru Eles, Zebo Peng	On-line thermal aware dynamic voltage scaling for energy optimization with frequency/temperature dependency consideration.	DAC	2009	DBLP DOI BibTeX RDF	voltage/frequency scaling, energy, temperature dependency
1	Siddharth Garg, Diana Marculescu, Radu Marculescu, Ümit Y. Ogras	Technology-driven limits on DVFS controllability of multiple voltage-frequency island designs: a system-level perspective.	DAC	2009	DBLP DOI BibTeX RDF	Networks-on-Chip, power management, performance bounds
1	Jungseob Lee, Nam Sung Kim	Optimizing throughput of power- and thermal-constrained multicore processors using DVFS and per-core power-gating.	DAC	2009	DBLP DOI BibTeX RDF	multicore processor, DVFS, power gating
1	JaeHwan Kim, SungHwan Park, Jong-Wha Chong	Peak power control algorithm for multi-processor SoC.	ICUIMC	2009	DBLP DOI BibTeX RDF	peak power control, low power, multi-core, task scheduling
1	Krishna K. Rangan, Gu-Yeon Wei, David Brooks	Thread motion: fine-grained power management for multi-core systems.	ISCA	2009	DBLP DOI BibTeX RDF	multi-core power management, thread motion, dvfs
1	Jinho Suh, Michel Dubois	Dynamic MIPS rate stabilization in out-of-order processors.	ISCA	2009	DBLP DOI BibTeX RDF	ooo processors, real-time systems, embedded systems, stabilization, variability
1	Yefu Wang, Kai Ma, Xiaorui Wang	Temperature-constrained power control for chip multiprocessors with online model estimation.	ISCA	2009	DBLP DOI BibTeX RDF	power management, chip multiprocessor, feedback control
1	Thidapat Chantem, Xiaobo Sharon Hu, Robert P. Dick	Online work maximization under a peak temperature constraint.	ISLPED	2009	DBLP DOI BibTeX RDF	temperature-constraint optimization, performance, reliability, DVFS
1	Seungrok Jung, Jungsoo Kim, Sangkwon Na, Chong-Min Kyung	Energy-aware instruction-set customization for real-time embedded multiprocessor systems.	ISLPED	2009	DBLP DOI BibTeX RDF	DVFS, instruction set extensions, configurable processors
1	Noriko Takagi, Hiroshi Sasaki, Masaaki Kondo, Hiroshi Nakamura	Cooperative shared resource access control for low-power chip multiprocessors.	ISLPED	2009	DBLP DOI BibTeX RDF	low power, chip multiprocessors, cache partitioning, dvfs, resource conflict
1	Asit K. Mishra, Reetuparna Das, Soumya Eachempati, Ravishankar R. Iyer, Narayanan Vijaykrishnan, Chita R. Das	A case for dynamic frequency tuning in on-chip networks.	MICRO	2009	DBLP DOI BibTeX RDF
1	Efraim Rotem, Avi Mendelson, Ran Ginosar, Uri C. Weiser	Multiple clock and voltage domains for chip multi processors.	MICRO	2009	DBLP DOI BibTeX RDF	clock domains, voltage domain, power management, DVFS, chip multi processor
1	Zhenwei Cao, Layne T. Watson, Kirk W. Cameron, Rong Ge	A power aware study for VTDIRECT95 using DVFS.	SpringSim	2009	DBLP DOI BibTeX RDF	VTDIRECT95, theoretical bound, high performance computing, power consumption, DVFS
1	Mu-Kai Huang, J. Morris Chang, Wei-Mei Chen	Grouping-Based Dynamic Power Management for Multi-threaded Programs in Chip-Multiprocessors.	CSE	2009	DBLP DOI BibTeX RDF
1	Jungsoo Kim, Seungyong Oh, Sungjoo Yoo, Chong-Min Kyung	An Analytical Dynamic Scaling of Supply Voltage and Body Bias Based on Parallelism-Aware Workload and Runtime Distribution.	IEEE Trans. on CAD of Integrated Circuits and Systems	2009	DBLP DOI BibTeX RDF
1	Youngjin Cho, Younghyun Kim, Yongsoo Joo, Kyungsoo Lee, Naehyuck Chang	Simultaneous optimization of battery-aware voltage regulator scheduling with dynamic voltage and frequency scaling.	ISLPED	2008	DBLP DOI BibTeX RDF
1	Niranjan Soundararajan, Narayanan Vijaykrishnan, Anand Sivasubramaniam	Impact of dynamic voltage and frequency scaling on the architectural vulnerability of GALS architectures.	ISLPED	2008	DBLP DOI BibTeX RDF
1	Mahmoud Abdel-Fattah, Khaled El-Ayat	Limits of Dynamic Voltage and Frequency Scaling Algorithms.	CDES	2008	DBLP BibTeX RDF
1	Arun Rangasamy, Rahul Nagpal, Y. N. Srikant	Compiler-directed frequency and voltage scaling for a multiple clock domain microarchitecture.	Conf. Computing Frontiers	2008	DBLP DOI BibTeX RDF	dvs, dynamic energy, energy, multiple clock domains
1	Omer Khan, Sandip Kundu	A framework for predictive dynamic temperature management of microprocessor systems.	ICCAD	2008	DBLP DOI BibTeX RDF
1	Matthew Curtis-Maury, Ankur Shah, Filip Blagojevic, Dimitrios S. Nikolopoulos, Bronis R. de Supinski, Martin Schulz	Prediction models for multi-dimensional power-performance optimization on many cores.	PACT	2008	DBLP DOI BibTeX RDF	dynamic concurrency throttling
1	Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Eugene Gorbatov, Howard David, Zhao Zhang	Software thermal management of dram memory for multicore systems.	SIGMETRICS	2008	DBLP DOI BibTeX RDF	thermal management, DRAM memories
1	Parth Malani, Prakash Mukre, Qinru Qiu, Qing Wu	Adaptive Scheduling and Voltage Scaling for Multiprocessor Real-time Applications with Non-deterministic Workload.	DATE	2008	DBLP DOI BibTeX RDF
1	David Wolpert, Paul Ampadu	A Low-Power Safety Mode for Variation Tolerant Systems-on-Chip.	DFT	2008	DBLP DOI BibTeX RDF
1	Sebastien Bilavarn, Cécile Belleudy, Michel Auguin, T. Dupont, Anne-Marie Fouilliart	Embedded Multicore Implementation of a H.264 Decoder with Power Management Considerations.	DSD	2008	DBLP DOI BibTeX RDF
1	Andrea Marongiu, Luca Benini, Andrea Acquaviva, Andrea Bartolini	Analysis of Power Management Strategies for a Large-Scale SoC Platform in 65nm Technology.	DSD	2008	DBLP DOI BibTeX RDF
1	Wonyoung Kim, Meeta Sharma Gupta, Gu-Yeon Wei, David Brooks	System level analysis of fast, per-core DVFS using on-chip switching regulators.	HPCA	2008	DBLP DOI BibTeX RDF
1	Ping Zhu, Fumin Yang, Gang Tu, Wei Luo	Fault-Tolerant Scheduling for Periodic Tasks based on DVFS.	ICYCS	2008	DBLP DOI BibTeX RDF
1	Takayuki Imada, Mitsuhisa Sato, Yoshihiko Hotta, Hideaki Kimura	Power management of distributed web savers by controlling server power state and traffic prediction for QoS.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Dong Li, Hung-Ching Chang, Hari K. Pyla, Kirk W. Cameron	System-level, thermal-aware, fully-loaded process scheduling.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Alex Shye, Yan Pan, Benjamin Scholbrock, J. Scott Miller, Gokhan Memik, Peter A. Dinda, Robert P. Dick	Power to the people: Leveraging human physiological traits to control microprocessor frequency.	MICRO	2008	DBLP DOI BibTeX RDF
1	Wen-Yew Liang, Shih-Chang Chen, Yang-Lang Chang, Jyh-Perng Fang	Memory-Aware Dynamic Voltage and Frequency Prediction for Portable Devices.	RTCSA	2008	DBLP DOI BibTeX RDF
1	Stefan Valentin Gheorghita, Twan Basten, Henk Corporaal	Application Scenarios in Streaming-Oriented Embedded-System Design.	IEEE Design & Test of Computers	2008	DBLP DOI BibTeX RDF
1	Changjiu Xian, Yung-Hsiang Lu, Zhiyuan Li	Dynamic Voltage Scaling for Multitasking Real-Time Systems With Uncertain Execution Time.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Wonbok Lee, Kimish Patel, Massoud Pedram	GOP-Level Dynamic Thermal Management in MPEG-2 Decoding.	IEEE Trans. VLSI Syst.	2008	DBLP DOI BibTeX RDF
1	Joël Goossens, Dragomir Milojevic, Vincent Nélis	Power-Aware Real-Time Scheduling upon Dual CPU Type Multiprocessor Platforms.	OPODIS	2008	DBLP DOI BibTeX RDF
1	Bren Mochocki, Dinesh Rajan, Xiaobo Sharon Hu, Christian Poellabauer, Kathleen Otten, Thidapat Chantem	Network-Aware Dynamic Voltage and Frequency Scaling.	IEEE Real-Time and Embedded Technology and Applications Symposium	2007	DBLP DOI BibTeX RDF
1	Bin Lin, Arindam Mallik, Peter A. Dinda, Gokhan Memik, Robert P. Dick	Power reduction through measurement and modeling of users and CPUs: summary.	SIGMETRICS	2007	DBLP DOI BibTeX RDF	process-driven voltage scaling (PDVS), user-driven frequency scaling (UDFS), dynamic voltage and frequency scaling (DVFS)
1	Hiroshi Sasaki, Yoshimichi Ikeda, Masaaki Kondo, Hiroshi Nakamura	An intra-task dvfs technique based on statistical analysis of hardware events.	Conf. Computing Frontiers	2007	DBLP DOI BibTeX RDF	statistical analysis, performance estimation, DVFS, hardware performance counters
1	Weihuang Wang, Gwan Choi	Minimum-energy LDPC decoder for real-time mobile application.	DATE	2007	DBLP DOI BibTeX RDF
1	Byeong-Gyu Nam, Jeabin Lee, Kwanho Kim, Seungjin Lee, Hoi-Jun Yoo	A low-power handheld GPU using logarithmic arithmetic and triple DVFS power domains.	Graphics Hardware	2007	DBLP DOI BibTeX RDF	handheld systems, low-power, GPU, hardware architecture, 3D computer graphics