Search results for "formal property verification"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Limor Fix	Fifteen Years of Formal Property Verification in Intel.	25 Years of Model Checking	2008	DBLP DOI BibTeX RDF	formal property verification, Model checking, formal specification
2	Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan	Property Refinement Techniques for Enhancing Coverage of Formal Property Verification.	VLSI Design	2004	DBLP DOI BibTeX RDF
2	Thomas Schubert	High level formal verification of next-generation microprocessors.	DAC	2003	DBLP DOI BibTeX RDF	formal property verification
1	Rajeev K. Ranjan, Claudionor Coelho, Sebastian Skalberg	Beyond verification: leveraging formal for debugging.	DAC	2009	DBLP DOI BibTeX RDF	behavioral indexing, post-silicon debugging, traceless debugging, formal verification, debugging, property verification
1	Aritra Hazra, Priyankar Ghosh, Pallab Dasgupta, Partha Pratim Chakrabarti	Inline Assertions - Embedding Formal Properties in a Test Bench.	VLSI Design	2009	DBLP DOI BibTeX RDF
1	Aritra Hazra, Ansuman Banerjee, Srobona Mitra, Pallab Dasgupta, Partha Pratim Chakrabarti, Chunduri Rama Mohan	Cohesive Coverage Management for Simulation and Formal Property Verification.	ISVLSI	2008	DBLP DOI BibTeX RDF
1	Robert Beers	Pre-RTL formal verification: an intel experience.	DAC	2008	DBLP DOI BibTeX RDF	TLC, explicit state enumeration, microarchitecture verification, formal verification, protocol verification, TLA+
1	Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Tobias Kirsten, Volker Schönknecht, Stephan Reitemeyer	Verification of Temporal Properties in Automotive Embedded Software.	DATE	2008	DBLP DOI BibTeX RDF
1	Ansuman Banerjee, Kausik Datta, Pallab Dasgupta	CheckSpec: A Tool for Consistency and Coverage Analysis of Assertion Specifications.	ATVA	2008	DBLP DOI BibTeX RDF
1	Daher Kaiss, Marcelo Skaba, Ziyad Hanna, Zurab Khasidashvili	Industrial Strength SAT-based Alignability Algorithm for Hardware Equivalence Verification.	FMCAD	2007	DBLP DOI BibTeX RDF
1	Prasenjit Basu, Sayantan Das, Ansuman Banerjee, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix, Roy Armoni	Design-Intent Coverage - A New Paradigm for Formal Property Verification.	IEEE Trans. on CAD of Integrated Circuits and Systems	2006	DBLP DOI BibTeX RDF
1	Prasenjit Basu, Sayantan Das, Pallab Dasgupta, Partha Pratim Chakrabarti	Discovering the input assumptions in specification refinement coverage.	ASP-DAC	2006	DBLP DOI BibTeX RDF
1	Sayantan Das, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti	What lies between design intent coverage and model checking?	DATE	2006	DBLP DOI BibTeX RDF
1	Rémi Douence, Didier Le Botlan, Jacques Noyé, Mario Südholt	Concurrent aspects.	GPCE	2006	DBLP DOI BibTeX RDF	Java, concurrency, formal verification, aspect-oriented programming, implementation
1	Zurab Khasidashvili, Marcelo Skaba, Daher Kaiss, Ziyad Hanna	Post-reboot Equivalence and Compositional Verification of Hardware.	FMCAD	2006	DBLP DOI BibTeX RDF
1	Prosenjit Chatterjee	Streamline verification process with formal property verification to meet highly compressed design cycle.	DAC	2005	DBLP DOI BibTeX RDF	formal verification
1	Sayantan Das, Ansuman Banerjee, Prasenjit Basu, Pallab Dasgupta, P. P. Chakrabarti, Chunduri Rama Mohan, Limor Fix	Formal Methods for Analyzing the Completeness of an Assertion Suite against a High-Level Fault Model.	VLSI Design	2005	DBLP DOI BibTeX RDF
1	Freddy Y. C. Mang, Pei-Hsin Ho	Abstraction refinement by controllability and cooperativeness analysis.	DAC	2004	DBLP DOI BibTeX RDF	formal verification, controllability, cooperativeness, abstraction refinement
1	Pei-Hsin Ho	Abstraction Refinement.	ATVA	2004	DBLP DOI BibTeX RDF
1	Dong Wang, Pei-Hsin Ho, Jiang Long, James H. Kukula, Yunshan Zhu, Hi-Keung Tony Ma, Robert F. Damiano	Formal Property Verification by Abstraction Refinement with Formal, Simulation and Hybrid Engines.	DAC	2001	DBLP DOI BibTeX RDF
1	Gérard Berry	Synchronous Programming Techniques for Embedded Systems: Present and Future.	EMSOFT	2001	DBLP DOI BibTeX RDF
1	Rob Gerth	Model Checking if Your Life Depends on It a View from Intel's Trenches.	SPIN	2001	DBLP DOI BibTeX RDF