Search results for "hardware multitasking"

Found 13 publication records. Showing 13 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Jose Antonio Valero, Julio Septién, Daniel Mozos, Hortensia Mecha	3D FPGA resource management and fragmentation metric for hardware multitasking.	IPDPS	2009	DBLP DOI BibTeX RDF
2	Julio Septién, Hortensia Mecha, Daniel Mozos, Jesús Tabero	2D defragmentation heuristics for hardware multitasking on reconfigurable devices.	IPDPS	2006	DBLP DOI BibTeX RDF
1	Krzysztof Jozwik, Hiroyuki Tomiyama, Shinya Honda, Hiroaki Takada	A Novel Framework for Effective Preemptive Hardware Multitasking on FPGAs.	IEICE Transactions	2012	DBLP BibTeX RDF
1	Xabier Iturbe, Khaled Benkrid, Tughrul Arslan, Raul Torrego, Imanol Martinez	Methods and Mechanisms for Hardware Multitasking: Executing and Synchronizing Fully Relocatable Hardware Tasks in Xilinx FPGAs.	FPL	2011	DBLP DOI BibTeX RDF	Hardware Abstraction, Inter-task Communication and Syncronization, Reconfigurable Computing, Reconfigurable Hardware
1	Krzysztof Jozwik, Hiroyuki Tomiyama, Masato Edahiro, Shinya Honda, Hiroaki Takada	Rainbow: An OS Extension for Hardware Multitasking on Dynamically Partially Reconfigurable FPGAs.	ReConFig	2011	DBLP DOI BibTeX RDF
1	S. Roman, Hortensia Mecha, Daniel Mozos, Julio Septién	Constant complexity scheduling for hardware multitasking in two dimensional reconfigurable field-programmable gate arrays.	IET Computers & Digital Techniques	2008	DBLP DOI BibTeX RDF
1	Javier Resano, Juan Antonio Clemente, Carlos González, Daniel Mozos, Francky Catthoor	Efficiently scheduling runtime reconfigurations.	ACM Trans. Design Autom. Electr. Syst.	2008	DBLP DOI BibTeX RDF	hardware multitasking, runtime/design-time scheduling, FPGAs, Reconfigurable architectures
1	Juan Antonio Clemente, Carlos González, Javier Resano, Daniel Mozos	A Hardware Task-Graph Scheduler for Reconfigurable Multi-tasking Systems.	ReConFig	2008	DBLP DOI BibTeX RDF	Hardware multitasking, FPGAs, Reconfigurable architectures, Task scheduling
1	Julio Septién, Daniel Mozos, Hortensia Mecha, Jesús Tabero, Miguel Angel García de Dios	Perimeter quadrature-based metric for estimating FPGA fragmentation in 2D HW multitasking.	IPDPS	2008	DBLP DOI BibTeX RDF
1	Sara Román Navarro, Hortensia Mecha, Daniel Mozos, Julio Septién	Partition Based Dynamic 2D HW Multitasking Management.	DSD	2006	DBLP DOI BibTeX RDF
1	Sara Román Navarro, Julio Septién, Hortensia Mecha, Daniel Mozos	Constant Complexity Management of 2D HW Multitasking in Run-Time Reconfigurable FPGAs.	ARC	2006	DBLP DOI BibTeX RDF
1	Jesús Tabero, Julio Septién, Hortensia Mecha, Daniel Mozos	A Low Fragmentation Heuristic for Task Placement in 2D RTR HW Management.	FPL	2004	DBLP DOI BibTeX RDF
1	E.-L. Bohnen	Ein Multi- Mini- Prozessor- Konzept mit Hardware- Multitasking.	ARCS	1974	DBLP DOI BibTeX RDF