Search results for "hardware performance counters"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	Leif Uhsadel, Andy Georges, Ingrid Verbauwhede	Exploiting Hardware Performance Counters.	FDTC	2008	DBLP DOI BibTeX RDF
2	Vincent M. Weaver, Sally A. McKee	Can hardware performance counters be trusted?	IISWC	2008	DBLP DOI BibTeX RDF
2	Roberto Araiza, Maria Gabriela Aguilera, Thientam Pham, Patricia J. Teller	Towards a cross-platform microbenchmark suite for evaluating hardware performance counter data.	Richard Tapia Celebration of Diversity in Computing Conference	2005	DBLP DOI BibTeX RDF	hardware performance counters, microbenchmarks
2	Mauricio Pillon, Olivier Richard, Georges Da Costa	DRAC: Adaptive Control System with Hardware Performance Counters.	Euro-Par	2004	DBLP DOI BibTeX RDF
2	Christophe Cérin, Hazem Fkaier, Mohamed Jemni	Accessing Hardware Performance Counters in order to Measure the Influence of Cache on the Performance of Integer Sorting.	IPDPS	2003	DBLP DOI BibTeX RDF
2	Nils Smeds	OpenMP Application Tuning Using Hardware Performance Counters.	WOMPAT	2002	DBLP DOI BibTeX RDF
2	Rolf Rabenseifner	Automatic Profiling of MPI Applications with Hardware Performance Counters.	PVM/MPI	1999	DBLP DOI BibTeX RDF
1	Jia Rao, Cheng-Zhong Xu	Online Capacity Identification of Multitier Websites Using Hardware Performance Counters.	IEEE Trans. Parallel Distrib. Syst.	2011	DBLP DOI BibTeX RDF	Multitier website, machine learning, hardware performance counter
1	Joseph L. Greathouse, Zhiqiang Ma, Matthew I. Frank, Ramesh Peri, Todd M. Austin	Demand-driven software race detection using hardware performance counters.	ISCA	2011	DBLP DOI BibTeX RDF
1	Michael Kuperberg, Ralf Reussner	Analysing the fidelity of measurements performed with hardware performance counters.	ICPE	2011	DBLP DOI BibTeX RDF
1	Sunpyo Hong, Hyesoon Kim	An integrated GPU power and performance model.	ISCA	2010	DBLP DOI BibTeX RDF	GPU architecture, performance, energy, analytical model, CUDA, power estimation
1	Oren Laadan, Nicolas Viennot, Jason Nieh	Transparent, lightweight application execution replay on commodity multiprocessor operating systems.	SIGMETRICS	2010	DBLP DOI BibTeX RDF	record-replay, fault-tolerance, debugging, virtualization
1	David K. Tam, Reza Azimi, Livio Soares, Michael Stumm	RapidMRC: approximating L2 miss rate curves on commodity systems for online optimizations.	ASPLOS	2009	DBLP DOI BibTeX RDF	miss rate curve, performance monitoring unit, shared cache management, chip multiprocessor, dynamic optimization, multicore processor, shared cache, cache management, cache partitioning, hardware performance counters, online optimization
1	John Cieslewicz, William Mee, Kenneth A. Ross	Cache-conscious buffering for database operators with state.	DaMoN	2009	DBLP DOI BibTeX RDF
1	Shih-wei Liao, Tzu-Han Hung, Donald Nguyen, Hucheng Zhou, Chinyen Chou, Chia-Heng Tu	Prefetch optimizations on large-scale applications via parameter value prediction.	ICS	2009	DBLP DOI BibTeX RDF	data center applications, machine learning
1	Shih-wei Liao, Tzu-Han Hung, Donald Nguyen, Chinyen Chou, Chia-Heng Tu, Hucheng Zhou	Machine learning-based prefetch optimization for data center applications.	SC	2009	DBLP DOI BibTeX RDF
1	Pingjing Lu, Yonggang Che, Zhenghua Wang	A Framework for Effective Memory Optimization of High Performance Computing Applications.	HPCC	2009	DBLP DOI BibTeX RDF
1	Dmitrijs Zaparanuks, Milan Jovic, Matthias Hauswirth	Accuracy of performance counter measurements.	ISPASS	2009	DBLP DOI BibTeX RDF
1	Heinz Bast	Parallelism in Current and Future Processors - Challenges and Support for Designing Optimal Algorithms.	SEA	2009	DBLP DOI BibTeX RDF
1	Jia Rao, Cheng-Zhong Xu	Online Measurement of the Capacity of Multi-Tier Websites Using Hardware Performance Counters.	ICDCS	2008	DBLP DOI BibTeX RDF
1	Joefon Jann, R. Sarma Burugula, Niteesh Dubey, Pratap Pattnaik	End-to-end performance of commercial applications in the face of changing hardware.	Operating Systems Review	2008	DBLP DOI BibTeX RDF	AIX, POWER5+, POWER6, WebSphere
1	Yunzhi Xue, Chen Zhao	Automated Phase-Ordering of Loop Optimizations Based on Polyhedron Model.	HPCC	2008	DBLP DOI BibTeX RDF
1	Juan Carlos Saez, José Ignacio Gómez, Manuel Prieto	Improving Priority Enforcement via Non-Work-Conserving Scheduling.	ICPP	2008	DBLP DOI BibTeX RDF
1	Arkaitz Ruiz-Alvarez, Kim M. Hazelwood	Evaluating the impact of dynamic binary translation systems on hardware cache performance.	IISWC	2008	DBLP DOI BibTeX RDF
1	Livio Soares, David K. Tam, Michael Stumm	Reducing the harmful effects of last-level cache polluters with an OS-level, software-only pollute buffer.	MICRO	2008	DBLP DOI BibTeX RDF
1	Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K. Jha	System-Level Dynamic Thermal Management for High-Performance Microprocessors.	IEEE Trans. on CAD of Integrated Circuits and Systems	2008	DBLP DOI BibTeX RDF
1	Holger Mickler, Andreas Knüpfer, Michael Kluge, Matthias S. Müller, Wolfgang E. Nagel	Trace-Based Analysis and Optimization for the Semtex CFD Application - Hidden Remote Memory Accesses and I/O Performance.	Euro-Par Workshops	2008	DBLP DOI BibTeX RDF	Performance Analysis, Tracing, I/O, Remote Memory Access
1	Vincent M. Weaver, Sally A. McKee	Using Dynamic Binary Instrumentation to Generate Multi-platform SimPoints: Methodology and Accuracy.	HiPEAC	2008	DBLP DOI BibTeX RDF
1	Hiroshi Sasaki, Yoshimichi Ikeda, Masaaki Kondo, Hiroshi Nakamura	An intra-task dvfs technique based on statistical analysis of hardware events.	Conf. Computing Frontiers	2007	DBLP DOI BibTeX RDF	statistical analysis, performance estimation, DVFS, hardware performance counters
1	David K. Tam, Reza Azimi, Michael Stumm	Thread clustering: sharing-aware scheduling on SMP-CMP-SMT multiprocessors.	EuroSys	2007	DBLP DOI BibTeX RDF	cache behavior, detecting sharing, performance monitoring unit, single-chip multiprocessors, thread placement, resource allocation, CMP, multithreading, sharing, SMP, simultaneous multithreading, SMT, shared caches, cache locality, thread scheduling, thread migration, hardware performance monitors, hardware performance counters, affinity scheduling
1	Martin Hirzel	Data layouts for object-oriented programs.	SIGMETRICS	2007	DBLP DOI BibTeX RDF	GC, cache, data placement, spatial locality, data layout, TLB, hardware performance counters, memory subsystem
1	Dohun Kim, Jugwan Eom, Chanik Park	L4oprof: a performance-monitoring-unit-based software-profiling framework for the L4 microkernel.	Operating Systems Review	2007	DBLP DOI BibTeX RDF
1	Qin Zhao, Rodric M. Rabbah, Saman P. Amarasinghe, Larry Rudolph, Weng-Fai Wong	Ubiquitous Memory Introspection.	CGO	2007	DBLP DOI BibTeX RDF
1	Jaydeep Marathe, Frank Mueller	Source-Code-Correlated Cache Coherence Characterization of OpenMP Benchmarks.	IEEE Trans. Parallel Distrib. Syst.	2007	DBLP DOI BibTeX RDF	simulation, Cache memories, SMPs, program instrumentation, coherence protocols, dynamic binary rewriting
1	Jugwan Eom, Dohun Kim, Chanik Park	L4oprof: A System-Wide Profiler Using Hardware PMU in L4 Environment.	ICESS	2007	DBLP DOI BibTeX RDF	L4 microkernel, statistical profiling, hardware PMU, performance analysis, performance measures, performance monitoring
1	Matthew Curtis-Maury, James Dzierwa, Christos D. Antonopoulos, Dimitrios S. Nikolopoulos	Online power-performance adaptation of multithreaded programs using hardware event-based prediction.	ICS	2006	DBLP DOI BibTeX RDF	online adaptation, performance prediction, power-aware computing, hardware performance counters
1	Stijn Eyerman, Lieven Eeckhout, Tejas Karkhanis, James E. Smith	A performance counter architecture for computing accurate CPI components.	ASPLOS	2006	DBLP DOI BibTeX RDF	hardware performance counter architecture, superscalar processor performance modeling
1	Amit Kumar 0002, Li Shang, Li-Shiuan Peh, Niraj K. Jha	HybDTM: a coordinated hardware-software approach for dynamic thermal management.	DAC	2006	DBLP DOI BibTeX RDF	hybrid hardware-software management, thermal model, dynamic thermal management
1	Philip Mucci, Shirley Moore	PAPI users group - PAPI users group.	SC	2006	DBLP DOI BibTeX RDF
1	Walter Binder, Jarle Hulaas, Philippe Moret	A Quantitative Evaluation of the Contribution of Native Code to Java Workloads.	IISWC	2006	DBLP DOI BibTeX RDF
1	Matthew Curtis-Maury, Dimitrios S. Nikolopoulos, Christos D. Antonopoulos	PACMAN: A PerformAnce Counters MANager for Intel Hyperthreaded Processors.	QEST	2006	DBLP DOI BibTeX RDF
1	Tong Li, Alvin R. Lebeck, Daniel J. Sorin	Spin Detection Hardware for Improved Management of Multithreaded Systems.	IEEE Trans. Parallel Distrib. Syst.	2006	DBLP DOI BibTeX RDF	multithreaded system, scheduling, synchronization, virtualization, multiprocessor, Deadlock, spinning, performance counter, livelock
1	U. Andersson, P. Mucci	Analysis and Optimization of Yee_Bench Using Hardware Performance Counters.	PARCO	2005	DBLP BibTeX RDF
1	Gilberto Contreras, Margaret Martonosi	Power prediction for intel XScale processors using performance monitoring unit events.	ISLPED	2005	DBLP DOI BibTeX RDF	XScale, power estimation, power modeling, hardware performance counters
1	Reza Azimi, Michael Stumm, Robert W. Wisniewski	Online performance analysis by statistical sampling of microprocessor performance counters.	ICS	2005	DBLP DOI BibTeX RDF
1	Erez Perelman, Trishul M. Chilimbi, Brad Calder	Variational Path Profiling.	IEEE PACT	2005	DBLP DOI BibTeX RDF
1	Andrew Over, Peter E. Strazdins, Bill Clarke	Cycle Accurate Memory Modelling: A Case-Study in Validation.	MASCOTS	2005	DBLP DOI BibTeX RDF
1	Canturk Isci, Alper Buyuktosunoglu, Margaret Martonosi	Long-Term Workload Phases: Duration Predictions and Applications to DVFS.	IEEE Micro	2005	DBLP DOI BibTeX RDF	Adaptive dynamic management, workload behavior, duration predictions, prediction techniques, DVFS, performance counters
1	David G. Richardson, Werner Krandick	Compiler-Enforced Memory Semantics in the SACLIB Computer Algebra Library.	CASC	2005	DBLP DOI BibTeX RDF
1	Florian T. Schneider, Thomas R. Gross	Using Platform-Specific Performance Counters for Dynamic Compilation.	LCPC	2005	DBLP DOI BibTeX RDF
1	Gilberto Contreras, Margaret Martonosi, Jinzhan Peng, Roy Ju, Guei-Yuan Lueh	XTREM: a power simulator for the Intel XScale® core.	LCTES	2004	DBLP DOI BibTeX RDF	XORP, XScale, Java, power modeling, hardware performance counters, power measurements
1	Jaydeep Marathe, Anita Nagarajan, Frank Mueller	Detailed cache coherence characterization for OpenMP benchmarks.	ICS	2004	DBLP DOI BibTeX RDF	SMPs, program instrumentation, coherence protocols, cache analysis, dynamic binary rewriting
1	Bryan R. Buck, Jeffrey K. Hollingsworth	Data Centric Cache Measurement on the Intel ltanium 2 Processor.	SC	2004	DBLP DOI BibTeX RDF
1	Gabriel Marin, John M. Mellor-Crummey	Cross-architecture performance predictions for scientific applications using parameterized models.	SIGMETRICS	2004	DBLP DOI BibTeX RDF	modeling, performance analysis, prediction
1	Harish Patil, Robert S. Cohn, Mark Charney, Rajiv Kapoor, Andrew Sun, Anand Karunanidhi	Pinpointing Representative Portions of Large Intel® Itanium® Programs with Dynamic Instrumentation.	MICRO	2004	DBLP DOI BibTeX RDF
1	D. Tsifakis, Alistair P. Rendell, Peter E. Strazdins	Cache Oblivious Matrix Transposition: Simulation and Experiment.	International Conference on Computational Science	2004	DBLP DOI BibTeX RDF
1	Josef Weidendorfer, Markus Kowarschik, Carsten Trinitis	A Tool Suite for Simulation Based Analysis of Memory Access Behavior.	International Conference on Computational Science	2004	DBLP DOI BibTeX RDF	Runtime Instrumentation, Visualization, Cache Simulation
1	Jack Dongarra, Kevin S. London, Shirley Moore, Philip Mucci, Daniel Terpstra, Haihang You, Min Zhou	Experiences and Lessons Learned with a Portable Interface to Hardware Performance Counters.	IPDPS	2003	DBLP DOI BibTeX RDF
1	Géraud Krawezik	Performance comparison of MPI and three openMP programming styles on shared memory multiprocessors.	SPAA	2003	DBLP DOI BibTeX RDF	performance evaluation, MPI, multiprocessors, shared memory, openMP
1	Michela Taufer, Thomas Stricker	A Performance Monitor Based on Virtual Global Time for Clusters of PCs.	CLUSTER	2003	DBLP DOI BibTeX RDF	real-time performance analysis and evaluation, monitoring traffic, notion of time in distributed systems, clusters of PCs, performance metrics, Parallel and distributed systems
1	Tiago C. Ferreto, Luiz De Rose, César A. F. De Rose	A Hardware Counters Based Tool for System Monitoring.	Euro-Par	2003	DBLP DOI BibTeX RDF
1	Luiz De Rose, Kattamuri Ekanadham, Jeffrey K. Hollingsworth, Simone Sbaraglia	SIGMA: a simulator infrastructure to guide memory analysis.	SC	2002	DBLP DOI BibTeX RDF
1	José Ignacio Gómez, Luis Piñuel, Manuel Prieto, Francisco Tirado	Analysis of simulation-adapted SPEC 2000 benchmarks.	SIGARCH Computer Architecture News	2002	DBLP DOI BibTeX RDF	Reduced input datasets, Spec CPU 2000, Execution-driven simulation, Fast-forwarding, Hardware counters
1	Luiz De Rose, Felix Wolf	CATCH - A Call-Graph Based Automatic Tool for Capture of Hardware Performance Metrics for MPI and OpenMP Applications.	Euro-Par	2002	DBLP DOI BibTeX RDF
1	Daniel Chaver, Christian Tenllado, Luis Piñuel, Manuel Prieto, Francisco Tirado	Wavelet Transform for Large Scale Image Processing on Modern Microprocessors.	VECPAR	2002	DBLP DOI BibTeX RDF
1	John M. May	MPX: Software for Multiplexing Hardware Performance Counters in Multithreaded Programs.	IPDPS	2001	DBLP BibTeX RDF
1	Ismail Kadayif, T. Chinoda, Mahmut T. Kandemir, Narayanan Vijaykrishnan, Mary Jane Irwin, Anand Sivasubramaniam	vEC: virtual energy counters.	PASTE	2001	DBLP DOI BibTeX RDF	system energy consumption, optimizations, embedded systems, signal processing, hardware performance counters
1	Jordi Caubet, Judit Gimenez, Jesús Labarta, Luiz De Rose, Jeffrey S. Vetter	A Dynamic Tracing Mechanism for Performance Analysis of OpenMP Applications.	WOMPAT	2001	DBLP DOI BibTeX RDF
1	Franck Cappello, Olivier Richard, Daniel Etiemble	Investigating the Performance of Two Programming Models for Clusters of SMP PCs.	HPCA	2000	DBLP DOI BibTeX RDF	Hybrid and Single programming models, Performance evaluation and comparison, NAS NPB 2.3 benchmark, Breakdown of the execution times, Hardware performance counters, Cluster of SMPs
1	Deependra Talla, Lizy Kurian John, Viktor S. Lapinskii, Brian L. Evans	Evaluating Signal Processing and Multimedia Applications on SIMD, VLIW and Superscalar Architectures. (PDF / PS)	ICCD	2000	DBLP DOI BibTeX RDF
1	Lambert Schaelicke, Al Davis, Sally A. McKee	Profiling I/O Interrupts in Modern Architectures. (PDF / PS)	MASCOTS	2000	DBLP DOI BibTeX RDF
1	Götz Lindenmaier, Kathryn S. McKinley, Olivier Temam	Load Scheduling with Profile Information.	Euro-Par	2000	DBLP DOI BibTeX RDF
1	Stefan Manegold, Peter A. Boncz, Martin L. Kersten	Optimizing database architecture for the new bottleneck: memory access.	VLDB J.	2000	DBLP DOI BibTeX RDF	Memory access optimization, Decomposed storage model, Query processing, Main-memory databases, Join algorithms, Implementation techniques
1	Franck Cappello, Olivier Richard	Performance Characteristics of a Network of Commodity Multiprocessors for the NAS Benchmarks Using a Hybrid Memory Model.	IEEE PACT	1999	DBLP DOI BibTeX RDF	Cluster of Multiprocessor, Hybrid memory model, NAS NPB 2.3 benchmark, Performance Evaluation, Hardware Performance Counters
1	Luiz De Rose, Daniel A. Reed	SvPablo: A Multi-Language Architecture-Independent Performance Analysis System. (PDF / PS)	ICPP	1999	DBLP DOI BibTeX RDF	Performance analysis and visualization, Software instrumentation, Run-time summarization, SDDF MetaFormat, Parallel and distributed systems, Hardware monitoring
1	Ramesh Radhakrishnan, Lizy Kurian John	A Performance Study of Modern Web Server Applications.	Euro-Par	1999	DBLP DOI BibTeX RDF
1	Andy Martin	PC Desktop Performance and Hardware Performance Counters.	Int. CMG Conference	1998	DBLP BibTeX RDF
1	Luiz De Rose, Ying Zhang, Daniel A. Reed	SvPablo: A Multi-language Performance Analysis System.	Computer Performance Evaluation (Tools)	1998	DBLP DOI BibTeX RDF
1	Glenn Ammons, Thomas Ball, James R. Larus	Exploiting Hardware Performance Counters with Flow and Context Sensitive Profiling.	PLDI	1997	DBLP DOI BibTeX RDF