Search results for "hardware-software co-simulation"

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
3	Wenlong Li, Eric Li, Aamer Jaleel, Jiulong Shan, Yurong Chen, Qigang Wang, Ravi R. Iyer, Ramesh Illikkal, Yimin Zhang, Dong Liu, Michael Liao, Wei Wei, Jinhua Du	Understanding the Memory Performance of Data-Mining Workloads on Small, Medium, and Large-Scale CMPs Using Hardware-Software Co-simulation.	ISPASS	2007	DBLP DOI BibTeX RDF	DRAM caches, small-scale CMP, medium-scale CMP, large-scale CMP, hardware-software co-simulation, terabyte-level workloads, multithreaded data mining applications, cache design, memory performance, multicore systems, memory system performance
2	Aimen Bouchhima, Patrice Gerin, Frédéric Pétrot	Automatic instrumentation of embedded software for high level hardware/software co-simulation.	ASP-DAC	2009	DBLP DOI BibTeX RDF
2	Tao Wang, Qigang Wang, Dong Liu, Michael Liao, Kevin Wang, Lu Cao, Li Zhao, Ravi R. Iyer, Ramesh Illikkal, John Du, Liang Wang	Hardware/Software Co-Simulation for Last Level Cache Exploration.	NAS	2009	DBLP DOI BibTeX RDF
2	Valery Sklyarov, Iouliia Skliarova, Bruno Figueiredo Pimentel, Manuel Almeida	Multimedia Tools and Architectures for Hardware/Software Co-Simulation of Reconfigurable Systems.	VLSI Design	2008	DBLP DOI BibTeX RDF
2	Ping Hang Cheung, Kecheng Hao, Fei Xie	Component-Based Hardware/Software Co-Simulation.	DSD	2007	DBLP DOI BibTeX RDF
2	Bassam Tabbara, Marco Sgroi, Alberto L. Sangiovanni-Vincentelli, Enrica Filippi, Luciano Lavagno	Fast Hardware-Software Co-simulation Using VHDL Models.	DATE	1999	DBLP DOI BibTeX RDF
2	Claudio Passerone, Luciano Lavagno, Massimiliano Chiodo, Alberto L. Sangiovanni-Vincentelli	Fast Hardware/Software Co-Simulation for Virtual Prototyping and Trade-Off Analysis.	DAC	1997	DBLP DOI BibTeX RDF
1	Tom Borgstrom, Eshel Haritan, Ron Wilson, David Abada, Andrew Dauman, Ramesh Chandra, Olivier Mielo, Chuck Cruse, Achim Nohl	System prototypes: virtual, hardware or hybrid?	DAC	2009	DBLP DOI BibTeX RDF	SystemC TLM, hardware/software co-verification, rapid prototype, embedded software, virtual prototype, virtual platform, system validation, FPGA prototype, system prototype
1	Wei Wang, Qigang Wang, Wei Wei, Dong Liu	Evaluating Heterogeneous Memory Model by Realistic Trace-Driven Hardware/Software Co-simulation.	Euro-Par	2008	DBLP DOI BibTeX RDF	Performance model, Memory architecture, Trace-driven simulation
1	Manuel Saldaña, Emanuel Ramalho, Paul Chow	A Message-Passing Hardware/Software Co-simulation Environment to Aid in Reconfigurable Computing Design Using TMD-MPI.	ReConFig	2008	DBLP DOI BibTeX RDF	Simulation, FPGA, Parallel Programming, MPI, Message-Passing, Reconfigurable, High-Performance
1	Ye Wu, Hai Jiang, Chao Wei	Design of a Hardware/Software Co-Simulation/Verification Platform.	IMECS	2007	DBLP BibTeX RDF
1	Makoto Ishikawa, D. J. McCune, George Saikalis, Shigeru Oho	CPU Model-Based Hardware/Software Co-design, Co-simulation and Analysis Technology for Real-Time Embedded Control Systems.	IEEE Real-Time and Embedded Technology and Applications Symposium	2007	DBLP DOI BibTeX RDF
1	K. S. Tham, Douglas L. Maskell	Software-Oriented Approach to Hardware-Software Co-Simulation for FPGA-Based Risc Extensible Processor.	FPL	2006	DBLP DOI BibTeX RDF
1	K. N. Vikram, V. Vasudevan	Hardware-software co-simulation of bus-based reconfigurable systems.	Microprocessors and Microsystems	2005	DBLP DOI BibTeX RDF
1	Jingzhao Ou, Viktor K. Prasanna	MATLAB/Simulink Based Hardware/Software Co-Simulation for Designing Using FPGA Configured Soft Processors.	IPDPS	2005	DBLP DOI BibTeX RDF
1	Franco Fummi, Mirko Loghi, Stefano Martini, Marco Monguzzi, Giovanni Perbellini, Massimo Poncino	Virtual Hardware Prototyping through Timed Hardware-Software Co-Simulation.	DATE	2005	DBLP DOI BibTeX RDF
1	Jae-Gon Lee, Moo-Kyoung Chung, Ki-Yong Ahn, Sang-Heon Lee, Chong-Min Kyung	A Prediction Packetizing Scheme for Reducing Channel Traffic in Transaction-Level Hardware/Software Co-Emulation.	DATE	2005	DBLP DOI BibTeX RDF
1	Petri Kukkala, Marko Hännikäinen, Timo D. Hämäläinen	Co-simulation of Wireless Local Area Network Terminals with Protocol Software Implemented in SDL.	DSD	2005	DBLP DOI BibTeX RDF
1	H. M. AbdElSalam, Shinsuke Kobayashi, Keishi Sakanushi, Yoshinori Takeuchi, Masaharu Imai	Towards a Higher Level of Abstraction in Hardware/Software Co-Simulation.	ICDCS Workshops	2004	DBLP DOI BibTeX RDF
1	Pramote Kuacharoen, Vincent John Mooney, Vijay K. Madisetti	Software Streaming via Block Streaming.	DATE	2003	DBLP DOI BibTeX RDF
1	Wei-Chang Tsai, Chun-Ming Huang, Jiann-Jenn Wang, Chen-Yi Lee	Infrastructure for Education and Research of SOC/IP in Taiwan.	MSE	2003	DBLP DOI BibTeX RDF
1	Dongxiao Li, Qingdong Yao, Peng Liu, Li Zhou	A bus arbitration scheme for HDTV decoder SoC.	APCCAS	2002	DBLP DOI BibTeX RDF
1	A. Abbas, A. Ahmed, Waheed Uz Zaman Bajwa, A. Anwar, S. Abbasi	A retargetable tool-suite for the design of application specific instruction set processors using a machine description language.	ISCAS	2002	DBLP DOI BibTeX RDF
1	Matías J. Garrido, César Sanz, Marcos Jiménez, Juan M. Meneses	A Flexible H.263 Video Coder Prototype Based on FPGA.	IEEE International Workshop on Rapid System Prototyping	2002	DBLP DOI BibTeX RDF
1	Andreas Hoffmann, Tim Kogel, Heinrich Meyr	A framework for fast hardware-software co-simulation.	DATE	2001	DBLP DOI BibTeX RDF
1	Mohammed El Shobaki, Lennart Lindh	A Hardware and Software Monitor for High-Level System-on-Chip Verification.	ISQED	2001	DBLP DOI BibTeX RDF
1	Hubert Garavel, César Viho, Massimo Zendri	System design of a CC-NUMA multiprocessor architecture using formal specification, model-checking, co-simulation, and test generation.	STTT	2001	DBLP DOI BibTeX RDF	Verification, Formal specification, Testing, Formal methods, Validation, Code generation, Computer architecture, Test generation, Rapid prototyping, Process algebra, Conformance testing, Cache coherency, System level design, Co-design, lotos, Hardware design, Co-simulation, numa, cc-numa
1	Jwahar R. Bammi, Wido Kruijtzer, Luciano Lavagno, Edwin A. Harcourt, Mihai T. Lazarescu	Software performance estimation strategies in a system-level design tool.	CODES	2000	DBLP DOI BibTeX RDF
1	Lovic Gauthier, Ahmed Amine Jerraya	Cycle-True Simulation of the ST10 Microcontroller.	DATE	2000	DBLP DOI BibTeX RDF
1	Lovic Gauthier, Ahmed Amine Jerraya	Cycle-True Simulation of the ST10 Microcontroller Including the Core and the Peripherals. (PDF / PS)	IEEE International Workshop on Rapid System Prototyping	2000	DBLP DOI BibTeX RDF	cycle-true, simulator, microcontroller
1	Shingo Kinoshita, Hiroyuki Yamashita, Toshihiko Suguri, Kouichi Nagami	Hardware/software co-simulation focusing on functional verification of large-scale ASICs.	Systems and Computers in Japan	1999	DBLP DOI BibTeX RDF
1	Marcello Lajolo, Mihai Lazarescu, Alberto L. Sangiovanni-Vincentelli	A compilation-based software estimation scheme for hardware/software co-simulation.	CODES	1999	DBLP DOI BibTeX RDF	compilation, delay modeling, software estimation
1	Mitsuhiro Yasuda, Katsuhiko Seo, Hisao Koizumi, Barry Shackleford, Fumio Suzuki	A Top-down Hardware/Software Co-Simulation Method for Embedded Systems Based Upon a Component Logical Bus Architecture.	ASP-DAC	1998	DBLP BibTeX RDF
1	Mohammed El Shobaki	Verification of Embedded Real-Time Systems Using Hardware/Software Cosimulation.	EUROMICRO	1998	DBLP DOI BibTeX RDF
1	Matthias Bauer, Wolfgang Ecker	Hardware/Software Co-Simulation in a VHDL-Based Test Bench Approach.	DAC	1997	DBLP DOI BibTeX RDF	VHDL
1	Alberto Allara, S. Filipponi, Fabio Salice, William Fornaciari, Donatella Sciuto	A Flexible Model for Evaluating the Behavior of Hardware/Software Systems.	CODES	1997	DBLP DOI BibTeX RDF	hardware-software co-simulation, embedded system design
1	James A. Rowson	Hardware/Software Co-Simulation.	DAC	1994	DBLP DOI BibTeX RDF
1	David Becker, Raj K. Singh, Stephen G. Tell	An Engineering Environment for Hardware/Software Co-Simulation.	DAC	1992	DBLP BibTeX RDF