Search results for "hierarchical memories"

Found 18 publication records. Showing 18 according to the selection in the facets

Hits ?▲	Authors	Title	Venue	Year	Link	Author keywords
2	William Lundgren	Gedae's automated management of hierarchical memories on multicore processors Commercial Tutorial.	IPDPS	2008	DBLP DOI BibTeX RDF
2	Gianfranco Bilardi, Kattamuri Ekanadham, Pratap Pattnaik	An Address Dependence Model of Computation for Hierarchical Memories with Pipelined Transfer.	IPDPS	2005	DBLP DOI BibTeX RDF
2	Rogério M. Gomes, Antônio de Pádua Braga, Henrique E. Borges	A Model for Hierarchical Associative Memories via Dynamically Coupled GBSB Neural Networks.	ICANN	2005	DBLP DOI BibTeX RDF	Coupled neural networks, TNGS, Artificial neural networks, Dynamical systems, Hierarchical memories
2	Christian Piguet, T. Schneider, Jean-Marc Masgonty, Claude Arm, Serge Durand, M. Stegers	Low-Power Embedded Microprocessor Design.	EUROMICRO	1996	DBLP DOI BibTeX RDF	low-power embedded microprocessor design, low-power RISC-like architectures, gated clock techniques, power savings, microprocessor chips, CMOS technology, hierarchical memories, clock cycles
1	Marwan S. Sleiman, Lester Lipsky, Kishori M. Konwar	Performance modeling of hierarchical memories.	CAINE	2006	DBLP BibTeX RDF
1	Kishori M. Konwar, Lester Lipsky, Marwan S. Sleiman	Moments of Memory Access Time for Systems With Hierarchical Memories.	Computers and Their Applications	2006	DBLP BibTeX RDF
1	John A. Gunnels, Fred G. Gustavson, Greg Henry, Robert A. van de Geijn	A Family of High-Performance Matrix Multiplication Algorithms.	PARA	2004	DBLP DOI BibTeX RDF
1	Zahari Zlatev	Large-Scale Computations with the Unified Danish Eulerian Model.	PARA	2004	DBLP DOI BibTeX RDF
1	Frank K. H. A. Dehne, Stefano Mardegan, Andrea Pietracaprina, Giuseppe Prencipe	Distribution Sweeping on Clustered Machines with Hierarchical Memories. (PDF / PS)	IPDPS	2002	DBLP DOI BibTeX RDF
1	Gianfranco Bilardi, Kattamuri Ekanadham, Pratap Pattnaik	Optimal organizations for pipelined hierarchical memories.	SPAA	2002	DBLP DOI BibTeX RDF	hierarchical memory processor, scalable pipeline
1	John A. Gunnels, Greg Henry, Robert A. van de Geijn	A Family of High-Performance Matrix Multiplication Algorithms.	International Conference on Computational Science	2001	DBLP DOI BibTeX RDF
1	David E. Keyes	Four Horizons for Enhancing the Performance of Parallel Simulations Based on Partial Differential Equations.	Euro-Par	2000	DBLP DOI BibTeX RDF
1	Gene Cheung, Steven McCanne, Christos H. Papadimitriou	Software Synthesis of Variable-length Code Decoder Using a Mixture of Programmed Logic and Table Lookups.	Data Compression Conference	1999	DBLP DOI BibTeX RDF
1	Gene Cheung, Steven McCanne	Dynamic Memory Model Based Framework for Optimization of IP Address Lookup Algorithms. (PDF / PS)	ICNP	1999	DBLP DOI BibTeX RDF
1	Yanbing Li, Wayne Wolf	A Task-Level Hierarchical Memory Model for System Synthesis of Multiprocessors.	DAC	1997	DBLP DOI BibTeX RDF
1	Claudia Leopold	Maintaining Dictionaries in a Hierarchical Memory.	MFCS	1991	DBLP DOI BibTeX RDF
1	Peter Mayes, Giuseppe Radicati di Brozolo	Portable and efficient factorization algorithms on the IBM 3090/VF.	ICS	1989	DBLP DOI BibTeX RDF
1	Peter M. Fenwick	Some Aspects of the Dynamic Behavior of Hierarchical Memories.	IEEE Trans. Computers	1985	DBLP DOI BibTeX RDF